#include "Mips.h"#include "MipsRegisterInfo.h"#include "MipsSubtarget.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCDisassembler.h"#include "llvm/MC/MCFixedLenDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/MemoryObject.h"#include "llvm/Support/TargetRegistry.h"#include "MipsGenDisassemblerTables.inc"
Go to the source code of this file.
Namespaces | |
| namespace | llvm |
List of target independent CodeGen pass IDs. | |
Defines | |
| #define | DEBUG_TYPE "mips-disassembler" |
Typedefs | |
| typedef MCDisassembler::DecodeStatus | DecodeStatus |
Functions | |
| static DecodeStatus | DecodeGPR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCPU16RegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePtrRegisterClass (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDSPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCCRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFCCRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGRCCRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeHWRegsRegisterClass (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAFGR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeACC64DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeHI32DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLO32DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128BRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128HRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128WRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128DRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSACtrlRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCOP2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeJumpTarget (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget21 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget26 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTargetMM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeJumpTargetMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128Mem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm12 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm16 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSpecial3LlSc (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm16 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLSAImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeInsSize (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeExtSize (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm19Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm18Lsl3 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeINSVE_DF (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeAddiGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDaddiGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezlGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzlGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| static MCDisassembler * | createMipsDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| static MCDisassembler * | createMipselDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| static MCDisassembler * | createMips64Disassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| static MCDisassembler * | createMips64elDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| void | LLVMInitializeMipsDisassembler () |
| static unsigned | getReg (const void *D, unsigned RC, unsigned RegNo) |
| static DecodeStatus | readInstruction32 (const MemoryObject ®ion, uint64_t address, uint64_t &size, uint32_t &insn, bool isBigEndian, bool IsMicroMips) |
Variables | |
| Target | llvm::TheMipselTarget |
| Target | llvm::TheMipsTarget |
| Target | llvm::TheMips64Target |
| Target | llvm::TheMips64elTarget |
Define Documentation
| #define DEBUG_TYPE "mips-disassembler" |
Definition at line 28 of file MipsDisassembler.cpp.
Typedef Documentation
Definition at line 30 of file MipsDisassembler.cpp.
Function Documentation
| static MCDisassembler* createMips64Disassembler | ( | const Target & | T, |
| const MCSubtargetInfo & | STI, | ||
| MCContext & | Ctx | ||
| ) | [static] |
Definition at line 358 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
| static MCDisassembler* createMips64elDisassembler | ( | const Target & | T, |
| const MCSubtargetInfo & | STI, | ||
| MCContext & | Ctx | ||
| ) | [static] |
Definition at line 365 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
| static MCDisassembler* createMipsDisassembler | ( | const Target & | T, |
| const MCSubtargetInfo & | STI, | ||
| MCContext & | Ctx | ||
| ) | [static] |
Definition at line 344 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
| static MCDisassembler* createMipselDisassembler | ( | const Target & | T, |
| const MCSubtargetInfo & | STI, | ||
| MCContext & | Ctx | ||
| ) | [static] |
Definition at line 351 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
| static DecodeStatus DecodeACC64DSPRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1116 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeAddiGroupBranch | ( | MCInst & | MI, |
| InsnType | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 439 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeAFGR64RegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1103 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeBgtzGroupBranch | ( | MCInst & | MI, |
| InsnType | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 604 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeBgtzlGroupBranch | ( | MCInst & | MI, |
| InsnType | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 560 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeBlezGroupBranch | ( | MCInst & | MI, |
| InsnType | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 653 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeBlezlGroupBranch | ( | MCInst & | MI, |
| InsnType | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 517 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeBranchTarget | ( | MCInst & | Inst, |
| unsigned | Offset, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1224 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeBranchTarget21 | ( | MCInst & | Inst, |
| unsigned | Offset, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1243 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeBranchTarget26 | ( | MCInst & | Inst, |
| unsigned | Offset, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1253 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeBranchTargetMM | ( | MCInst & | Inst, |
| unsigned | Offset, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1263 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeCCRRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 912 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeCOP2RegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1212 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeCPU16RegsRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 838 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail.
| static DecodeStatus DecodeDaddiGroupBranch | ( | MCInst & | MI, |
| InsnType | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 478 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeDSPRRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 881 of file MipsDisassembler.cpp.
References DecodeGPR32RegisterClass().
| static DecodeStatus DecodeExtSize | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1309 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeFCCRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 923 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeFGR32RegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 900 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeFGR64RegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 888 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeFGRCCRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 934 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeFMem | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1052 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeGPR32RegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 860 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeDSPRRegisterClass(), and DecodePtrRegisterClass().
| static DecodeStatus DecodeGPR64RegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 847 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodePtrRegisterClass().
| static DecodeStatus DecodeHI32DSPRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1128 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeHWRegsRegisterClass | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1092 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeInsSize | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1298 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeINSVE_DF | ( | MCInst & | MI, |
| InsnType | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
INSVE_[BHWD] have an implicit operand that the generated decoder doesn't handle.
Definition at line 393 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeMSA128BRegisterClass(), DecodeMSA128DRegisterClass(), DecodeMSA128HRegisterClass(), DecodeMSA128WRegisterClass(), llvm::MCDisassembler::Fail, llvm_unreachable, and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeJumpTarget | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1233 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeJumpTargetMM | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1272 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeLO32DSPRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1140 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeLSAImm | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1289 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeMem | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 945 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), llvm::MCInst::getOpcode(), getReg(), llvm::PPCISD::SC, and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeMemMMImm12 | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1013 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), llvm::MCInst::getOpcode(), getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeMemMMImm16 | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1034 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeMSA128BRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1152 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
| static DecodeStatus DecodeMSA128DRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1188 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
| static DecodeStatus DecodeMSA128HRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1164 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
| static DecodeStatus DecodeMSA128Mem | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 967 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeMSA128WRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1176 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
| static DecodeStatus DecodeMSACtrlRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1200 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodePtrRegisterClass | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 871 of file MipsDisassembler.cpp.
References DecodeGPR32RegisterClass(), and DecodeGPR64RegisterClass().
| static DecodeStatus DecodeSimm16 | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1281 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeSimm18Lsl3 | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1324 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeSimm19Lsl2 | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1318 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and llvm::MCDisassembler::Success.
| static DecodeStatus DecodeSpecial3LlSc | ( | MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1070 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCOperand::CreateReg(), llvm::MCInst::getOpcode(), getReg(), and llvm::MCDisassembler::Success.
Definition at line 386 of file MipsDisassembler.cpp.
References llvm::MCRegisterClass::begin(), and llvm::MCRegisterInfo::getRegClass().
Referenced by AddNodeIDCustom(), llvm::PPCInstrInfo::canInsertSelect(), CC_Hexagon32_VarArgs(), CheckForPhysRegDependency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), DecodeACC64DSPRegisterClass(), DecodeAddiGroupBranch(), DecodeAFGR64RegisterClass(), DecodeBgtzGroupBranch(), DecodeBgtzlGroupBranch(), DecodeBlezGroupBranch(), DecodeBlezlGroupBranch(), DecodeCCRRegisterClass(), DecodeCOP2RegisterClass(), DecodeDaddiGroupBranch(), DecodeFCCRegisterClass(), DecodeFGR32RegisterClass(), DecodeFGR64RegisterClass(), DecodeFGRCCRegisterClass(), DecodeFMem(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeHI32DSPRegisterClass(), DecodeLO32DSPRegisterClass(), DecodeMem(), DecodeMemMMImm12(), DecodeMemMMImm16(), DecodeMSA128BRegisterClass(), DecodeMSA128DRegisterClass(), DecodeMSA128HRegisterClass(), DecodeMSA128Mem(), DecodeMSA128WRegisterClass(), DecodeMSACtrlRegisterClass(), DecodeSpecial3LlSc(), emitAlignedDPRCS2Restores(), GetCostForDef(), getTruncatedArgReg(), HasNoSignedComparisonUses(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), llvm::XCoreInstrInfo::InsertBranch(), llvm::NVPTXInstrInfo::InsertBranch(), llvm::HexagonInstrInfo::InsertBranch(), llvm::ARMBaseInstrInfo::InsertBranch(), llvm::PPCInstrInfo::InsertBranch(), llvm::PPCInstrInfo::insertSelect(), llvm::AArch64InstrInfo::insertSelect(), llvm::HexagonTargetLowering::LowerINLINEASM(), MatchingStackOffset(), llvm::ARMBaseInstrInfo::PredicateInstruction(), llvm::R600InstrInfo::PredicateInstruction(), llvm::PPCInstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), reachedUsesToDefs(), llvm::HexagonFrameLowering::restoreCalleeSavedRegisters(), RetCC_Hexagon32_VarArgs(), llvm::PPCInstrInfo::ReverseBranchCondition(), llvm::rewriteT2FrameIndex(), llvm::HexagonFrameLowering::spillCalleeSavedRegisters(), and llvm::PPCInstrInfo::SubsumesPredicate().
| void LLVMInitializeMipsDisassembler | ( | ) |
Definition at line 372 of file MipsDisassembler.cpp.
References createMips64Disassembler(), createMips64elDisassembler(), createMipsDisassembler(), createMipselDisassembler(), llvm::TargetRegistry::RegisterMCDisassembler(), llvm::TheMips64elTarget, llvm::TheMips64Target, llvm::TheMipselTarget, and llvm::TheMipsTarget.
| static DecodeStatus readInstruction32 | ( | const MemoryObject & | region, |
| uint64_t | address, | ||
| uint64_t & | size, | ||
| uint32_t & | insn, | ||
| bool | isBigEndian, | ||
| bool | IsMicroMips | ||
| ) | [static] |
readInstruction - read four bytes from the MemoryObject and return 32 bit word sorted according to the given endianess
Definition at line 696 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::MemoryObject::readBytes(), and llvm::MCDisassembler::Success.
1.7.6.1