#include <linux/ratelimit.h>
#include <linux/pci.h>
#include <linux/pci-ats.h>
#include <linux/bitmap.h>
#include <linux/slab.h>
#include <linux/debugfs.h>
#include <linux/scatterlist.h>
#include <linux/dma-mapping.h>
#include <linux/iommu-helper.h>
#include <linux/iommu.h>
#include <linux/delay.h>
#include <linux/amd-iommu.h>
#include <linux/notifier.h>
#include <linux/export.h>
#include <linux/irq.h>
#include <linux/msi.h>
#include <asm/irq_remapping.h>
#include <asm/io_apic.h>
#include <asm/apic.h>
#include <asm/hw_irq.h>
#include <asm/msidef.h>
#include <asm/proto.h>
#include <asm/iommu.h>
#include <asm/gart.h>
#include <asm/dma.h>
#include "amd_iommu_proto.h"
#include "amd_iommu_types.h"
#include "irq_remapping.h"
Go to the source code of this file.
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| LIST_HEAD (ioapic_map) |
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| LIST_HEAD (hpet_map) |
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void __init | amd_iommu_uninit_devices (void) |
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int __init | amd_iommu_init_devices (void) |
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irqreturn_t | amd_iommu_int_thread (int irq, void *data) |
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irqreturn_t | amd_iommu_int_handler (int irq, void *data) |
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void | iommu_flush_all_caches (struct amd_iommu *iommu) |
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void | amd_iommu_init_notifier (void) |
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void __init | amd_iommu_init_api (void) |
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int __init | amd_iommu_init_dma_ops (void) |
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int __init | amd_iommu_init_passthrough (void) |
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int | amd_iommu_register_ppr_notifier (struct notifier_block *nb) |
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| EXPORT_SYMBOL (amd_iommu_register_ppr_notifier) |
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int | amd_iommu_unregister_ppr_notifier (struct notifier_block *nb) |
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| EXPORT_SYMBOL (amd_iommu_unregister_ppr_notifier) |
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void | amd_iommu_domain_direct_map (struct iommu_domain *dom) |
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| EXPORT_SYMBOL (amd_iommu_domain_direct_map) |
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int | amd_iommu_domain_enable_v2 (struct iommu_domain *dom, int pasids) |
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| EXPORT_SYMBOL (amd_iommu_domain_enable_v2) |
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int | amd_iommu_flush_page (struct iommu_domain *dom, int pasid, u64 address) |
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| EXPORT_SYMBOL (amd_iommu_flush_page) |
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int | amd_iommu_flush_tlb (struct iommu_domain *dom, int pasid) |
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| EXPORT_SYMBOL (amd_iommu_flush_tlb) |
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int | amd_iommu_domain_set_gcr3 (struct iommu_domain *dom, int pasid, unsigned long cr3) |
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| EXPORT_SYMBOL (amd_iommu_domain_set_gcr3) |
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int | amd_iommu_domain_clear_gcr3 (struct iommu_domain *dom, int pasid) |
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| EXPORT_SYMBOL (amd_iommu_domain_clear_gcr3) |
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int | amd_iommu_complete_ppr (struct pci_dev *pdev, int pasid, int status, int tag) |
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| EXPORT_SYMBOL (amd_iommu_complete_ppr) |
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struct iommu_domain * | amd_iommu_get_v2_domain (struct pci_dev *pdev) |
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| EXPORT_SYMBOL (amd_iommu_get_v2_domain) |
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void | amd_iommu_enable_device_erratum (struct pci_dev *pdev, u32 erratum) |
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| EXPORT_SYMBOL (amd_iommu_enable_device_erratum) |
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int | amd_iommu_device_info (struct pci_dev *pdev, struct amd_iommu_device_info *info) |
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| EXPORT_SYMBOL (amd_iommu_device_info) |
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#define AMD_IOMMU_PGSIZES (~0xFFFUL) |
#define CMD_SET_TYPE |
( |
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cmd, |
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t |
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) |
| ((cmd)->data[1] |= ((t) << 28)) |
#define LOOP_TIMEOUT 100000 |
#define PCI_PRI_TLP_OFF (1 << 15) |
int amd_iommu_max_glx_val = -1 |