Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
phy.h
Go to the documentation of this file.
1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * wlanfae <[email protected]>
23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24  * Hsinchu 300, Taiwan.
25  *
26  * Larry Finger <[email protected]>
27  *
28  *****************************************************************************/
29 
30 #ifndef __RTL92C_PHY_H__
31 #define __RTL92C_PHY_H__
32 
33 #define MAX_PRECMD_CNT 16
34 #define MAX_RFDEPENDCMD_CNT 16
35 #define MAX_POSTCMD_CNT 16
36 
37 #define MAX_DOZE_WAITING_TIMES_9x 64
38 
39 #define RT_CANNOT_IO(hw) false
40 #define HIGHPOWER_RADIOA_ARRAYLEN 22
41 
42 #define IQK_ADDA_REG_NUM 16
43 #define MAX_TOLERANCE 5
44 #define IQK_DELAY_TIME 1
45 
46 #define APK_BB_REG_NUM 5
47 #define APK_AFE_REG_NUM 16
48 #define APK_CURVE_REG_NUM 4
49 #define PATH_NUM 2
50 
51 #define LOOP_LIMIT 5
52 #define MAX_STALL_TIME 50
53 #define AntennaDiversityValue 0x80
54 #define MAX_TXPWR_IDX_NMODE_92S 63
55 #define Reset_Cnt_Limit 3
56 
57 #define IQK_ADDA_REG_NUM 16
58 #define IQK_MAC_REG_NUM 4
59 
60 #define IQK_DELAY_TIME 1
61 
62 #define RF90_PATH_MAX 2
63 
64 #define CT_OFFSET_MAC_ADDR 0X16
65 
66 #define CT_OFFSET_CCK_TX_PWR_IDX 0x5A
67 #define CT_OFFSET_HT401S_TX_PWR_IDX 0x60
68 #define CT_OFFSET_HT402S_TX_PWR_IDX_DIF 0x66
69 #define CT_OFFSET_HT20_TX_PWR_IDX_DIFF 0x69
70 #define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF 0x6C
71 
72 #define CT_OFFSET_HT40_MAX_PWR_OFFSET 0x6F
73 #define CT_OFFSET_HT20_MAX_PWR_OFFSET 0x72
74 
75 #define CT_OFFSET_CHANNEL_PLAH 0x75
76 #define CT_OFFSET_THERMAL_METER 0x78
77 #define CT_OFFSET_RF_OPTION 0x79
78 #define CT_OFFSET_VERSION 0x7E
79 #define CT_OFFSET_CUSTOMER_ID 0x7F
80 
81 #define RTL92C_MAX_PATH_NUM 2
82 
91 };
92 
93 struct swchnlcmd {
94  enum swchnlcmd_id cmdid;
95  u32 para1;
96  u32 para2;
97  u32 msdelay;
98 };
99 
106 };
107 
111 };
112 
121 };
122 
140 };
141 
142 struct r_antenna_select_ofdm {
143  u32 r_tx_antenna:4;
144  u32 r_ant_l:4;
145  u32 r_ant_non_ht:4;
146  u32 r_ant_ht1:4;
147  u32 r_ant_ht2:4;
148  u32 r_ant_ht_s1:4;
150  u32 ofdm_txsc:2;
151  u32 reserved:2;
152 };
153 
154 struct r_antenna_select_cck {
156  u8 r_cckrx_enable:2;
157  u8 r_ccktx_enable:4;
158 };
159 
160 struct efuse_contents {
162  u8 cck_tx_power_idx[6];
171  u8 rf_option[5];
172  u8 version;
173  u8 oem_id;
174  u8 regulatory;
175 };
176 
177 struct tx_power_struct {
187  u32 mcs_original_offset[4][16];
188 };
189 
190 bool rtl92c_phy_bb_config(struct ieee80211_hw *hw);
192  u32 regaddr, u32 bitmask);
194  u32 regaddr, u32 bitmask, u32 data);
196  enum radio_path rfpath, u32 regaddr,
197  u32 bitmask);
198 extern void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw,
199  enum radio_path rfpath, u32 regaddr,
200  u32 bitmask, u32 data);
203 bool rtl92c_phy_rf_config(struct ieee80211_hw *hw);
205  enum radio_path rfpath);
208  long *powerlevel);
211  long power_indbm);
213  u8 operation);
215  enum nl80211_channel_type ch_type);
218 void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
220  u16 beaconinterval);
221 void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
223 void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t);
224 void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
226  enum radio_path rfpath);
228  u32 rfpath);
229 bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
231  enum rf_pwrstate rfpwr_state);
233 bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
234 void rtl92c_phy_set_io(struct ieee80211_hw *hw);
235 void rtl92c_bb_block_on(struct ieee80211_hw *hw);
237  enum radio_path rfpath, u32 offset);
239  enum radio_path rfpath, u32 offset);
242  enum radio_path rfpath, u32 offset,
243  u32 data);
245  enum radio_path rfpath, u32 offset,
246  u32 data);
248  u32 regaddr, u32 bitmask,
249  u32 data);
255  enum rf_pwrstate rfpwr_state);
257  u8 configtype);
259  u8 configtype);
261 
262 #endif