#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/i2c.h>
#include <linux/hardirq.h>
#include <asm/div64.h>
#include "dvb_frontend.h"
#include "drxk.h"
#include "drxk_hard.h"

Macros
#define	NOA1ROM 0

#define	DRXDAP_FASI_SHORT_FORMAT(addr) (((addr) & 0xFC30FF80) == 0)

#define	DRXDAP_FASI_LONG_FORMAT(addr) (((addr) & 0xFC30FF80) != 0)

#define	DEFAULT_MER_83 165

#define	DEFAULT_MER_93 250

#define	DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH (0x02)

#define	DRXK_MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH (0x03)

#define	DEFAULT_DRXK_MPEG_LOCK_TIMEOUT 700

#define	DEFAULT_DRXK_DEMOD_LOCK_TIMEOUT 500

#define	DRXK_KI_RAGC_ATV 4

#define	DRXK_KI_IAGC_ATV 6

#define	DRXK_KI_DAGC_ATV 7

#define	DRXK_KI_RAGC_QAM 3

#define	DRXK_KI_IAGC_QAM 4

#define	DRXK_KI_DAGC_QAM 7

#define	DRXK_KI_RAGC_DVBT (IsA1WithPatchCode(state) ? 3 : 2)

#define	DRXK_KI_IAGC_DVBT (IsA1WithPatchCode(state) ? 4 : 2)

#define	DRXK_KI_DAGC_DVBT (IsA1WithPatchCode(state) ? 10 : 7)

#define	DRXK_AGC_DAC_OFFSET (0x800)

#define	DRXK_BANDWIDTH_8MHZ_IN_HZ (0x8B8249L)

#define	DRXK_BANDWIDTH_7MHZ_IN_HZ (0x7A1200L)

#define	DRXK_BANDWIDTH_6MHZ_IN_HZ (0x68A1B6L)

#define	DRXK_QAM_SYMBOLRATE_MAX (7233000)

#define	DRXK_BL_ROM_OFFSET_TAPS_DVBT 56

#define	DRXK_BL_ROM_OFFSET_TAPS_ITU_A 64

#define	DRXK_BL_ROM_OFFSET_TAPS_ITU_C 0x5FE0

#define	DRXK_BL_ROM_OFFSET_TAPS_BG 24

#define	DRXK_BL_ROM_OFFSET_TAPS_DKILLP 32

#define	DRXK_BL_ROM_OFFSET_TAPS_NTSC 40

#define	DRXK_BL_ROM_OFFSET_TAPS_FM 48

#define	DRXK_BL_ROM_OFFSET_UCODE 0

#define	DRXK_BLC_TIMEOUT 100

#define	DRXK_BLCC_NR_ELEMENTS_TAPS 2

#define	DRXK_BLCC_NR_ELEMENTS_UCODE 6

#define	DRXK_BLDC_NR_ELEMENTS_TAPS 28

#define	DRXK_OFDM_NE_NOTCH_WIDTH (4)

#define	DRXK_QAM_SL_SIG_POWER_QAM16 (40960)

#define	DRXK_QAM_SL_SIG_POWER_QAM32 (20480)

#define	DRXK_QAM_SL_SIG_POWER_QAM64 (43008)

#define	DRXK_QAM_SL_SIG_POWER_QAM128 (20992)

#define	DRXK_QAM_SL_SIG_POWER_QAM256 (43520)

#define	dprintk(level, fmt, arg...)

#define	DRXK_MAX_RETRIES_POWERUP 20

#define	SCU_RAM_AGC_KI_INV_RF_POL__M 0x4000

#define	SCU_RAM_AGC_KI_INV_IF_POL__M 0x2000

#define	SIO_HI_RA_RAM_USR_BEGIN__A 0x420040

#define	SIO_HI_RA_RAM_USR_END__A 0x420060

#define	DRXK_HI_ATOMIC_BUF_START (SIO_HI_RA_RAM_USR_BEGIN__A)

#define	DRXK_HI_ATOMIC_BUF_END (SIO_HI_RA_RAM_USR_BEGIN__A + 7)

#define	DRXK_HI_ATOMIC_READ SIO_HI_RA_RAM_PAR_3_ACP_RW_READ

#define	DRXK_HI_ATOMIC_WRITE SIO_HI_RA_RAM_PAR_3_ACP_RW_WRITE

#define	DRXDAP_FASI_ADDR2BLOCK(addr) (((addr) >> 22) & 0x3F)

#define	DRXDAP_FASI_ADDR2BANK(addr) (((addr) >> 16) & 0x3F)

#define	DRXDAP_FASI_ADDR2OFFSET(addr) ((addr) & 0x7FFF)

#define	DEFAULT_FR_THRES_8K 4000

#define	QAM_MIRROR__M 0x03

#define	QAM_MIRROR_NORMAL 0x00

#define	QAM_MIRRORED 0x01

#define	QAM_MIRROR_AUTO_ON 0x02

#define	QAM_LOCKRANGE__M 0x10

#define	QAM_LOCKRANGE_NORMAL 0x10

Functions
bool	IsA1WithPatchCode (struct drxk_state *state)

bool	IsA1WithRomCode (struct drxk_state *state)

	module_param (debug, int, 0644)

	MODULE_PARM_DESC (debug,"enable debug messages")

u32	Frac28a (u32 a, u32 c)

int	PowerUpDevice (struct drxk_state *state)

struct dvb_frontend *	drxk_attach (const struct drxk_config config, struct i2c_adapter i2c)

	EXPORT_SYMBOL (drxk_attach)

	MODULE_DESCRIPTION ("DRX-K driver")

	MODULE_AUTHOR ("Ralph Metzler")

	MODULE_LICENSE ("GPL")

Macro Definition Documentation

#define DEFAULT_DRXK_DEMOD_LOCK_TIMEOUT 500

Definition at line 95 of file drxk_hard.c.

#define DEFAULT_DRXK_MPEG_LOCK_TIMEOUT 700

Definition at line 94 of file drxk_hard.c.

#define DEFAULT_FR_THRES_8K 4000

Definition at line 3447 of file drxk_hard.c.

#define DEFAULT_MER_83 165

Definition at line 83 of file drxk_hard.c.

#define DEFAULT_MER_93 250

Definition at line 84 of file drxk_hard.c.

#define dprintk	(	level,
		fmt,
		arg...
	)

Value:

do {            \
if (debug >= level)                     \
    printk(KERN_DEBUG "drxk: %s" fmt, __func__, ## arg);    \
} while (0)

Definition at line 176 of file drxk_hard.c.

#define DRXDAP_FASI_ADDR2BANK ( addr ) (((addr) >> 16) & 0x3F)

Definition at line 2844 of file drxk_hard.c.

#define DRXDAP_FASI_ADDR2BLOCK ( addr ) (((addr) >> 22) & 0x3F)

Definition at line 2843 of file drxk_hard.c.

#define DRXDAP_FASI_ADDR2OFFSET ( addr ) ((addr) & 0x7FFF)

Definition at line 2845 of file drxk_hard.c.

#define DRXDAP_FASI_LONG_FORMAT ( addr ) (((addr) & 0xFC30FF80) != 0)

Definition at line 81 of file drxk_hard.c.

#define DRXDAP_FASI_SHORT_FORMAT ( addr ) (((addr) & 0xFC30FF80) == 0)

Definition at line 80 of file drxk_hard.c.

#define DRXK_AGC_DAC_OFFSET (0x800)

Definition at line 127 of file drxk_hard.c.

#define DRXK_BANDWIDTH_6MHZ_IN_HZ (0x68A1B6L)

Definition at line 139 of file drxk_hard.c.

#define DRXK_BANDWIDTH_7MHZ_IN_HZ (0x7A1200L)

Definition at line 135 of file drxk_hard.c.

#define DRXK_BANDWIDTH_8MHZ_IN_HZ (0x8B8249L)

Definition at line 131 of file drxk_hard.c.

#define DRXK_BL_ROM_OFFSET_TAPS_BG 24

Definition at line 149 of file drxk_hard.c.

#define DRXK_BL_ROM_OFFSET_TAPS_DKILLP 32

Definition at line 150 of file drxk_hard.c.

#define DRXK_BL_ROM_OFFSET_TAPS_DVBT 56

Definition at line 146 of file drxk_hard.c.

#define DRXK_BL_ROM_OFFSET_TAPS_FM 48

Definition at line 152 of file drxk_hard.c.

#define DRXK_BL_ROM_OFFSET_TAPS_ITU_A 64

Definition at line 147 of file drxk_hard.c.

#define DRXK_BL_ROM_OFFSET_TAPS_ITU_C 0x5FE0

Definition at line 148 of file drxk_hard.c.

#define DRXK_BL_ROM_OFFSET_TAPS_NTSC 40

Definition at line 151 of file drxk_hard.c.

#define DRXK_BL_ROM_OFFSET_UCODE 0

Definition at line 153 of file drxk_hard.c.

#define DRXK_BLC_TIMEOUT 100

Definition at line 155 of file drxk_hard.c.

#define DRXK_BLCC_NR_ELEMENTS_TAPS 2

Definition at line 157 of file drxk_hard.c.

#define DRXK_BLCC_NR_ELEMENTS_UCODE 6

Definition at line 158 of file drxk_hard.c.

#define DRXK_BLDC_NR_ELEMENTS_TAPS 28

Definition at line 160 of file drxk_hard.c.

#define DRXK_HI_ATOMIC_BUF_END (SIO_HI_RA_RAM_USR_BEGIN__A + 7)

Definition at line 2839 of file drxk_hard.c.

#define DRXK_HI_ATOMIC_BUF_START (SIO_HI_RA_RAM_USR_BEGIN__A)

Definition at line 2838 of file drxk_hard.c.

#define DRXK_HI_ATOMIC_READ SIO_HI_RA_RAM_PAR_3_ACP_RW_READ

Definition at line 2840 of file drxk_hard.c.

#define DRXK_HI_ATOMIC_WRITE SIO_HI_RA_RAM_PAR_3_ACP_RW_WRITE

Definition at line 2841 of file drxk_hard.c.

#define DRXK_KI_DAGC_ATV 7

Definition at line 104 of file drxk_hard.c.

#define DRXK_KI_DAGC_DVBT (IsA1WithPatchCode(state) ? 10 : 7)

Definition at line 123 of file drxk_hard.c.

#define DRXK_KI_DAGC_QAM 7

Definition at line 114 of file drxk_hard.c.

#define DRXK_KI_IAGC_ATV 6

Definition at line 101 of file drxk_hard.c.

#define DRXK_KI_IAGC_DVBT (IsA1WithPatchCode(state) ? 4 : 2)

Definition at line 120 of file drxk_hard.c.

#define DRXK_KI_IAGC_QAM 4

Definition at line 111 of file drxk_hard.c.

#define DRXK_KI_RAGC_ATV 4

Definition at line 98 of file drxk_hard.c.

#define DRXK_KI_RAGC_DVBT (IsA1WithPatchCode(state) ? 3 : 2)

Definition at line 117 of file drxk_hard.c.

#define DRXK_KI_RAGC_QAM 3

Definition at line 108 of file drxk_hard.c.

#define DRXK_MAX_RETRIES_POWERUP 20

Definition at line 587 of file drxk_hard.c.

#define DRXK_MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH (0x03)

Definition at line 91 of file drxk_hard.c.

#define DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH (0x02)

Definition at line 87 of file drxk_hard.c.

#define DRXK_OFDM_NE_NOTCH_WIDTH (4)

Definition at line 163 of file drxk_hard.c.

#define DRXK_QAM_SL_SIG_POWER_QAM128 (20992)

Definition at line 169 of file drxk_hard.c.

#define DRXK_QAM_SL_SIG_POWER_QAM16 (40960)

Definition at line 166 of file drxk_hard.c.

#define DRXK_QAM_SL_SIG_POWER_QAM256 (43520)

Definition at line 170 of file drxk_hard.c.

#define DRXK_QAM_SL_SIG_POWER_QAM32 (20480)

Definition at line 167 of file drxk_hard.c.

#define DRXK_QAM_SL_SIG_POWER_QAM64 (43008)

Definition at line 168 of file drxk_hard.c.

#define DRXK_QAM_SYMBOLRATE_MAX (7233000)

Definition at line 143 of file drxk_hard.c.

#define NOA1ROM 0

Definition at line 78 of file drxk_hard.c.

#define QAM_LOCKRANGE__M 0x10

Definition at line 5415 of file drxk_hard.c.

#define QAM_LOCKRANGE_NORMAL 0x10

Definition at line 5416 of file drxk_hard.c.

#define QAM_MIRROR__M 0x03

Definition at line 5411 of file drxk_hard.c.

#define QAM_MIRROR_AUTO_ON 0x02

Definition at line 5414 of file drxk_hard.c.

#define QAM_MIRROR_NORMAL 0x00

Definition at line 5412 of file drxk_hard.c.

#define QAM_MIRRORED 0x01

Definition at line 5413 of file drxk_hard.c.

#define SCU_RAM_AGC_KI_INV_IF_POL__M 0x2000

Definition at line 2380 of file drxk_hard.c.

#define SCU_RAM_AGC_KI_INV_RF_POL__M 0x4000

Definition at line 2233 of file drxk_hard.c.

#define SIO_HI_RA_RAM_USR_BEGIN__A 0x420040

Definition at line 2835 of file drxk_hard.c.

#define SIO_HI_RA_RAM_USR_END__A 0x420060

Definition at line 2836 of file drxk_hard.c.

Function Documentation

struct dvb_frontend* drxk_attach	(	const struct drxk_config *	config,
		struct i2c_adapter *	i2c
	)

read

Definition at line 6552 of file drxk_hard.c.

EXPORT_SYMBOL ( drxk_attach )

u32 Frac28a	(	u32	a,
		u32	c
	)

inline

Definition at line 192 of file drxk_hard.c.

bool IsA1WithPatchCode ( struct drxk_state * state )

Definition at line 68 of file drxk_hard.c.

bool IsA1WithRomCode ( struct drxk_state * state )

Definition at line 73 of file drxk_hard.c.

MODULE_AUTHOR ( "Ralph Metzler" )

MODULE_DESCRIPTION ( "DRX-K driver" )

MODULE_LICENSE ( "GPL" )

module_param	(	debug	,
		int	,
		0644
	)

MODULE_PARM_DESC	(	debug	,
		"enable debug messages"
	)

int PowerUpDevice ( struct drxk_state * state )

Definition at line 590 of file drxk_hard.c.

Macros

Functions

Macro Definition Documentation

Function Documentation