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events.c
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1 /*
2  * Xen event channels
3  *
4  * Xen models interrupts with abstract event channels. Because each
5  * domain gets 1024 event channels, but NR_IRQ is not that large, we
6  * must dynamically map irqs<->event channels. The event channels
7  * interface with the rest of the kernel by defining a xen interrupt
8  * chip. When an event is received, it is mapped to an irq and sent
9  * through the normal interrupt processing path.
10  *
11  * There are four kinds of events which can be mapped to an event
12  * channel:
13  *
14  * 1. Inter-domain notifications. This includes all the virtual
15  * device events, since they're driven by front-ends in another domain
16  * (typically dom0).
17  * 2. VIRQs, typically used for timers. These are per-cpu events.
18  * 3. IPIs.
19  * 4. PIRQs - Hardware interrupts.
20  *
21  * Jeremy Fitzhardinge <[email protected]>, XenSource Inc, 2007
22  */
23 
24 #include <linux/linkage.h>
25 #include <linux/interrupt.h>
26 #include <linux/irq.h>
27 #include <linux/module.h>
28 #include <linux/string.h>
29 #include <linux/bootmem.h>
30 #include <linux/slab.h>
31 #include <linux/irqnr.h>
32 #include <linux/pci.h>
33 
34 #ifdef CONFIG_X86
35 #include <asm/desc.h>
36 #include <asm/ptrace.h>
37 #include <asm/irq.h>
38 #include <asm/idle.h>
39 #include <asm/io_apic.h>
40 #include <asm/xen/page.h>
41 #include <asm/xen/pci.h>
42 #endif
43 #include <asm/sync_bitops.h>
44 #include <asm/xen/hypercall.h>
45 #include <asm/xen/hypervisor.h>
46 
47 #include <xen/xen.h>
48 #include <xen/hvm.h>
49 #include <xen/xen-ops.h>
50 #include <xen/events.h>
51 #include <xen/interface/xen.h>
55 #include <xen/interface/physdev.h>
56 #include <xen/interface/sched.h>
57 #include <asm/hw_irq.h>
58 
59 /*
60  * This lock protects updates to the following mapping and reference-count
61  * arrays. The lock does not need to be acquired to read the mapping tables.
62  */
63 static DEFINE_MUTEX(irq_mapping_update_lock);
64 
65 static LIST_HEAD(xen_irq_list_head);
66 
67 /* IRQ <-> VIRQ mapping. */
68 static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
69 
70 /* IRQ <-> IPI mapping */
71 static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
72 
73 /* Interrupt types. */
80 };
81 
82 /*
83  * Packed IRQ information:
84  * type - enum xen_irq_type
85  * event channel - irq->event channel mapping
86  * cpu - cpu this event channel is bound to
87  * index - type-specific information:
88  * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
89  * guest, or GSI (real passthrough IRQ) of the device.
90  * VIRQ - virq number
91  * IPI - IPI vector
92  * EVTCHN -
93  */
94 struct irq_info {
95  struct list_head list;
96  int refcnt;
97  enum xen_irq_type type; /* type */
98  unsigned irq;
99  unsigned short evtchn; /* event channel */
100  unsigned short cpu; /* cpu bound */
101 
102  union {
103  unsigned short virq;
105  struct {
106  unsigned short pirq;
107  unsigned short gsi;
108  unsigned char vector;
109  unsigned char flags;
111  } pirq;
112  } u;
113 };
114 #define PIRQ_NEEDS_EOI (1 << 0)
115 #define PIRQ_SHAREABLE (1 << 1)
116 
117 static int *evtchn_to_irq;
118 #ifdef CONFIG_X86
119 static unsigned long *pirq_eoi_map;
120 #endif
121 static bool (*pirq_needs_eoi)(unsigned irq);
122 
123 static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
124  cpu_evtchn_mask);
125 
126 /* Xen will never allocate port zero for any purpose. */
127 #define VALID_EVTCHN(chn) ((chn) != 0)
128 
129 static struct irq_chip xen_dynamic_chip;
130 static struct irq_chip xen_percpu_chip;
131 static struct irq_chip xen_pirq_chip;
132 static void enable_dynirq(struct irq_data *data);
133 static void disable_dynirq(struct irq_data *data);
134 
135 /* Get info for IRQ */
136 static struct irq_info *info_for_irq(unsigned irq)
137 {
138  return irq_get_handler_data(irq);
139 }
140 
141 /* Constructors for packed IRQ information. */
142 static void xen_irq_info_common_init(struct irq_info *info,
143  unsigned irq,
144  enum xen_irq_type type,
145  unsigned short evtchn,
146  unsigned short cpu)
147 {
148 
149  BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
150 
151  info->type = type;
152  info->irq = irq;
153  info->evtchn = evtchn;
154  info->cpu = cpu;
155 
156  evtchn_to_irq[evtchn] = irq;
157 }
158 
159 static void xen_irq_info_evtchn_init(unsigned irq,
160  unsigned short evtchn)
161 {
162  struct irq_info *info = info_for_irq(irq);
163 
164  xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
165 }
166 
167 static void xen_irq_info_ipi_init(unsigned cpu,
168  unsigned irq,
169  unsigned short evtchn,
170  enum ipi_vector ipi)
171 {
172  struct irq_info *info = info_for_irq(irq);
173 
174  xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
175 
176  info->u.ipi = ipi;
177 
178  per_cpu(ipi_to_irq, cpu)[ipi] = irq;
179 }
180 
181 static void xen_irq_info_virq_init(unsigned cpu,
182  unsigned irq,
183  unsigned short evtchn,
184  unsigned short virq)
185 {
186  struct irq_info *info = info_for_irq(irq);
187 
188  xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
189 
190  info->u.virq = virq;
191 
192  per_cpu(virq_to_irq, cpu)[virq] = irq;
193 }
194 
195 static void xen_irq_info_pirq_init(unsigned irq,
196  unsigned short evtchn,
197  unsigned short pirq,
198  unsigned short gsi,
199  unsigned short vector,
200  uint16_t domid,
201  unsigned char flags)
202 {
203  struct irq_info *info = info_for_irq(irq);
204 
205  xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
206 
207  info->u.pirq.pirq = pirq;
208  info->u.pirq.gsi = gsi;
209  info->u.pirq.vector = vector;
210  info->u.pirq.domid = domid;
211  info->u.pirq.flags = flags;
212 }
213 
214 /*
215  * Accessors for packed IRQ information.
216  */
217 static unsigned int evtchn_from_irq(unsigned irq)
218 {
219  if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
220  return 0;
221 
222  return info_for_irq(irq)->evtchn;
223 }
224 
225 unsigned irq_from_evtchn(unsigned int evtchn)
226 {
227  return evtchn_to_irq[evtchn];
228 }
230 
231 static enum ipi_vector ipi_from_irq(unsigned irq)
232 {
233  struct irq_info *info = info_for_irq(irq);
234 
235  BUG_ON(info == NULL);
236  BUG_ON(info->type != IRQT_IPI);
237 
238  return info->u.ipi;
239 }
240 
241 static unsigned virq_from_irq(unsigned irq)
242 {
243  struct irq_info *info = info_for_irq(irq);
244 
245  BUG_ON(info == NULL);
246  BUG_ON(info->type != IRQT_VIRQ);
247 
248  return info->u.virq;
249 }
250 
251 static unsigned pirq_from_irq(unsigned irq)
252 {
253  struct irq_info *info = info_for_irq(irq);
254 
255  BUG_ON(info == NULL);
256  BUG_ON(info->type != IRQT_PIRQ);
257 
258  return info->u.pirq.pirq;
259 }
260 
261 static enum xen_irq_type type_from_irq(unsigned irq)
262 {
263  return info_for_irq(irq)->type;
264 }
265 
266 static unsigned cpu_from_irq(unsigned irq)
267 {
268  return info_for_irq(irq)->cpu;
269 }
270 
271 static unsigned int cpu_from_evtchn(unsigned int evtchn)
272 {
273  int irq = evtchn_to_irq[evtchn];
274  unsigned ret = 0;
275 
276  if (irq != -1)
277  ret = cpu_from_irq(irq);
278 
279  return ret;
280 }
281 
282 #ifdef CONFIG_X86
283 static bool pirq_check_eoi_map(unsigned irq)
284 {
285  return test_bit(pirq_from_irq(irq), pirq_eoi_map);
286 }
287 #endif
288 
289 static bool pirq_needs_eoi_flag(unsigned irq)
290 {
291  struct irq_info *info = info_for_irq(irq);
292  BUG_ON(info->type != IRQT_PIRQ);
293 
294  return info->u.pirq.flags & PIRQ_NEEDS_EOI;
295 }
296 
297 static inline unsigned long active_evtchns(unsigned int cpu,
298  struct shared_info *sh,
299  unsigned int idx)
300 {
301  return sh->evtchn_pending[idx] &
302  per_cpu(cpu_evtchn_mask, cpu)[idx] &
303  ~sh->evtchn_mask[idx];
304 }
305 
306 static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
307 {
308  int irq = evtchn_to_irq[chn];
309 
310  BUG_ON(irq == -1);
311 #ifdef CONFIG_SMP
312  cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
313 #endif
314 
315  clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
316  set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
317 
318  info_for_irq(irq)->cpu = cpu;
319 }
320 
321 static void init_evtchn_cpu_bindings(void)
322 {
323  int i;
324 #ifdef CONFIG_SMP
325  struct irq_info *info;
326 
327  /* By default all event channels notify CPU#0. */
328  list_for_each_entry(info, &xen_irq_list_head, list) {
329  struct irq_desc *desc = irq_to_desc(info->irq);
330  cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
331  }
332 #endif
333 
335  memset(per_cpu(cpu_evtchn_mask, i),
336  (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
337 }
338 
339 static inline void clear_evtchn(int port)
340 {
342  sync_clear_bit(port, &s->evtchn_pending[0]);
343 }
344 
345 static inline void set_evtchn(int port)
346 {
348  sync_set_bit(port, &s->evtchn_pending[0]);
349 }
350 
351 static inline int test_evtchn(int port)
352 {
354  return sync_test_bit(port, &s->evtchn_pending[0]);
355 }
356 
357 
367 {
368  int evtchn = evtchn_from_irq(irq);
369 
370  if (VALID_EVTCHN(evtchn))
371  notify_remote_via_evtchn(evtchn);
372 }
374 
375 static void mask_evtchn(int port)
376 {
378  sync_set_bit(port, &s->evtchn_mask[0]);
379 }
380 
381 static void unmask_evtchn(int port)
382 {
384  unsigned int cpu = get_cpu();
385  int do_hypercall = 0, evtchn_pending = 0;
386 
387  BUG_ON(!irqs_disabled());
388 
389  if (unlikely((cpu != cpu_from_evtchn(port))))
390  do_hypercall = 1;
391  else
393 
395  do_hypercall = 1;
396 
397  /* Slow path (hypercall) if this is a non-local port or if this is
398  * an hvm domain and an event is pending (hvm domains don't have
399  * their own implementation of irq_enable). */
400  if (do_hypercall) {
401  struct evtchn_unmask unmask = { .port = port };
403  } else {
404  struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
405 
406  sync_clear_bit(port, &s->evtchn_mask[0]);
407 
408  /*
409  * The following is basically the equivalent of
410  * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
411  * the interrupt edge' if the channel is masked.
412  */
413  if (evtchn_pending &&
415  &vcpu_info->evtchn_pending_sel))
416  vcpu_info->evtchn_upcall_pending = 1;
417  }
418 
419  put_cpu();
420 }
421 
422 static void xen_irq_init(unsigned irq)
423 {
424  struct irq_info *info;
425 #ifdef CONFIG_SMP
426  struct irq_desc *desc = irq_to_desc(irq);
427 
428  /* By default all event channels notify CPU#0. */
429  cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
430 #endif
431 
432  info = kzalloc(sizeof(*info), GFP_KERNEL);
433  if (info == NULL)
434  panic("Unable to allocate metadata for IRQ%d\n", irq);
435 
436  info->type = IRQT_UNBOUND;
437  info->refcnt = -1;
438 
439  irq_set_handler_data(irq, info);
440 
441  list_add_tail(&info->list, &xen_irq_list_head);
442 }
443 
444 static int __must_check xen_allocate_irq_dynamic(void)
445 {
446  int first = 0;
447  int irq;
448 
449 #ifdef CONFIG_X86_IO_APIC
450  /*
451  * For an HVM guest or domain 0 which see "real" (emulated or
452  * actual respectively) GSIs we allocate dynamic IRQs
453  * e.g. those corresponding to event channels or MSIs
454  * etc. from the range above those "real" GSIs to avoid
455  * collisions.
456  */
458  first = get_nr_irqs_gsi();
459 #endif
460 
461  irq = irq_alloc_desc_from(first, -1);
462 
463  if (irq >= 0)
464  xen_irq_init(irq);
465 
466  return irq;
467 }
468 
469 static int __must_check xen_allocate_irq_gsi(unsigned gsi)
470 {
471  int irq;
472 
473  /*
474  * A PV guest has no concept of a GSI (since it has no ACPI
475  * nor access to/knowledge of the physical APICs). Therefore
476  * all IRQs are dynamically allocated from the entire IRQ
477  * space.
478  */
479  if (xen_pv_domain() && !xen_initial_domain())
480  return xen_allocate_irq_dynamic();
481 
482  /* Legacy IRQ descriptors are already allocated by the arch. */
483  if (gsi < NR_IRQS_LEGACY)
484  irq = gsi;
485  else
486  irq = irq_alloc_desc_at(gsi, -1);
487 
488  xen_irq_init(irq);
489 
490  return irq;
491 }
492 
493 static void xen_free_irq(unsigned irq)
494 {
495  struct irq_info *info = irq_get_handler_data(irq);
496 
497  list_del(&info->list);
498 
500 
501  WARN_ON(info->refcnt > 0);
502 
503  kfree(info);
504 
505  /* Legacy IRQ descriptors are managed by the arch. */
506  if (irq < NR_IRQS_LEGACY)
507  return;
508 
509  irq_free_desc(irq);
510 }
511 
512 static void pirq_query_unmask(int irq)
513 {
514  struct physdev_irq_status_query irq_status;
515  struct irq_info *info = info_for_irq(irq);
516 
517  BUG_ON(info->type != IRQT_PIRQ);
518 
519  irq_status.irq = pirq_from_irq(irq);
521  irq_status.flags = 0;
522 
523  info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
524  if (irq_status.flags & XENIRQSTAT_needs_eoi)
525  info->u.pirq.flags |= PIRQ_NEEDS_EOI;
526 }
527 
528 static bool probing_irq(int irq)
529 {
530  struct irq_desc *desc = irq_to_desc(irq);
531 
532  return desc && desc->action == NULL;
533 }
534 
535 static void eoi_pirq(struct irq_data *data)
536 {
537  int evtchn = evtchn_from_irq(data->irq);
538  struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
539  int rc = 0;
540 
541  irq_move_irq(data);
542 
543  if (VALID_EVTCHN(evtchn))
544  clear_evtchn(evtchn);
545 
546  if (pirq_needs_eoi(data->irq)) {
548  WARN_ON(rc);
549  }
550 }
551 
552 static void mask_ack_pirq(struct irq_data *data)
553 {
554  disable_dynirq(data);
555  eoi_pirq(data);
556 }
557 
558 static unsigned int __startup_pirq(unsigned int irq)
559 {
560  struct evtchn_bind_pirq bind_pirq;
561  struct irq_info *info = info_for_irq(irq);
562  int evtchn = evtchn_from_irq(irq);
563  int rc;
564 
565  BUG_ON(info->type != IRQT_PIRQ);
566 
567  if (VALID_EVTCHN(evtchn))
568  goto out;
569 
570  bind_pirq.pirq = pirq_from_irq(irq);
571  /* NB. We are happy to share unless we are probing. */
572  bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
575  if (rc != 0) {
576  if (!probing_irq(irq))
577  printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
578  irq);
579  return 0;
580  }
581  evtchn = bind_pirq.port;
582 
583  pirq_query_unmask(irq);
584 
585  evtchn_to_irq[evtchn] = irq;
586  bind_evtchn_to_cpu(evtchn, 0);
587  info->evtchn = evtchn;
588 
589 out:
590  unmask_evtchn(evtchn);
591  eoi_pirq(irq_get_irq_data(irq));
592 
593  return 0;
594 }
595 
596 static unsigned int startup_pirq(struct irq_data *data)
597 {
598  return __startup_pirq(data->irq);
599 }
600 
601 static void shutdown_pirq(struct irq_data *data)
602 {
603  struct evtchn_close close;
604  unsigned int irq = data->irq;
605  struct irq_info *info = info_for_irq(irq);
606  int evtchn = evtchn_from_irq(irq);
607 
608  BUG_ON(info->type != IRQT_PIRQ);
609 
610  if (!VALID_EVTCHN(evtchn))
611  return;
612 
613  mask_evtchn(evtchn);
614 
615  close.port = evtchn;
617  BUG();
618 
619  bind_evtchn_to_cpu(evtchn, 0);
620  evtchn_to_irq[evtchn] = -1;
621  info->evtchn = 0;
622 }
623 
624 static void enable_pirq(struct irq_data *data)
625 {
626  startup_pirq(data);
627 }
628 
629 static void disable_pirq(struct irq_data *data)
630 {
631  disable_dynirq(data);
632 }
633 
634 int xen_irq_from_gsi(unsigned gsi)
635 {
636  struct irq_info *info;
637 
638  list_for_each_entry(info, &xen_irq_list_head, list) {
639  if (info->type != IRQT_PIRQ)
640  continue;
641 
642  if (info->u.pirq.gsi == gsi)
643  return info->irq;
644  }
645 
646  return -1;
647 }
649 
650 /*
651  * Do not make any assumptions regarding the relationship between the
652  * IRQ number returned here and the Xen pirq argument.
653  *
654  * Note: We don't assign an event channel until the irq actually started
655  * up. Return an existing irq if we've already got one for the gsi.
656  *
657  * Shareable implies level triggered, not shareable implies edge
658  * triggered here.
659  */
660 int xen_bind_pirq_gsi_to_irq(unsigned gsi,
661  unsigned pirq, int shareable, char *name)
662 {
663  int irq = -1;
664  struct physdev_irq irq_op;
665 
666  mutex_lock(&irq_mapping_update_lock);
667 
668  irq = xen_irq_from_gsi(gsi);
669  if (irq != -1) {
670  printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
671  irq, gsi);
672  goto out;
673  }
674 
675  irq = xen_allocate_irq_gsi(gsi);
676  if (irq < 0)
677  goto out;
678 
679  irq_op.irq = irq;
680  irq_op.vector = 0;
681 
682  /* Only the privileged domain can do this. For non-priv, the pcifront
683  * driver provides a PCI bus that does the call to do exactly
684  * this in the priv domain. */
685  if (xen_initial_domain() &&
687  xen_free_irq(irq);
688  irq = -ENOSPC;
689  goto out;
690  }
691 
692  xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
693  shareable ? PIRQ_SHAREABLE : 0);
694 
695  pirq_query_unmask(irq);
696  /* We try to use the handler with the appropriate semantic for the
697  * type of interrupt: if the interrupt is an edge triggered
698  * interrupt we use handle_edge_irq.
699  *
700  * On the other hand if the interrupt is level triggered we use
701  * handle_fasteoi_irq like the native code does for this kind of
702  * interrupts.
703  *
704  * Depending on the Xen version, pirq_needs_eoi might return true
705  * not only for level triggered interrupts but for edge triggered
706  * interrupts too. In any case Xen always honors the eoi mechanism,
707  * not injecting any more pirqs of the same kind if the first one
708  * hasn't received an eoi yet. Therefore using the fasteoi handler
709  * is the right choice either way.
710  */
711  if (shareable)
712  irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
713  handle_fasteoi_irq, name);
714  else
715  irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
716  handle_edge_irq, name);
717 
718 out:
719  mutex_unlock(&irq_mapping_update_lock);
720 
721  return irq;
722 }
723 
724 #ifdef CONFIG_PCI_MSI
725 int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
726 {
727  int rc;
728  struct physdev_get_free_pirq op_get_free_pirq;
729 
730  op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
731  rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
732 
733  WARN_ONCE(rc == -ENOSYS,
734  "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
735 
736  return rc ? -1 : op_get_free_pirq.pirq;
737 }
738 
739 int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
740  int pirq, int vector, const char *name,
741  domid_t domid)
742 {
743  int irq, ret;
744 
745  mutex_lock(&irq_mapping_update_lock);
746 
747  irq = xen_allocate_irq_dynamic();
748  if (irq < 0)
749  goto out;
750 
751  irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
752  name);
753 
754  xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
755  ret = irq_set_msi_desc(irq, msidesc);
756  if (ret < 0)
757  goto error_irq;
758 out:
759  mutex_unlock(&irq_mapping_update_lock);
760  return irq;
761 error_irq:
762  mutex_unlock(&irq_mapping_update_lock);
763  xen_free_irq(irq);
764  return ret;
765 }
766 #endif
767 
768 int xen_destroy_irq(int irq)
769 {
770  struct irq_desc *desc;
771  struct physdev_unmap_pirq unmap_irq;
772  struct irq_info *info = info_for_irq(irq);
773  int rc = -ENOENT;
774 
775  mutex_lock(&irq_mapping_update_lock);
776 
777  desc = irq_to_desc(irq);
778  if (!desc)
779  goto out;
780 
781  if (xen_initial_domain()) {
782  unmap_irq.pirq = info->u.pirq.pirq;
783  unmap_irq.domid = info->u.pirq.domid;
785  /* If another domain quits without making the pci_disable_msix
786  * call, the Xen hypervisor takes care of freeing the PIRQs
787  * (free_domain_pirqs).
788  */
789  if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
790  printk(KERN_INFO "domain %d does not have %d anymore\n",
791  info->u.pirq.domid, info->u.pirq.pirq);
792  else if (rc) {
793  printk(KERN_WARNING "unmap irq failed %d\n", rc);
794  goto out;
795  }
796  }
797 
798  xen_free_irq(irq);
799 
800 out:
801  mutex_unlock(&irq_mapping_update_lock);
802  return rc;
803 }
804 
805 int xen_irq_from_pirq(unsigned pirq)
806 {
807  int irq;
808 
809  struct irq_info *info;
810 
811  mutex_lock(&irq_mapping_update_lock);
812 
813  list_for_each_entry(info, &xen_irq_list_head, list) {
814  if (info->type != IRQT_PIRQ)
815  continue;
816  irq = info->irq;
817  if (info->u.pirq.pirq == pirq)
818  goto out;
819  }
820  irq = -1;
821 out:
822  mutex_unlock(&irq_mapping_update_lock);
823 
824  return irq;
825 }
826 
827 
828 int xen_pirq_from_irq(unsigned irq)
829 {
830  return pirq_from_irq(irq);
831 }
833 int bind_evtchn_to_irq(unsigned int evtchn)
834 {
835  int irq;
836 
837  mutex_lock(&irq_mapping_update_lock);
838 
839  irq = evtchn_to_irq[evtchn];
840 
841  if (irq == -1) {
842  irq = xen_allocate_irq_dynamic();
843  if (irq == -1)
844  goto out;
845 
846  irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
847  handle_edge_irq, "event");
848 
849  xen_irq_info_evtchn_init(irq, evtchn);
850  } else {
851  struct irq_info *info = info_for_irq(irq);
852  WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
853  }
854  irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
855 
856 out:
857  mutex_unlock(&irq_mapping_update_lock);
858 
859  return irq;
860 }
862 
863 static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
864 {
865  struct evtchn_bind_ipi bind_ipi;
866  int evtchn, irq;
867 
868  mutex_lock(&irq_mapping_update_lock);
869 
870  irq = per_cpu(ipi_to_irq, cpu)[ipi];
871 
872  if (irq == -1) {
873  irq = xen_allocate_irq_dynamic();
874  if (irq < 0)
875  goto out;
876 
877  irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
878  handle_percpu_irq, "ipi");
879 
880  bind_ipi.vcpu = cpu;
882  &bind_ipi) != 0)
883  BUG();
884  evtchn = bind_ipi.port;
885 
886  xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
887 
888  bind_evtchn_to_cpu(evtchn, cpu);
889  } else {
890  struct irq_info *info = info_for_irq(irq);
891  WARN_ON(info == NULL || info->type != IRQT_IPI);
892  }
893 
894  out:
895  mutex_unlock(&irq_mapping_update_lock);
896  return irq;
897 }
898 
899 static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
900  unsigned int remote_port)
901 {
902  struct evtchn_bind_interdomain bind_interdomain;
903  int err;
904 
905  bind_interdomain.remote_dom = remote_domain;
906  bind_interdomain.remote_port = remote_port;
907 
909  &bind_interdomain);
910 
911  return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
912 }
913 
914 static int find_virq(unsigned int virq, unsigned int cpu)
915 {
916  struct evtchn_status status;
917  int port, rc = -ENOENT;
918 
919  memset(&status, 0, sizeof(status));
920  for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
921  status.dom = DOMID_SELF;
922  status.port = port;
924  if (rc < 0)
925  continue;
926  if (status.status != EVTCHNSTAT_virq)
927  continue;
928  if (status.u.virq == virq && status.vcpu == cpu) {
929  rc = port;
930  break;
931  }
932  }
933  return rc;
934 }
935 
936 int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
937 {
938  struct evtchn_bind_virq bind_virq;
939  int evtchn, irq, ret;
940 
941  mutex_lock(&irq_mapping_update_lock);
942 
943  irq = per_cpu(virq_to_irq, cpu)[virq];
944 
945  if (irq == -1) {
946  irq = xen_allocate_irq_dynamic();
947  if (irq == -1)
948  goto out;
949 
950  irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
951  handle_percpu_irq, "virq");
952 
953  bind_virq.virq = virq;
954  bind_virq.vcpu = cpu;
956  &bind_virq);
957  if (ret == 0)
958  evtchn = bind_virq.port;
959  else {
960  if (ret == -EEXIST)
961  ret = find_virq(virq, cpu);
962  BUG_ON(ret < 0);
963  evtchn = ret;
964  }
965 
966  xen_irq_info_virq_init(cpu, irq, evtchn, virq);
967 
968  bind_evtchn_to_cpu(evtchn, cpu);
969  } else {
970  struct irq_info *info = info_for_irq(irq);
971  WARN_ON(info == NULL || info->type != IRQT_VIRQ);
972  }
973 
974 out:
975  mutex_unlock(&irq_mapping_update_lock);
976 
977  return irq;
978 }
979 
980 static void unbind_from_irq(unsigned int irq)
981 {
982  struct evtchn_close close;
983  int evtchn = evtchn_from_irq(irq);
984  struct irq_info *info = irq_get_handler_data(irq);
985 
986  mutex_lock(&irq_mapping_update_lock);
987 
988  if (info->refcnt > 0) {
989  info->refcnt--;
990  if (info->refcnt != 0)
991  goto done;
992  }
993 
994  if (VALID_EVTCHN(evtchn)) {
995  close.port = evtchn;
997  BUG();
998 
999  switch (type_from_irq(irq)) {
1000  case IRQT_VIRQ:
1001  per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
1002  [virq_from_irq(irq)] = -1;
1003  break;
1004  case IRQT_IPI:
1005  per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
1006  [ipi_from_irq(irq)] = -1;
1007  break;
1008  default:
1009  break;
1010  }
1011 
1012  /* Closed ports are implicitly re-bound to VCPU0. */
1013  bind_evtchn_to_cpu(evtchn, 0);
1014 
1015  evtchn_to_irq[evtchn] = -1;
1016  }
1017 
1018  BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
1019 
1020  xen_free_irq(irq);
1021 
1022  done:
1023  mutex_unlock(&irq_mapping_update_lock);
1024 }
1025 
1026 int bind_evtchn_to_irqhandler(unsigned int evtchn,
1027  irq_handler_t handler,
1028  unsigned long irqflags,
1029  const char *devname, void *dev_id)
1030 {
1031  int irq, retval;
1032 
1033  irq = bind_evtchn_to_irq(evtchn);
1034  if (irq < 0)
1035  return irq;
1036  retval = request_irq(irq, handler, irqflags, devname, dev_id);
1037  if (retval != 0) {
1038  unbind_from_irq(irq);
1039  return retval;
1040  }
1041 
1042  return irq;
1043 }
1045 
1046 int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
1047  unsigned int remote_port,
1048  irq_handler_t handler,
1049  unsigned long irqflags,
1050  const char *devname,
1051  void *dev_id)
1052 {
1053  int irq, retval;
1054 
1055  irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
1056  if (irq < 0)
1057  return irq;
1058 
1059  retval = request_irq(irq, handler, irqflags, devname, dev_id);
1060  if (retval != 0) {
1061  unbind_from_irq(irq);
1062  return retval;
1063  }
1064 
1065  return irq;
1066 }
1068 
1069 int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
1070  irq_handler_t handler,
1071  unsigned long irqflags, const char *devname, void *dev_id)
1072 {
1073  int irq, retval;
1074 
1075  irq = bind_virq_to_irq(virq, cpu);
1076  if (irq < 0)
1077  return irq;
1078  retval = request_irq(irq, handler, irqflags, devname, dev_id);
1079  if (retval != 0) {
1080  unbind_from_irq(irq);
1081  return retval;
1082  }
1083 
1084  return irq;
1085 }
1087 
1089  unsigned int cpu,
1090  irq_handler_t handler,
1091  unsigned long irqflags,
1092  const char *devname,
1093  void *dev_id)
1094 {
1095  int irq, retval;
1096 
1097  irq = bind_ipi_to_irq(ipi, cpu);
1098  if (irq < 0)
1099  return irq;
1100 
1102  retval = request_irq(irq, handler, irqflags, devname, dev_id);
1103  if (retval != 0) {
1104  unbind_from_irq(irq);
1105  return retval;
1106  }
1107 
1108  return irq;
1109 }
1110 
1111 void unbind_from_irqhandler(unsigned int irq, void *dev_id)
1112 {
1113  free_irq(irq, dev_id);
1114  unbind_from_irq(irq);
1115 }
1117 
1118 int evtchn_make_refcounted(unsigned int evtchn)
1119 {
1120  int irq = evtchn_to_irq[evtchn];
1121  struct irq_info *info;
1122 
1123  if (irq == -1)
1124  return -ENOENT;
1125 
1126  info = irq_get_handler_data(irq);
1127 
1128  if (!info)
1129  return -ENOENT;
1130 
1131  WARN_ON(info->refcnt != -1);
1132 
1133  info->refcnt = 1;
1134 
1135  return 0;
1136 }
1138 
1139 int evtchn_get(unsigned int evtchn)
1140 {
1141  int irq;
1142  struct irq_info *info;
1143  int err = -ENOENT;
1144 
1145  if (evtchn >= NR_EVENT_CHANNELS)
1146  return -EINVAL;
1147 
1148  mutex_lock(&irq_mapping_update_lock);
1149 
1150  irq = evtchn_to_irq[evtchn];
1151  if (irq == -1)
1152  goto done;
1153 
1154  info = irq_get_handler_data(irq);
1155 
1156  if (!info)
1157  goto done;
1158 
1159  err = -EINVAL;
1160  if (info->refcnt <= 0)
1161  goto done;
1162 
1163  info->refcnt++;
1164  err = 0;
1165  done:
1166  mutex_unlock(&irq_mapping_update_lock);
1167 
1168  return err;
1169 }
1171 
1172 void evtchn_put(unsigned int evtchn)
1173 {
1174  int irq = evtchn_to_irq[evtchn];
1175  if (WARN_ON(irq == -1))
1176  return;
1177  unbind_from_irq(irq);
1178 }
1180 
1181 void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
1182 {
1183  int irq = per_cpu(ipi_to_irq, cpu)[vector];
1184  BUG_ON(irq < 0);
1185  notify_remote_via_irq(irq);
1186 }
1187 
1189 {
1190  struct shared_info *sh = HYPERVISOR_shared_info;
1191  int cpu = smp_processor_id();
1192  unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
1193  int i;
1194  unsigned long flags;
1195  static DEFINE_SPINLOCK(debug_lock);
1196  struct vcpu_info *v;
1197 
1198  spin_lock_irqsave(&debug_lock, flags);
1199 
1200  printk("\nvcpu %d\n ", cpu);
1201 
1202  for_each_online_cpu(i) {
1203  int pending;
1204  v = per_cpu(xen_vcpu, i);
1205  pending = (get_irq_regs() && i == cpu)
1206  ? xen_irqs_disabled(get_irq_regs())
1207  : v->evtchn_upcall_mask;
1208  printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
1209  pending, v->evtchn_upcall_pending,
1210  (int)(sizeof(v->evtchn_pending_sel)*2),
1211  v->evtchn_pending_sel);
1212  }
1213  v = per_cpu(xen_vcpu, cpu);
1214 
1215  printk("\npending:\n ");
1216  for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
1217  printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
1218  sh->evtchn_pending[i],
1219  i % 8 == 0 ? "\n " : " ");
1220  printk("\nglobal mask:\n ");
1221  for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
1222  printk("%0*lx%s",
1223  (int)(sizeof(sh->evtchn_mask[0])*2),
1224  sh->evtchn_mask[i],
1225  i % 8 == 0 ? "\n " : " ");
1226 
1227  printk("\nglobally unmasked:\n ");
1228  for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
1229  printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
1230  sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
1231  i % 8 == 0 ? "\n " : " ");
1232 
1233  printk("\nlocal cpu%d mask:\n ", cpu);
1234  for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
1235  printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
1236  cpu_evtchn[i],
1237  i % 8 == 0 ? "\n " : " ");
1238 
1239  printk("\nlocally unmasked:\n ");
1240  for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
1241  unsigned long pending = sh->evtchn_pending[i]
1242  & ~sh->evtchn_mask[i]
1243  & cpu_evtchn[i];
1244  printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
1245  pending, i % 8 == 0 ? "\n " : " ");
1246  }
1247 
1248  printk("\npending list:\n");
1249  for (i = 0; i < NR_EVENT_CHANNELS; i++) {
1250  if (sync_test_bit(i, sh->evtchn_pending)) {
1251  int word_idx = i / BITS_PER_LONG;
1252  printk(" %d: event %d -> irq %d%s%s%s\n",
1253  cpu_from_evtchn(i), i,
1254  evtchn_to_irq[i],
1255  sync_test_bit(word_idx, &v->evtchn_pending_sel)
1256  ? "" : " l2-clear",
1257  !sync_test_bit(i, sh->evtchn_mask)
1258  ? "" : " globally-masked",
1259  sync_test_bit(i, cpu_evtchn)
1260  ? "" : " locally-masked");
1261  }
1262  }
1263 
1264  spin_unlock_irqrestore(&debug_lock, flags);
1265 
1266  return IRQ_HANDLED;
1267 }
1268 
1269 static DEFINE_PER_CPU(unsigned, xed_nesting_count);
1270 static DEFINE_PER_CPU(unsigned int, current_word_idx);
1271 static DEFINE_PER_CPU(unsigned int, current_bit_idx);
1272 
1273 /*
1274  * Mask out the i least significant bits of w
1275  */
1276 #define MASK_LSBS(w, i) (w & ((~0UL) << i))
1277 
1278 /*
1279  * Search the CPUs pending events bitmasks. For each one found, map
1280  * the event number to an irq, and feed it into do_IRQ() for
1281  * handling.
1282  *
1283  * Xen uses a two-level bitmap to speed searching. The first level is
1284  * a bitset of words which contain pending event bits. The second
1285  * level is a bitset of pending events themselves.
1286  */
1287 static void __xen_evtchn_do_upcall(void)
1288 {
1289  int start_word_idx, start_bit_idx;
1290  int word_idx, bit_idx;
1291  int i;
1292  int cpu = get_cpu();
1293  struct shared_info *s = HYPERVISOR_shared_info;
1294  struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
1295  unsigned count;
1296 
1297  do {
1298  unsigned long pending_words;
1299 
1300  vcpu_info->evtchn_upcall_pending = 0;
1301 
1302  if (__this_cpu_inc_return(xed_nesting_count) - 1)
1303  goto out;
1304 
1305 #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
1306  /* Clear master flag /before/ clearing selector flag. */
1307  wmb();
1308 #endif
1309  pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
1310 
1311  start_word_idx = __this_cpu_read(current_word_idx);
1312  start_bit_idx = __this_cpu_read(current_bit_idx);
1313 
1314  word_idx = start_word_idx;
1315 
1316  for (i = 0; pending_words != 0; i++) {
1317  unsigned long pending_bits;
1318  unsigned long words;
1319 
1320  words = MASK_LSBS(pending_words, word_idx);
1321 
1322  /*
1323  * If we masked out all events, wrap to beginning.
1324  */
1325  if (words == 0) {
1326  word_idx = 0;
1327  bit_idx = 0;
1328  continue;
1329  }
1330  word_idx = __ffs(words);
1331 
1332  pending_bits = active_evtchns(cpu, s, word_idx);
1333  bit_idx = 0; /* usually scan entire word from start */
1334  if (word_idx == start_word_idx) {
1335  /* We scan the starting word in two parts */
1336  if (i == 0)
1337  /* 1st time: start in the middle */
1338  bit_idx = start_bit_idx;
1339  else
1340  /* 2nd time: mask bits done already */
1341  bit_idx &= (1UL << start_bit_idx) - 1;
1342  }
1343 
1344  do {
1345  unsigned long bits;
1346  int port, irq;
1347  struct irq_desc *desc;
1348 
1349  bits = MASK_LSBS(pending_bits, bit_idx);
1350 
1351  /* If we masked out all events, move on. */
1352  if (bits == 0)
1353  break;
1354 
1355  bit_idx = __ffs(bits);
1356 
1357  /* Process port. */
1358  port = (word_idx * BITS_PER_LONG) + bit_idx;
1359  irq = evtchn_to_irq[port];
1360 
1361  if (irq != -1) {
1362  desc = irq_to_desc(irq);
1363  if (desc)
1364  generic_handle_irq_desc(irq, desc);
1365  }
1366 
1367  bit_idx = (bit_idx + 1) % BITS_PER_LONG;
1368 
1369  /* Next caller starts at last processed + 1 */
1370  __this_cpu_write(current_word_idx,
1371  bit_idx ? word_idx :
1372  (word_idx+1) % BITS_PER_LONG);
1373  __this_cpu_write(current_bit_idx, bit_idx);
1374  } while (bit_idx != 0);
1375 
1376  /* Scan start_l1i twice; all others once. */
1377  if ((word_idx != start_word_idx) || (i != 0))
1378  pending_words &= ~(1UL << word_idx);
1379 
1380  word_idx = (word_idx + 1) % BITS_PER_LONG;
1381  }
1382 
1383  BUG_ON(!irqs_disabled());
1384 
1385  count = __this_cpu_read(xed_nesting_count);
1386  __this_cpu_write(xed_nesting_count, 0);
1387  } while (count != 1 || vcpu_info->evtchn_upcall_pending);
1388 
1389 out:
1390 
1391  put_cpu();
1392 }
1393 
1395 {
1396  struct pt_regs *old_regs = set_irq_regs(regs);
1397 
1398  irq_enter();
1399 #ifdef CONFIG_X86
1400  exit_idle();
1401 #endif
1402 
1403  __xen_evtchn_do_upcall();
1404 
1405  irq_exit();
1406  set_irq_regs(old_regs);
1407 }
1408 
1410 {
1411  __xen_evtchn_do_upcall();
1412 }
1414 
1415 /* Rebind a new event channel to an existing irq. */
1416 void rebind_evtchn_irq(int evtchn, int irq)
1417 {
1418  struct irq_info *info = info_for_irq(irq);
1419 
1420  /* Make sure the irq is masked, since the new event channel
1421  will also be masked. */
1422  disable_irq(irq);
1423 
1424  mutex_lock(&irq_mapping_update_lock);
1425 
1426  /* After resume the irq<->evtchn mappings are all cleared out */
1427  BUG_ON(evtchn_to_irq[evtchn] != -1);
1428  /* Expect irq to have been bound before,
1429  so there should be a proper type */
1430  BUG_ON(info->type == IRQT_UNBOUND);
1431 
1432  xen_irq_info_evtchn_init(irq, evtchn);
1433 
1434  mutex_unlock(&irq_mapping_update_lock);
1435 
1436  /* new event channels are always bound to cpu 0 */
1437  irq_set_affinity(irq, cpumask_of(0));
1438 
1439  /* Unmask the event channel. */
1440  enable_irq(irq);
1441 }
1442 
1443 /* Rebind an evtchn so that it gets delivered to a specific cpu */
1444 static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
1445 {
1446  struct evtchn_bind_vcpu bind_vcpu;
1447  int evtchn = evtchn_from_irq(irq);
1448 
1449  if (!VALID_EVTCHN(evtchn))
1450  return -1;
1451 
1452  /*
1453  * Events delivered via platform PCI interrupts are always
1454  * routed to vcpu 0 and hence cannot be rebound.
1455  */
1457  return -1;
1458 
1459  /* Send future instances of this interrupt to other vcpu. */
1460  bind_vcpu.port = evtchn;
1461  bind_vcpu.vcpu = tcpu;
1462 
1463  /*
1464  * If this fails, it usually just indicates that we're dealing with a
1465  * virq or IPI channel, which don't actually need to be rebound. Ignore
1466  * it, but don't do the xenlinux-level rebind in that case.
1467  */
1468  if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
1469  bind_evtchn_to_cpu(evtchn, tcpu);
1470 
1471  return 0;
1472 }
1473 
1474 static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
1475  bool force)
1476 {
1477  unsigned tcpu = cpumask_first(dest);
1478 
1479  return rebind_irq_to_cpu(data->irq, tcpu);
1480 }
1481 
1482 int resend_irq_on_evtchn(unsigned int irq)
1483 {
1484  int masked, evtchn = evtchn_from_irq(irq);
1485  struct shared_info *s = HYPERVISOR_shared_info;
1486 
1487  if (!VALID_EVTCHN(evtchn))
1488  return 1;
1489 
1490  masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
1491  sync_set_bit(evtchn, s->evtchn_pending);
1492  if (!masked)
1493  unmask_evtchn(evtchn);
1494 
1495  return 1;
1496 }
1497 
1498 static void enable_dynirq(struct irq_data *data)
1499 {
1500  int evtchn = evtchn_from_irq(data->irq);
1501 
1502  if (VALID_EVTCHN(evtchn))
1503  unmask_evtchn(evtchn);
1504 }
1505 
1506 static void disable_dynirq(struct irq_data *data)
1507 {
1508  int evtchn = evtchn_from_irq(data->irq);
1509 
1510  if (VALID_EVTCHN(evtchn))
1511  mask_evtchn(evtchn);
1512 }
1513 
1514 static void ack_dynirq(struct irq_data *data)
1515 {
1516  int evtchn = evtchn_from_irq(data->irq);
1517 
1518  irq_move_irq(data);
1519 
1520  if (VALID_EVTCHN(evtchn))
1521  clear_evtchn(evtchn);
1522 }
1523 
1524 static void mask_ack_dynirq(struct irq_data *data)
1525 {
1526  disable_dynirq(data);
1527  ack_dynirq(data);
1528 }
1529 
1530 static int retrigger_dynirq(struct irq_data *data)
1531 {
1532  int evtchn = evtchn_from_irq(data->irq);
1533  struct shared_info *sh = HYPERVISOR_shared_info;
1534  int ret = 0;
1535 
1536  if (VALID_EVTCHN(evtchn)) {
1537  int masked;
1538 
1539  masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
1540  sync_set_bit(evtchn, sh->evtchn_pending);
1541  if (!masked)
1542  unmask_evtchn(evtchn);
1543  ret = 1;
1544  }
1545 
1546  return ret;
1547 }
1548 
1549 static void restore_pirqs(void)
1550 {
1551  int pirq, rc, irq, gsi;
1552  struct physdev_map_pirq map_irq;
1553  struct irq_info *info;
1554 
1555  list_for_each_entry(info, &xen_irq_list_head, list) {
1556  if (info->type != IRQT_PIRQ)
1557  continue;
1558 
1559  pirq = info->u.pirq.pirq;
1560  gsi = info->u.pirq.gsi;
1561  irq = info->irq;
1562 
1563  /* save/restore of PT devices doesn't work, so at this point the
1564  * only devices present are GSI based emulated devices */
1565  if (!gsi)
1566  continue;
1567 
1568  map_irq.domid = DOMID_SELF;
1569  map_irq.type = MAP_PIRQ_TYPE_GSI;
1570  map_irq.index = gsi;
1571  map_irq.pirq = pirq;
1572 
1573  rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
1574  if (rc) {
1575  printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
1576  gsi, irq, pirq, rc);
1577  xen_free_irq(irq);
1578  continue;
1579  }
1580 
1581  printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
1582 
1583  __startup_pirq(irq);
1584  }
1585 }
1586 
1587 static void restore_cpu_virqs(unsigned int cpu)
1588 {
1589  struct evtchn_bind_virq bind_virq;
1590  int virq, irq, evtchn;
1591 
1592  for (virq = 0; virq < NR_VIRQS; virq++) {
1593  if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
1594  continue;
1595 
1596  BUG_ON(virq_from_irq(irq) != virq);
1597 
1598  /* Get a new binding from Xen. */
1599  bind_virq.virq = virq;
1600  bind_virq.vcpu = cpu;
1602  &bind_virq) != 0)
1603  BUG();
1604  evtchn = bind_virq.port;
1605 
1606  /* Record the new mapping. */
1607  xen_irq_info_virq_init(cpu, irq, evtchn, virq);
1608  bind_evtchn_to_cpu(evtchn, cpu);
1609  }
1610 }
1611 
1612 static void restore_cpu_ipis(unsigned int cpu)
1613 {
1614  struct evtchn_bind_ipi bind_ipi;
1615  int ipi, irq, evtchn;
1616 
1617  for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
1618  if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
1619  continue;
1620 
1621  BUG_ON(ipi_from_irq(irq) != ipi);
1622 
1623  /* Get a new binding from Xen. */
1624  bind_ipi.vcpu = cpu;
1626  &bind_ipi) != 0)
1627  BUG();
1628  evtchn = bind_ipi.port;
1629 
1630  /* Record the new mapping. */
1631  xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
1632  bind_evtchn_to_cpu(evtchn, cpu);
1633  }
1634 }
1635 
1636 /* Clear an irq's pending state, in preparation for polling on it */
1638 {
1639  int evtchn = evtchn_from_irq(irq);
1640 
1641  if (VALID_EVTCHN(evtchn))
1642  clear_evtchn(evtchn);
1643 }
1645 void xen_set_irq_pending(int irq)
1646 {
1647  int evtchn = evtchn_from_irq(irq);
1648 
1649  if (VALID_EVTCHN(evtchn))
1650  set_evtchn(evtchn);
1651 }
1652 
1654 {
1655  int evtchn = evtchn_from_irq(irq);
1656  bool ret = false;
1657 
1658  if (VALID_EVTCHN(evtchn))
1659  ret = test_evtchn(evtchn);
1660 
1661  return ret;
1662 }
1663 
1664 /* Poll waiting for an irq to become pending with timeout. In the usual case,
1665  * the irq will be disabled so it won't deliver an interrupt. */
1666 void xen_poll_irq_timeout(int irq, u64 timeout)
1667 {
1668  evtchn_port_t evtchn = evtchn_from_irq(irq);
1669 
1670  if (VALID_EVTCHN(evtchn)) {
1671  struct sched_poll poll;
1672 
1673  poll.nr_ports = 1;
1674  poll.timeout = timeout;
1675  set_xen_guest_handle(poll.ports, &evtchn);
1676 
1677  if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
1678  BUG();
1679  }
1680 }
1682 /* Poll waiting for an irq to become pending. In the usual case, the
1683  * irq will be disabled so it won't deliver an interrupt. */
1684 void xen_poll_irq(int irq)
1685 {
1686  xen_poll_irq_timeout(irq, 0 /* no timeout */);
1687 }
1688 
1689 /* Check whether the IRQ line is shared with other guests. */
1691 {
1692  struct irq_info *info = info_for_irq(irq);
1693  struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
1694 
1696  return 0;
1697  return !(irq_status.flags & XENIRQSTAT_shared);
1698 }
1700 
1701 void xen_irq_resume(void)
1702 {
1703  unsigned int cpu, evtchn;
1704  struct irq_info *info;
1705 
1706  init_evtchn_cpu_bindings();
1707 
1708  /* New event-channel space is not 'live' yet. */
1709  for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1710  mask_evtchn(evtchn);
1711 
1712  /* No IRQ <-> event-channel mappings. */
1713  list_for_each_entry(info, &xen_irq_list_head, list)
1714  info->evtchn = 0; /* zap event-channel binding */
1715 
1716  for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1717  evtchn_to_irq[evtchn] = -1;
1718 
1719  for_each_possible_cpu(cpu) {
1720  restore_cpu_virqs(cpu);
1721  restore_cpu_ipis(cpu);
1722  }
1723 
1724  restore_pirqs();
1725 }
1726 
1727 static struct irq_chip xen_dynamic_chip __read_mostly = {
1728  .name = "xen-dyn",
1729 
1730  .irq_disable = disable_dynirq,
1731  .irq_mask = disable_dynirq,
1732  .irq_unmask = enable_dynirq,
1733 
1734  .irq_ack = ack_dynirq,
1735  .irq_mask_ack = mask_ack_dynirq,
1736 
1737  .irq_set_affinity = set_affinity_irq,
1738  .irq_retrigger = retrigger_dynirq,
1739 };
1740 
1741 static struct irq_chip xen_pirq_chip __read_mostly = {
1742  .name = "xen-pirq",
1743 
1744  .irq_startup = startup_pirq,
1745  .irq_shutdown = shutdown_pirq,
1746  .irq_enable = enable_pirq,
1747  .irq_disable = disable_pirq,
1748 
1749  .irq_mask = disable_dynirq,
1750  .irq_unmask = enable_dynirq,
1751 
1752  .irq_ack = eoi_pirq,
1753  .irq_eoi = eoi_pirq,
1754  .irq_mask_ack = mask_ack_pirq,
1755 
1756  .irq_set_affinity = set_affinity_irq,
1757 
1758  .irq_retrigger = retrigger_dynirq,
1759 };
1760 
1761 static struct irq_chip xen_percpu_chip __read_mostly = {
1762  .name = "xen-percpu",
1763 
1764  .irq_disable = disable_dynirq,
1765  .irq_mask = disable_dynirq,
1766  .irq_unmask = enable_dynirq,
1767 
1768  .irq_ack = ack_dynirq,
1769 };
1770 
1772 {
1773  struct xen_hvm_param a;
1774  a.domid = DOMID_SELF;
1776  a.value = via;
1777  return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
1778 }
1780 
1781 #ifdef CONFIG_XEN_PVHVM
1782 /* Vector callbacks are better than PCI interrupts to receive event
1783  * channel notifications because we can receive vector callbacks on any
1784  * vcpu and we don't need PCI support or APIC interactions. */
1785 void xen_callback_vector(void)
1786 {
1787  int rc;
1788  uint64_t callback_via;
1791  rc = xen_set_callback_via(callback_via);
1792  if (rc) {
1793  printk(KERN_ERR "Request for Xen HVM callback vector"
1794  " failed.\n");
1796  return;
1797  }
1798  printk(KERN_INFO "Xen HVM callback vector for event delivery is "
1799  "enabled\n");
1800  /* in the restore case the vector has already been allocated */
1801  if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
1803  }
1804 }
1805 #else
1806 void xen_callback_vector(void) {}
1807 #endif
1808 
1810 {
1811  int i;
1812 
1813  evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
1814  GFP_KERNEL);
1815  BUG_ON(!evtchn_to_irq);
1816  for (i = 0; i < NR_EVENT_CHANNELS; i++)
1817  evtchn_to_irq[i] = -1;
1818 
1819  init_evtchn_cpu_bindings();
1820 
1821  /* No event channels are 'live' right now. */
1822  for (i = 0; i < NR_EVENT_CHANNELS; i++)
1823  mask_evtchn(i);
1824 
1825  pirq_needs_eoi = pirq_needs_eoi_flag;
1826 
1827 #ifdef CONFIG_X86
1828  if (xen_hvm_domain()) {
1830  native_init_IRQ();
1831  /* pci_xen_hvm_init must be called after native_init_IRQ so that
1832  * __acpi_register_gsi can point at the right function */
1833  pci_xen_hvm_init();
1834  } else {
1835  int rc;
1836  struct physdev_pirq_eoi_gmfn eoi_gmfn;
1837 
1839  if (xen_initial_domain())
1840  pci_xen_initial_domain();
1841 
1842  pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
1843  eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
1845  if (rc != 0) {
1846  free_page((unsigned long) pirq_eoi_map);
1847  pirq_eoi_map = NULL;
1848  } else
1849  pirq_needs_eoi = pirq_check_eoi_map;
1850  }
1851 #endif
1852 }