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hcf.c
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1 /************************************************************************************************************
2  *
3  * FILE : HCF.C
4  *
5  * DATE : $Date: 2004/08/05 11:47:10 $ $Revision: 1.10 $
6  * Original: 2004/06/02 10:22:22 Revision: 1.85 Tag: hcf7_t20040602_01
7  * Original: 2004/04/15 09:24:41 Revision: 1.63 Tag: hcf7_t7_20040415_01
8  * Original: 2004/04/13 14:22:44 Revision: 1.62 Tag: t7_20040413_01
9  * Original: 2004/04/01 15:32:55 Revision: 1.59 Tag: t7_20040401_01
10  * Original: 2004/03/10 15:39:27 Revision: 1.55 Tag: t20040310_01
11  * Original: 2004/03/04 11:03:37 Revision: 1.53 Tag: t20040304_01
12  * Original: 2004/03/02 14:51:21 Revision: 1.50 Tag: t20040302_03
13  * Original: 2004/02/24 13:00:27 Revision: 1.43 Tag: t20040224_01
14  * Original: 2004/02/19 10:57:25 Revision: 1.39 Tag: t20040219_01
15  *
16  * AUTHOR : Nico Valster
17  *
18  * SPECIFICATION: ........
19  *
20  * DESCRIPTION : HCF Routines for Hermes-II (callable via the Wireless Connection I/F or WCI)
21  * Local Support Routines for above procedures
22  *
23  * Customizable via HCFCFG.H, which is included by HCF.H
24  *
25  *************************************************************************************************************
26  *
27  *
28  * SOFTWARE LICENSE
29  *
30  * This software is provided subject to the following terms and conditions,
31  * which you should read carefully before using the software. Using this
32  * software indicates your acceptance of these terms and conditions. If you do
33  * not agree with these terms and conditions, do not use the software.
34  *
35  * COPYRIGHT © 1994 - 1995 by AT&T. All Rights Reserved
36  * COPYRIGHT © 1996 - 2000 by Lucent Technologies. All Rights Reserved
37  * COPYRIGHT © 2001 - 2004 by Agere Systems Inc. All Rights Reserved
38  * All rights reserved.
39  *
40  * Redistribution and use in source or binary forms, with or without
41  * modifications, are permitted provided that the following conditions are met:
42  *
43  * . Redistributions of source code must retain the above copyright notice, this
44  * list of conditions and the following Disclaimer as comments in the code as
45  * well as in the documentation and/or other materials provided with the
46  * distribution.
47  *
48  * . Redistributions in binary form must reproduce the above copyright notice,
49  * this list of conditions and the following Disclaimer in the documentation
50  * and/or other materials provided with the distribution.
51  *
52  * . Neither the name of Agere Systems Inc. nor the names of the contributors
53  * may be used to endorse or promote products derived from this software
54  * without specific prior written permission.
55  *
56  * Disclaimer
57  *
58  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
59  * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
60  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
61  * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
62  * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
63  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
65  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
66  * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
68  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
69  * DAMAGE.
70  *
71  *
72  ************************************************************************************************************/
73 
74 
75 /************************************************************************************************************
76  **
77  ** Implementation Notes
78  **
79  * - a leading marker of //! is used. The purpose of such a sequence is to help to understand the flow
80  * An example is: //!rc = HCF_SUCCESS;
81  * if this is superfluous because rc is already guaranteed to be 0 but it shows to the (maintenance)
82  * programmer it is an intentional omission at the place where someone could consider it most appropriate at
83  * first glance
84  * - using near pointers in a model where ss!=ds is an invitation for disaster, so be aware of how you specify
85  * your model and how you define variables which are used at interrupt time
86  * - remember that sign extension on 32 bit platforms may cause problems unless code is carefully constructed,
87  * e.g. use "(hcf_16)~foo" rather than "~foo"
88  *
89  ************************************************************************************************************/
90 
91 #include "hcf.h" // HCF and MSF common include file
92 #include "hcfdef.h" // HCF specific include file
93 #include "mmd.h" // MoreModularDriver common include file
94 #include <linux/bug.h>
95 #include <linux/kernel.h>
96 
97 #if ! defined offsetof
98 #define offsetof(s,m) ((unsigned int)&(((s *)0)->m))
99 #endif // offsetof
100 
101 
102 /***********************************************************************************************************/
103 /*************************************** PROTOTYPES ******************************************************/
104 /***********************************************************************************************************/
105 HCF_STATIC int cmd_exe( IFBP ifbp, hcf_16 cmd_code, hcf_16 par_0 );
106 HCF_STATIC int init( IFBP ifbp );
107 HCF_STATIC int put_info( IFBP ifbp, LTVP ltvp );
108 HCF_STATIC int put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp );
109 #if (HCF_TYPE) & HCF_TYPE_WPA
110 HCF_STATIC void calc_mic( hcf_32* p, hcf_32 M );
111 void calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len );
112 void calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len );
113 HCF_STATIC int check_mic( IFBP ifbp );
114 #endif // HCF_TYPE_WPA
115 
116 HCF_STATIC void calibrate( IFBP ifbp );
117 HCF_STATIC int cmd_cmpl( IFBP ifbp );
118 HCF_STATIC hcf_16 get_fid( IFBP ifbp );
119 HCF_STATIC void isr_info( IFBP ifbp );
120 #if HCF_DMA
121 HCF_STATIC DESC_STRCT* get_frame_lst(IFBP ifbp, int tx_rx_flag);
122 #endif // HCF_DMA
123 HCF_STATIC void get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) ); //char*, byte count (usually even)
124 #if HCF_DMA
125 HCF_STATIC void put_frame_lst( IFBP ifbp, DESC_STRCT *descp, int tx_rx_flag );
126 #endif // HCF_DMA
127 HCF_STATIC void put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) );
128 HCF_STATIC void put_frag_finalize( IFBP ifbp );
129 HCF_STATIC int setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type );
130 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
131 static int fw_printf(IFBP ifbp, CFG_FW_PRINTF_STRCT FAR *ltvp);
132 #endif // HCF_ASSERT_PRINTF
133 
134 HCF_STATIC int download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp );
136 HCF_STATIC hcf_8 null_addr[4] = { 0, 0, 0, 0 };
137 #if ! defined IN_PORT_WORD //replace I/O Macros with logging facility
138 extern FILE *log_file;
139 
140 #define IN_PORT_WORD(port) in_port_word( (hcf_io)(port) )
141 
142 static hcf_16 in_port_word( hcf_io port ) {
143  hcf_16 i = (hcf_16)_inpw( port );
144  if ( log_file ) {
145  fprintf( log_file, "\nR %2.2x %4.4x", (port)&0xFF, i);
146  }
147  return i;
148 } // in_port_word
149 
150 #define OUT_PORT_WORD(port, value) out_port_word( (hcf_io)(port), (hcf_16)(value) )
151 
152 static void out_port_word( hcf_io port, hcf_16 value ) {
153  _outpw( port, value );
154  if ( log_file ) {
155  fprintf( log_file, "\nW %2.02x %4.04x", (port)&0xFF, value );
156  }
157 }
158 
159 void IN_PORT_STRING_32( hcf_io prt, hcf_32 FAR * dst, int n) {
160  int i = 0;
161  hcf_16 FAR * p;
162  if ( log_file ) {
163  fprintf( log_file, "\nread string_32 length %04x (%04d) at port %02.2x to addr %lp",
164  (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF, dst);
165  }
166  while ( n-- ) {
167  p = (hcf_16 FAR *)dst;
168  *p++ = (hcf_16)_inpw( prt );
169  *p = (hcf_16)_inpw( prt );
170  if ( log_file ) {
171  fprintf( log_file, "%s%08lx ", i++ % 0x08 ? " " : "\n", *dst);
172  }
173  dst++;
174  }
175 } // IN_PORT_STRING_32
176 
177 void IN_PORT_STRING_8_16( hcf_io prt, hcf_8 FAR * dst, int n) { //also handles byte alignment problems
178  hcf_16 FAR * p = (hcf_16 FAR *)dst; //this needs more elaborate code in non-x86 platforms
179  int i = 0;
180  if ( log_file ) {
181  fprintf( log_file, "\nread string_16 length %04x (%04d) at port %02.2x to addr %lp",
182  (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF, dst );
183  }
184  while ( n-- ) {
185  *p =(hcf_16)_inpw( prt);
186  if ( log_file ) {
187  if ( i++ % 0x10 ) {
188  fprintf( log_file, "%04x ", *p);
189  } else {
190  fprintf( log_file, "\n%04x ", *p);
191  }
192  }
193  p++;
194  }
195 } // IN_PORT_STRING_8_16
196 
197 void OUT_PORT_STRING_32( hcf_io prt, hcf_32 FAR * src, int n) {
198  int i = 0;
199  hcf_16 FAR * p;
200  if ( log_file ) {
201  fprintf( log_file, "\nwrite string_32 length %04x (%04d) at port %02.2x",
202  (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF);
203  }
204  while ( n-- ) {
205  p = (hcf_16 FAR *)src;
206  _outpw( prt, *p++ );
207  _outpw( prt, *p );
208  if ( log_file ) {
209  fprintf( log_file, "%s%08lx ", i++ % 0x08 ? " " : "\n", *src);
210  }
211  src++;
212  }
213 } // OUT_PORT_STRING_32
214 
215 void OUT_PORT_STRING_8_16( hcf_io prt, hcf_8 FAR * src, int n) { //also handles byte alignment problems
216  hcf_16 FAR * p = (hcf_16 FAR *)src; //this needs more elaborate code in non-x86 platforms
217  int i = 0;
218  if ( log_file ) {
219  fprintf( log_file, "\nwrite string_16 length %04x (%04d) at port %04x", n, n, (hcf_16)prt);
220  }
221  while ( n-- ) {
222  (void)_outpw( prt, *p);
223  if ( log_file ) {
224  if ( i++ % 0x10 ) {
225  fprintf( log_file, "%04x ", *p);
226  } else {
227  fprintf( log_file, "\n%04x ", *p);
228  }
229  }
230  p++;
231  }
232 } // OUT_PORT_STRING_8_16
233 
234 #endif // IN_PORT_WORD
235 
236 /************************************************************************************************************
237  ******************************* D A T A D E F I N I T I O N S ********************************************
238  ************************************************************************************************************/
239 
240 #if HCF_ASSERT
241 IFBP BASED assert_ifbp = NULL; //to make asserts easily work under MMD and DHF
242 #endif // HCF_ASSERT
243 
244 /* SNAP header to be inserted in Ethernet-II frames */
245 HCF_STATIC hcf_8 BASED snap_header[] = { 0xAA, 0xAA, 0x03, 0x00, 0x00, //5 bytes signature +
246  0 }; //1 byte protocol identifier
247 
248 #if (HCF_TYPE) & HCF_TYPE_WPA
249 HCF_STATIC hcf_8 BASED mic_pad[8] = { 0x5A, 0, 0, 0, 0, 0, 0, 0 }; //MIC padding of message
250 #endif // HCF_TYPE_WPA
251 
252 #if defined MSF_COMPONENT_ID
253 CFG_IDENTITY_STRCT BASED cfg_drv_identity = {
254  sizeof(cfg_drv_identity)/sizeof(hcf_16) - 1, //length of RID
255  CFG_DRV_IDENTITY, // (0x0826)
256  MSF_COMPONENT_ID,
257  MSF_COMPONENT_VAR,
258  MSF_COMPONENT_MAJOR_VER,
259  MSF_COMPONENT_MINOR_VER
260 } ;
261 
262 CFG_RANGES_STRCT BASED cfg_drv_sup_range = {
263  sizeof(cfg_drv_sup_range)/sizeof(hcf_16) - 1, //length of RID
264  CFG_DRV_SUP_RANGE, // (0x0827)
265 
267  COMP_ID_DUI,
268  {{ DUI_COMPAT_VAR,
269  DUI_COMPAT_BOT,
270  DUI_COMPAT_TOP
271  }}
272 } ;
273 
274 struct CFG_RANGE3_STRCT BASED cfg_drv_act_ranges_pri = {
275  sizeof(cfg_drv_act_ranges_pri)/sizeof(hcf_16) - 1, //length of RID
276  CFG_DRV_ACT_RANGES_PRI, // (0x0828)
277 
279  COMP_ID_PRI,
280  {
281  { 0, 0, 0 }, // HCF_PRI_VAR_1 not supported by HCF 7
282  { 0, 0, 0 }, // HCF_PRI_VAR_2 not supported by HCF 7
283  { 3, //var_rec[2] - Variant number
284  CFG_DRV_ACT_RANGES_PRI_3_BOTTOM, // - Bottom Compatibility
285  CFG_DRV_ACT_RANGES_PRI_3_TOP // - Top Compatibility
286  }
287  }
288 } ;
289 
290 
291 struct CFG_RANGE4_STRCT BASED cfg_drv_act_ranges_sta = {
292  sizeof(cfg_drv_act_ranges_sta)/sizeof(hcf_16) - 1, //length of RID
293  CFG_DRV_ACT_RANGES_STA, // (0x0829)
294 
296  COMP_ID_STA,
297  {
298 #if defined HCF_STA_VAR_1
299  { 1, //var_rec[1] - Variant number
300  CFG_DRV_ACT_RANGES_STA_1_BOTTOM, // - Bottom Compatibility
301  CFG_DRV_ACT_RANGES_STA_1_TOP // - Top Compatibility
302  },
303 #else
304  { 0, 0, 0 },
305 #endif // HCF_STA_VAR_1
306 #if defined HCF_STA_VAR_2
307  { 2, //var_rec[1] - Variant number
308  CFG_DRV_ACT_RANGES_STA_2_BOTTOM, // - Bottom Compatibility
309  CFG_DRV_ACT_RANGES_STA_2_TOP // - Top Compatibility
310  },
311 #else
312  { 0, 0, 0 },
313 #endif // HCF_STA_VAR_2
314 // For Native_USB (Not used!)
315 #if defined HCF_STA_VAR_3
316  { 3, //var_rec[1] - Variant number
317  CFG_DRV_ACT_RANGES_STA_3_BOTTOM, // - Bottom Compatibility
318  CFG_DRV_ACT_RANGES_STA_3_TOP // - Top Compatibility
319  },
320 #else
321  { 0, 0, 0 },
322 #endif // HCF_STA_VAR_3
323 // Warp
324 #if defined HCF_STA_VAR_4
325  { 4, //var_rec[1] - Variant number
326  CFG_DRV_ACT_RANGES_STA_4_BOTTOM, // - Bottom Compatibility
327  CFG_DRV_ACT_RANGES_STA_4_TOP // - Top Compatibility
328  }
329 #else
330  { 0, 0, 0 }
331 #endif // HCF_STA_VAR_4
332  }
333 } ;
334 
335 
336 struct CFG_RANGE6_STRCT BASED cfg_drv_act_ranges_hsi = {
337  sizeof(cfg_drv_act_ranges_hsi)/sizeof(hcf_16) - 1, //length of RID
338  CFG_DRV_ACT_RANGES_HSI, // (0x082A)
340  COMP_ID_HSI,
341  {
342 #if defined HCF_HSI_VAR_0 // Controlled deployment
343  { 0, // var_rec[1] - Variant number
344  CFG_DRV_ACT_RANGES_HSI_0_BOTTOM, // - Bottom Compatibility
345  CFG_DRV_ACT_RANGES_HSI_0_TOP // - Top Compatibility
346  },
347 #else
348  { 0, 0, 0 },
349 #endif // HCF_HSI_VAR_0
350  { 0, 0, 0 }, // HCF_HSI_VAR_1 not supported by HCF 7
351  { 0, 0, 0 }, // HCF_HSI_VAR_2 not supported by HCF 7
352  { 0, 0, 0 }, // HCF_HSI_VAR_3 not supported by HCF 7
353 #if defined HCF_HSI_VAR_4 // Hermes-II all types
354  { 4, // var_rec[1] - Variant number
355  CFG_DRV_ACT_RANGES_HSI_4_BOTTOM, // - Bottom Compatibility
356  CFG_DRV_ACT_RANGES_HSI_4_TOP // - Top Compatibility
357  },
358 #else
359  { 0, 0, 0 },
360 #endif // HCF_HSI_VAR_4
361 #if defined HCF_HSI_VAR_5 // WARP Hermes-2.5
362  { 5, // var_rec[1] - Variant number
363  CFG_DRV_ACT_RANGES_HSI_5_BOTTOM, // - Bottom Compatibility
364  CFG_DRV_ACT_RANGES_HSI_5_TOP // - Top Compatibility
365  }
366 #else
367  { 0, 0, 0 }
368 #endif // HCF_HSI_VAR_5
369  }
370 } ;
371 
372 
373 CFG_RANGE4_STRCT BASED cfg_drv_act_ranges_apf = {
374  sizeof(cfg_drv_act_ranges_apf)/sizeof(hcf_16) - 1, //length of RID
375  CFG_DRV_ACT_RANGES_APF, // (0x082B)
376 
378  COMP_ID_APF,
379  {
380 #if defined HCF_APF_VAR_1 //(Fake) Hermes-I
381  { 1, //var_rec[1] - Variant number
382  CFG_DRV_ACT_RANGES_APF_1_BOTTOM, // - Bottom Compatibility
383  CFG_DRV_ACT_RANGES_APF_1_TOP // - Top Compatibility
384  },
385 #else
386  { 0, 0, 0 },
387 #endif // HCF_APF_VAR_1
388 #if defined HCF_APF_VAR_2 //Hermes-II
389  { 2, // var_rec[1] - Variant number
390  CFG_DRV_ACT_RANGES_APF_2_BOTTOM, // - Bottom Compatibility
391  CFG_DRV_ACT_RANGES_APF_2_TOP // - Top Compatibility
392  },
393 #else
394  { 0, 0, 0 },
395 #endif // HCF_APF_VAR_2
396 #if defined HCF_APF_VAR_3 // Native_USB
397  { 3, // var_rec[1] - Variant number
398  CFG_DRV_ACT_RANGES_APF_3_BOTTOM, // - Bottom Compatibility !!!!!see note below!!!!!!!
399  CFG_DRV_ACT_RANGES_APF_3_TOP // - Top Compatibility
400  },
401 #else
402  { 0, 0, 0 },
403 #endif // HCF_APF_VAR_3
404 #if defined HCF_APF_VAR_4 // WARP Hermes 2.5
405  { 4, // var_rec[1] - Variant number
406  CFG_DRV_ACT_RANGES_APF_4_BOTTOM, // - Bottom Compatibility !!!!!see note below!!!!!!!
407  CFG_DRV_ACT_RANGES_APF_4_TOP // - Top Compatibility
408  }
409 #else
410  { 0, 0, 0 }
411 #endif // HCF_APF_VAR_4
412  }
413 } ;
414 #define HCF_VERSION TEXT( "HCF$Revision: 1.10 $" )
415 
416 static struct /*CFG_HCF_OPT_STRCT*/ {
417  hcf_16 len; //length of cfg_hcf_opt struct
418  hcf_16 typ; //type 0x082C
419  hcf_16 v0; //offset HCF_VERSION
420  hcf_16 v1; // MSF_COMPONENT_ID
421  hcf_16 v2; // HCF_ALIGN
422  hcf_16 v3; // HCF_ASSERT
423  hcf_16 v4; // HCF_BIG_ENDIAN
424  hcf_16 v5; // /* HCF_DLV | HCF_DLNV */
425  hcf_16 v6; // HCF_DMA
426  hcf_16 v7; // HCF_ENCAP
427  hcf_16 v8; // HCF_EXT
428  hcf_16 v9; // HCF_INT_ON
429  hcf_16 v10; // HCF_IO
430  hcf_16 v11; // HCF_LEGACY
431  hcf_16 v12; // HCF_MAX_LTV
432  hcf_16 v13; // HCF_PROT_TIME
433  hcf_16 v14; // HCF_SLEEP
434  hcf_16 v15; // HCF_TALLIES
435  hcf_16 v16; // HCF_TYPE
436  hcf_16 v17; // HCF_NIC_TAL_CNT
437  hcf_16 v18; // HCF_HCF_TAL_CNT
438  hcf_16 v19; // offset tallies
439  char val[sizeof(HCF_VERSION)];
440 } BASED cfg_hcf_opt = {
441  sizeof(cfg_hcf_opt)/sizeof(hcf_16) -1,
442  CFG_HCF_OPT, // (0x082C)
443  ( sizeof(cfg_hcf_opt) - sizeof(HCF_VERSION) - 4 )/sizeof(hcf_16),
444 #if defined MSF_COMPONENT_ID
445  MSF_COMPONENT_ID,
446 #else
447  0,
448 #endif // MSF_COMPONENT_ID
449  HCF_ALIGN,
450  HCF_ASSERT,
452  0, // /* HCF_DLV | HCF_DLNV*/,
453  HCF_DMA,
454  HCF_ENCAP,
455  HCF_EXT,
456  HCF_INT_ON,
457  HCF_IO,
458  HCF_LEGACY,
459  HCF_MAX_LTV,
461  HCF_SLEEP,
462  HCF_TALLIES,
463  HCF_TYPE,
464 #if (HCF_TALLIES) & ( HCF_TALLIES_NIC | HCF_TALLIES_HCF )
467  offsetof(IFB_STRCT, IFB_TallyLen ),
468 #else
469  0, 0, 0,
470 #endif // HCF_TALLIES_NIC / HCF_TALLIES_HCF
471  HCF_VERSION
472 }; // cfg_hcf_opt
473 #endif // MSF_COMPONENT_ID
474 
475 HCF_STATIC LTV_STRCT BASED cfg_null = { 1, CFG_NULL, {0} };
476 
478  &cfg_null.len, //CFG_NULL 0x0820
479 #if defined MSF_COMPONENT_ID
480  &cfg_drv_identity.len, //CFG_DRV_IDENTITY 0x0826
481  &cfg_drv_sup_range.len, //CFG_DRV_SUP_RANGE 0x0827
482  &cfg_drv_act_ranges_pri.len, //CFG_DRV_ACT_RANGES_PRI 0x0828
483  &cfg_drv_act_ranges_sta.len, //CFG_DRV_ACT_RANGES_STA 0x0829
484  &cfg_drv_act_ranges_hsi.len, //CFG_DRV_ACT_RANGES_HSI 0x082A
485  &cfg_drv_act_ranges_apf.len, //CFG_DRV_ACT_RANGES_APF 0x082B
486  &cfg_hcf_opt.len, //CFG_HCF_OPT 0x082C
487  NULL, //IFB_PRIIdentity placeholder 0xFD02
488  NULL, //IFB_PRISup placeholder 0xFD03
489 #endif // MSF_COMPONENT_ID
490  NULL //endsentinel
491 };
492 #define xxxx_PRI_IDENTITY_OFFSET (ARRAY_SIZE(xxxx) - 3)
493 
494 
495 /************************************************************************************************************
496  ************************** T O P L E V E L H C F R O U T I N E S **************************************
497  ************************************************************************************************************/
498 
499 /************************************************************************************************************
500  *
501  *.MODULE int hcf_action( IFBP ifbp, hcf_16 action )
502  *.PURPOSE Changes the run-time Card behavior.
503  * Performs Miscellanuous actions.
504  *
505  *.ARGUMENTS
506  * ifbp address of the Interface Block
507  * action number identifying the type of change
508  * - HCF_ACT_INT_FORCE_ON enable interrupt generation by WaveLAN NIC
509  * - HCF_ACT_INT_OFF disable interrupt generation by WaveLAN NIC
510  * - HCF_ACT_INT_ON compensate 1 HCF_ACT_INT_OFF, enable interrupt generation if balance reached
511  * - HCF_ACT_PRS_SCAN Hermes Probe Response Scan (F102) command
512  * - HCF_ACT_RX_ACK acknowledge non-DMA receiver to Hermes
513  * - HCF_ACT_SCAN Hermes Inquire Scan (F101) command (non-WARP only)
514  * - HCF_ACT_SLEEP DDS Sleep request
515  * - HCF_ACT_TALLIES Hermes Inquire Tallies (F100) command
516  *
517  *.RETURNS
518  * HCF_SUCCESS all (including invalid)
519  * HCF_INT_PENDING HCF_ACT_INT_OFF, interrupt pending
520  * HCF_ERR_NO_NIC HCF_ACT_INT_OFF, NIC presence check fails
521  *
522  *.CONDITIONS
523  * Except for hcf_action with HCF_ACT_INT_FORCE_ON or HCF_ACT_INT_OFF as parameter or hcf_connect with an I/O
524  * address (i.e. not HCF_DISCONNECT), all hcf-function calls MUST be preceded by a call of hcf_action with
525  * HCF_ACT_INT_OFF as parameter.
526  * Note that hcf_connect defaults to NIC interrupt disabled mode, i.e. as if hcf_action( HCF_ACT_INT_OFF )
527  * was called.
528  *
529  *.DESCRIPTION
530  * hcf_action supports the following mode changing action-code pairs that are antonyms
531  * - HCF_ACT_INT_[FORCE_]ON / HCF_ACT_INT_OFF
532  *
533  * Additionally hcf_action can start the following actions in the NIC:
534  * - HCF_ACT_PRS_SCAN
535  * - HCF_ACT_RX_ACK
536  * - HCF_ACT_SCAN
537  * - HCF_ACT_SLEEP
538  * - HCF_ACT_TALLIES
539  *
540  * o HCF_ACT_INT_OFF: Sets NIC Interrupts mode Disabled.
541  * This command, and the associated [Force] Enable NIC interrupts command, are only available if the HCF_INT_ON
542  * compile time option is not set at 0x0000.
543  *
544  * o HCF_ACT_INT_ON: Sets NIC Interrupts mode Enabled.
545  * Enable NIC Interrupts, depending on the number of preceding Disable NIC Interrupt calls.
546  *
547  * o HCF_ACT_INT_FORCE_ON: Force NIC Interrupts mode Enabled.
548  * Sets NIC Interrupts mode Enabled, regardless off the number of preceding Disable NIC Interrupt calls.
549  *
550  * The disabling and enabling of interrupts are antonyms.
551  * These actions must be balanced.
552  * For each "disable interrupts" there must be a matching "enable interrupts".
553  * The disable interrupts may be executed multiple times in a row without intervening enable interrupts, in
554  * other words, the disable interrupts may be nested.
555  * The interrupt generation mechanism is disabled at the first call with HCF_ACT_INT_OFF.
556  * The interrupt generation mechanism is re-enabled when the number of calls with HCF_ACT_INT_ON matches the
557  * number of calls with INT_OFF.
558  *
559  * It is not allowed to have more Enable NIC Interrupts calls than Disable NIC Interrupts calls.
560  * The interrupt generation mechanism is initially (i.e. after hcf_connect) disabled.
561  * An MSF based on a interrupt strategy must call hcf_action with INT_ON in its initialization logic.
562  *
563  *! The INT_OFF/INT_ON housekeeping is initialized at 0x0000 by hcf_connect, causing the interrupt generation
564  * mechanism to be disabled at first. This suits MSF implementation based on a polling strategy.
565  *
566  * o HCF_ACT_SLEEP: Initiates the Disconnected DeepSleep process
567  * This command is only available if the HCF_DDS compile time option is set. It triggers the F/W to start the
568  * sleep handshaking. Regardless whether the Host initiates a Disconnected DeepSleep (DDS) or the F/W initiates
569  * a Connected DeepSleep (CDS), the Host-F/W sleep handshaking is completed when the NIC Interrupts mode is
570  * enabled (by means of the balancing HCF_ACT_INT_ON), i.e. at that moment the F/W really goes into sleep mode.
571  * The F/W is wokenup by the HCF when the NIC Interrupts mode are disabled, i.e. at the first HCF_ACT_INT_OFF
572  * after going into sleep.
573  *
574  * The following Miscellaneous actions are defined:
575  *
576  * o HCF_ACT_RX_ACK: Receiver Acknowledgement (non-DMA, non-USB mode only)
577  * Acking the receiver, frees the NIC memory used to hold the Rx frame and allows the F/W to
578  * report the existence of the next Rx frame.
579  * If the MSF does not need access (any longer) to the current frame, e.g. because it is rejected based on the
580  * look ahead or copied to another buffer, the receiver may be acked. Acking earlier is assumed to have the
581  * potential of improving the performance.
582  * If the MSF does not explicitly ack the receiver, the acking is done implicitly if:
583  * - the received frame fits in the look ahead buffer, by the hcf_service_nic call that reported the Rx frame
584  * - if not in the above step, by hcf_rcv_msg (assuming hcf_rcv_msg is called)
585  * - if neither of the above implicit acks nor an explicit ack by the MSF, by the first hcf_service_nic after
586  * the hcf_service_nic that reported the Rx frame.
587  * Note: If an Rx frame is already acked, an explicit ACK by the MSF acts as a NoOperation.
588  *
589  * o HCF_ACT_TALLIES: Inquire Tallies command
590  * This command is only operational if the F/W is enabled.
591  * The Inquire Tallies command requests the F/W to provide its current set of tallies.
592  * See also hcf_get_info with CFG_TALLIES as parameter.
593  *
594  * o HCF_ACT_PRS_SCAN: Inquire Probe Response Scan command
595  * This command is only operational if the F/W is enabled.
596  * The Probe Response Scan command starts a scan sequence.
597  * The HCF puts the result of this action in an MSF defined buffer (see CFG_RID_LOG_STRCT).
598  *
599  * o HCF_ACT_SCAN: Inquire Scan command
600  * This command is only supported for HII F/W (i.e. pre-WARP) and it is operational if the F/W is enabled.
601  * The Inquire Scan command starts a scan sequence.
602  * The HCF puts the result of this action in an MSF defined buffer (see CFG_RID_LOG_STRCT).
603  *
604  * Assert fails if
605  * - ifbp has a recognizable out-of-range value.
606  * - NIC interrupts are not disabled while required by parameter action.
607  * - an invalid code is specified in parameter action.
608  * - HCF_ACT_INT_ON commands outnumber the HCF_ACT_INT_OFF commands.
609  * - reentrancy, may be caused by calling hcf_functions without adequate protection against NIC interrupts or
610  * multi-threading
611  *
612  * - Since the HCF does not maintain status information relative to the F/W enabled state, it is not asserted
613  * whether HCF_ACT_SCAN, HCF_ACT_PRS_SCAN or HCF_ACT_TALLIES are only used while F/W is enabled.
614  *
615  *.DIAGRAM
616  * 0: The assert embedded in HCFLOGENTRY checks against re-entrancy. Re-entrancy could be caused by a MSF logic
617  * at task-level calling hcf_functions without shielding with HCF_ACT_ON/_OFF. However the HCF_ACT_INT_OFF
618  * action itself can per definition not be protected this way. Based on code inspection, it can be concluded,
619  * that there is no re-entrancy PROBLEM in this particular flow. It does not seem worth the trouble to
620  * explicitly check for this condition (although there was a report of an MSF which ran into this assert.
621  * 2:IFB_IntOffCnt is used to balance the INT_OFF and INT_ON calls. Disabling of the interrupts is achieved by
622  * writing a zero to the Hermes IntEn register. In a shared interrupt environment (e.g. the mini-PCI NDIS
623  * driver) it is considered more correct to return the status HCF_INT_PENDING if and only if, the current
624  * invocation of hcf_service_nic is (apparently) called in the ISR when the ISR was activated as result of a
625  * change in HREG_EV_STAT matching a bit in HREG_INT_EN, i.e. not if invoked as result of another device
626  * generating an interrupt on the shared interrupt line.
627  * Note 1: it has been observed that under certain adverse conditions on certain platforms the writing of
628  * HREG_INT_EN can apparently fail, therefore it is paramount that HREG_INT_EN is written again with 0 for
629  * each and every call to HCF_ACT_INT_OFF.
630  * Note 2: it has been observed that under certain H/W & S/W architectures this logic is called when there is
631  * no NIC at all. To cater for this, the value of HREG_INT_EN is validated. If the unused bit 0x0100 is set,
632  * it is assumed there is no NIC.
633  * Note 3: During the download process, some versions of the F/W reset HREG_SW_0, hence checking this
634  * register for HCF_MAGIC (the classical NIC presence test) when HCF_ACT_INT_OFF is called due to another
635  * card interrupting via a shared IRQ during a download, fails.
636  *4: The construction "if ( ifbp->IFB_IntOffCnt-- == 0 )" is optimal (in the sense of shortest/quickest
637  * path in error free flows) but NOT fail safe in case of too many INT_ON invocations compared to INT_OFF).
638  * Enabling of the interrupts is achieved by writing the Hermes IntEn register.
639  * - If the HCF is in Defunct mode, the interrupts stay disabled.
640  * - Under "normal" conditions, the HCF is only interested in Info Events, Rx Events and Notify Events.
641  * - When the HCF is out of Tx/Notify resources, the HCF is also interested in Alloc Events.
642  * - via HCF_EXT, the MSF programmer can also request HREG_EV_TICK and/or HREG_EV_TX_EXC interrupts.
643  * For DMA operation, the DMA hardware handles the alloc events. The DMA engine will generate a 'TxDmaDone'
644  * event as soon as it has pumped a frame from host ram into NIC-RAM (note that the frame does not have to be
645  * transmitted then), and a 'RxDmaDone' event as soon as a received frame has been pumped from NIC-RAM into
646  * host ram. Note that the 'alloc' event has been removed from the event-mask, because the DMA engine will
647  * react to and acknowledge this event.
648  *6: ack the "old" Rx-event. See "Rx Buffer free strategy" in hcf_service_nic above for more explanation.
649  * IFB_RxFID and IFB_RxLen must be cleared to bring both the internal HCF house keeping and the information
650  * supplied to the MSF in the state "no frame received".
651  *8: The HCF_ACT_SCAN, HCF_ACT_PRS_SCAN and HCF_ACT_TALLIES activity are merged by "clever" algebraic
652  * manipulations of the RID-values and action codes, so foregoing robustness against migration problems for
653  * ease of implementation. The assumptions about numerical relationships between CFG_TALLIES etc and
654  * HCF_ACT_TALLIES etc are checked by the "#if" statements just prior to the body of this routine, resulting
655  * in: err "maintenance" during compilation if the assumptions are no longer met. The writing of HREG_PARAM_1
656  * with 0x3FFF in case of an PRS scan, is a kludge to get around lack of specification, hence different
657  * implementation in F/W and Host.
658  * When there is no NIC RAM available, some versions of the Hermes F/W do report 0x7F00 as error in the
659  * Result field of the Status register and some F/W versions don't. To mask this difference to the MSF all
660  * return codes of the Hermes are ignored ("best" and "most simple" solution to these types of analomies with
661  * an acceptable loss due to ignoring all error situations as well).
662  * The "No inquire space" is reported via the Hermes tallies.
663  *30: do not HCFASSERT( rc, rc ) since rc == HCF_INT_PENDING is no error
664  *
665  *.ENDDOC END DOCUMENTATION
666  *
667  ************************************************************************************************************/
668 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
669 #if CFG_SCAN != CFG_TALLIES - HCF_ACT_TALLIES + HCF_ACT_SCAN
670 err: "maintenance" apparently inviolated the underlying assumption about the numerical values of these macros
671 #endif
672 #endif // HCF_TYPE_HII5
673 #if CFG_PRS_SCAN != CFG_TALLIES - HCF_ACT_TALLIES + HCF_ACT_PRS_SCAN
674 err: "maintenance" apparently inviolated the underlying assumption about the numerical values of these macros
675 #endif
676 int
678 {
679  int rc = HCF_SUCCESS;
680 
681  HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
682 #if HCF_INT_ON
683  HCFLOGENTRY( action == HCF_ACT_INT_FORCE_ON ? HCF_TRACE_ACTION_KLUDGE : HCF_TRACE_ACTION, action ); /* 0 */
684 #if (HCF_SLEEP)
685  HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE || action == HCF_ACT_INT_OFF,
686  MERGE_2( action, ifbp->IFB_IntOffCnt ) );
687 #else
688  HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE, action );
689 #endif // HCF_SLEEP
690  HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFF ||
691  action == HCF_ACT_INT_OFF || action == HCF_ACT_INT_FORCE_ON, action );
692  HCFASSERT( ifbp->IFB_IntOffCnt <= 16 || ifbp->IFB_IntOffCnt >= 0xFFFE,
693  MERGE_2( action, ifbp->IFB_IntOffCnt ) ); //nesting more than 16 deep seems unreasonable
694 #endif // HCF_INT_ON
695 
696  switch (action) {
697 #if HCF_INT_ON
698  hcf_16 i;
699  case HCF_ACT_INT_OFF: // Disable Interrupt generation
700 #if HCF_SLEEP
701  if ( ifbp->IFB_IntOffCnt == 0xFFFE ) { // WakeUp test ;?tie this to the "new" super-LinkStat
702  ifbp->IFB_IntOffCnt++; // restore conventional I/F
703  OPW(HREG_IO, HREG_IO_WAKEUP_ASYNC ); // set wakeup bit
704  OPW(HREG_IO, HREG_IO_WAKEUP_ASYNC ); // set wakeup bit to counteract the clearing by F/W
705  // 800 us latency before FW switches to high power
706  MSF_WAIT(800); // MSF-defined function to wait n microseconds.
707 //OOR if ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_DS_OOR ) { // OutOfRange
708 // printk(KERN_NOTICE "ACT_INT_OFF: Deepsleep phase terminated, enable and go to AwaitConnection\n" ); //;?remove me 1 day
709 // hcf_cntl( ifbp, HCF_CNTL_ENABLE );
710 // }
711 // ifbp->IFB_DSLinkStat &= ~( CFG_LINK_STAT_DS_IR | CFG_LINK_STAT_DS_OOR); //clear IR/OOR state
712  }
713 #endif // HCF_SLEEP
714  /*2*/ ifbp->IFB_IntOffCnt++;
716  i = IPW( HREG_INT_EN );
717  OPW( HREG_INT_EN, 0 );
718  if ( i & 0x1000 ) {
719  rc = HCF_ERR_NO_NIC;
720  } else {
721  if ( i & IPW( HREG_EV_STAT ) ) {
722  rc = HCF_INT_PENDING;
723  }
724  }
725  break;
726 
727  case HCF_ACT_INT_FORCE_ON: // Enforce Enable Interrupt generation
728  ifbp->IFB_IntOffCnt = 0;
729  //Fall through in HCF_ACT_INT_ON
730 
731  case HCF_ACT_INT_ON: // Enable Interrupt generation
732  /*4*/ if ( ifbp->IFB_IntOffCnt-- == 0 && ifbp->IFB_CardStat == 0 ) {
733  //determine Interrupt Event mask
734 #if HCF_DMA
735  if ( ifbp->IFB_CntlOpt & USE_DMA ) {
736  i = HREG_EV_INFO | HREG_EV_RDMAD | HREG_EV_TDMAD | HREG_EV_TX_EXT; //mask when DMA active
737  } else
738 #endif // HCF_DMA
739  {
740  i = HREG_EV_INFO | HREG_EV_RX | HREG_EV_TX_EXT; //mask when DMA not active
741  if ( ifbp->IFB_RscInd == 0 ) {
742  i |= HREG_EV_ALLOC; //mask when no TxFID available
743  }
744  }
745 #if HCF_SLEEP
746  if ( ( IPW(HREG_EV_STAT) & ( i | HREG_EV_SLEEP_REQ ) ) == HREG_EV_SLEEP_REQ ) {
747  // firmware indicates it would like to go into sleep modus
748  // only acknowledge this request if no other events that can cause an interrupt are pending
749  ifbp->IFB_IntOffCnt--; //becomes 0xFFFE
750  OPW( HREG_INT_EN, i | HREG_EV_TICK );
752  } else
753 #endif // HCF_SLEEP
754  {
756  }
757  }
758  break;
759 #endif // HCF_INT_ON
760 
761 #if (HCF_SLEEP) & HCF_DDS
762  case HCF_ACT_SLEEP: // DDS Sleep request
763  hcf_cntl( ifbp, HCF_CNTL_DISABLE );
764  cmd_exe( ifbp, HCMD_SLEEP, 0 );
765  break;
766 // case HCF_ACT_WAKEUP: // DDS Wakeup request
767 // HCFASSERT( ifbp->IFB_IntOffCnt == 0xFFFE, ifbp->IFB_IntOffCnt );
768 // ifbp->IFB_IntOffCnt++; // restore conventional I/F
769 // OPW( HREG_IO, HREG_IO_WAKEUP_ASYNC );
770 // MSF_WAIT(800); // MSF-defined function to wait n microseconds.
771 // rc = hcf_action( ifbp, HCF_ACT_INT_OFF ); /*bogus, IFB_IntOffCnt == 0xFFFF, so if you carefully look
772 // *at the #if HCF_DDS statements, HCF_ACT_INT_OFF is empty
773 // *for DDS. "Much" better would be to merge the flows for
774 // *DDS and DEEP_SLEEP
775 // */
776 // break;
777 #endif // HCF_DDS
778 
779  case HCF_ACT_RX_ACK: //Receiver ACK
780  /*6*/ if ( ifbp->IFB_RxFID ) {
781  DAWA_ACK( HREG_EV_RX );
782  }
783  ifbp->IFB_RxFID = ifbp->IFB_RxLen = 0;
784  break;
785 
786  /*8*/ case HCF_ACT_PRS_SCAN: // Hermes PRS Scan (F102)
787  OPW( HREG_PARAM_1, 0x3FFF );
788  //Fall through in HCF_ACT_TALLIES
789  case HCF_ACT_TALLIES: // Hermes Inquire Tallies (F100)
790 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
791  case HCF_ACT_SCAN: // Hermes Inquire Scan (F101)
792 #endif // HCF_TYPE_HII5
793 
795  cmd_exe( ifbp, HCMD_INQUIRE, action - HCF_ACT_TALLIES + CFG_TALLIES );
796  break;
797 
798  default:
799  HCFASSERT( DO_ASSERT, action );
800  break;
801  }
803  HCFLOGEXIT( HCF_TRACE_ACTION );
804  return rc;
805 } // hcf_action
806 
807 
808 /************************************************************************************************************
809  *
810  *.MODULE int hcf_cntl( IFBP ifbp, hcf_16 cmd )
811  *.PURPOSE Connect or disconnect a specific port to a specific network.
812  *!! ;???????????????? continue needs more explanation
813  * recovers by means of "continue" when the connect process in CCX mode fails
814  * Enables or disables data transmission and reception for the NIC.
815  * Activates static NIC configuration for a specific port at connect.
816  * Activates static configuration for all ports at enable.
817  *
818  *.ARGUMENTS
819  * ifbp address of the Interface Block
820  * cmd 0x001F: Hermes command (disable, enable, connect, disconnect, continue)
821  * HCF_CNTL_ENABLE Enable
822  * HCF_CNTL_DISABLE Disable
823  * HCF_CNTL_CONTINUE Continue
824  * HCF_CNTL_CONNECT Connect
825  * HCF_CNTL_DISCONNECT Disconnect
826  * 0x0100: command qualifier (continue)
827  * HCMD_RETRY retry flag
828  * 0x0700: port number (connect/disconnect)
829  * HCF_PORT_0 MAC Port 0
830  * HCF_PORT_1 MAC Port 1
831  * HCF_PORT_2 MAC Port 2
832  * HCF_PORT_3 MAC Port 3
833  * HCF_PORT_4 MAC Port 4
834  * HCF_PORT_5 MAC Port 5
835  * HCF_PORT_6 MAC Port 6
836  *
837  *.RETURNS
838  * HCF_SUCCESS
839  *!! via cmd_exe
840  * HCF_ERR_NO_NIC
841  * HCF_ERR_DEFUNCT_...
842  * HCF_ERR_TIME_OUT
843  *
844  *.DESCRIPTION
845  * The parameter cmd contains a number of subfields.
846  * The actual value for cmd is created by logical or-ing the appropriate mnemonics for the subfields.
847  * The field 0x001F contains the command code
848  * - HCF_CNTL_ENABLE
849  * - HCF_CNTL_DISABLE
850  * - HCF_CNTL_CONNECT
851  * - HCF_CNTL_DISCONNECT
852  * - HCF_CNTL_CONTINUE
853  *
854  * For HCF_CNTL_CONTINUE, the field 0x0100 contains the retry flag HCMD_RETRY.
855  * For HCF_CNTL_CONNECT and HCF_CNTL_DISCONNECT, the field 0x0700 contains the port number as HCF_PORT_#.
856  * For Station as well as AccessPoint F/W, MAC Port 0 is the "normal" communication channel.
857  * For AccessPoint F/W, MAC Port 1 through 6 control the WDS links.
858  *
859  * Note that despite the names HCF_CNTL_DISABLE and HCF_CNTL_ENABLE, hcf_cntl does not influence the NIC
860  * Interrupts mode.
861  *
862  * The Connect is used by the MSF to bring a particular port in an inactive state as far as data transmission
863  * and reception are concerned.
864  * When a particular port is disconnected:
865  * - the F/W disables the receiver for that port.
866  * - the F/W ignores send commands for that port.
867  * - all frames (Receive as well as pending Transmit) for that port on the NIC are discarded.
868  *
869  * When the NIC is disabled, above list applies to all ports, i.e. the result is like all ports are
870  * disconnected.
871  *
872  * When a particular port is connected:
873  * - the F/W effectuates the static configuration for that port.
874  * - enables the receiver for that port.
875  * - accepts send commands for that port.
876  *
877  * Enabling has the following effects:
878  * - the F/W effectuates the static configuration for all ports.
879  * The F/W only updates its static configuration at a transition from disabled to enabled or from
880  * disconnected to connected.
881  * In order to enforce the static configuration, the MSF must assure that such a transition takes place.
882  * Due to such a disable/enable or disconnect/connect sequence, Rx/Tx frames may be lost, in other words,
883  * configuration may impact communication.
884  * - The DMA Engine (if applicable) is enabled.
885  * Note that the Enable Function by itself only enables data transmission and reception, it
886  * does not enable the Interrupt Generation mechanism. This is done by hcf_action.
887  *
888  * Disabling has the following effects:
889  *!! ;?????is the following statement really true
890  * - it acts as a disconnect on all ports.
891  * - The DMA Engine (if applicable) is disabled.
892  *
893  * For impact of the disable command on the behavior of hcf_dma_tx/rx_get see the appropriate sections.
894  *
895  * Although the Enable/Disable and Connect/Disconnect are antonyms, there is no restriction on their sequencing,
896  * in other words, they may be called multiple times in arbitrary sequence without being paired or balanced.
897  * Each time one of these functions is called, the effects of the preceding calls cease.
898  *
899  * Assert fails if
900  * - ifbp has a recognizable out-of-range value.
901  * - NIC interrupts are not disabled.
902  * - A command other than Continue, Enable, Disable, Connect or Disconnect is given.
903  * - An invalid combination of the subfields is given or a bit outside the subfields is given.
904  * - any return code besides HCF_SUCCESS.
905  * - reentrancy, may be caused by calling a hcf_function without adequate protection against NIC interrupts or
906  * multi-threading
907  *
908  *.DIAGRAM
909  * hcf_cntl takes successively the following actions:
910  *2: If the HCF is in Defunct mode or incompatible with the Primary or Station Supplier in the Hermes,
911  * hcf_cntl() returns immediately with HCF_ERR_NO_NIC;? as status.
912  *8: when the port is disabled, the DMA engine needs to be de-activated, so the host can safely reclaim tx
913  * packets from the tx descriptor chain.
914  *
915  *.ENDDOC END DOCUMENTATION
916  *
917  ************************************************************************************************************/
918 int
920 {
921  int rc = HCF_ERR_INCOMP_FW;
922 #if HCF_ASSERT
923  { int x = cmd & HCMD_CMD_CODE;
924  if ( x == HCF_CNTL_CONTINUE ) x &= ~HCMD_RETRY;
925  else if ( (x == HCMD_DISABLE || x == HCMD_ENABLE) && ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ) {
926  x &= ~HFS_TX_CNTL_PORT;
927  }
929  x==HCF_CNTL_CONNECT || x==HCF_CNTL_DISCONNECT, cmd );
930  }
931 #endif // HCF_ASSERT
932 // #if (HCF_SLEEP) & HCF_DDS
933 // HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE, cmd );
934 // #endif // HCF_DDS
935  HCFLOGENTRY( HCF_TRACE_CNTL, cmd );
936  if ( ifbp->IFB_CardStat == 0 ) { /*2*/
937  /*6*/ rc = cmd_exe( ifbp, cmd, 0 );
938 #if (HCF_SLEEP) & HCF_DDS
939  ifbp->IFB_TickCnt = 0; //start 2 second period (with 1 tick uncertanty)
940 #endif // HCF_DDS
941  }
942 #if HCF_DMA
943 
944  // The reason behind this is that the MSF should be able to get all its DMA resources back from the HCF,
945  // even if the hardware is disfunctional. Practical example under Windows : surprise removal.
946  if ( ifbp->IFB_CntlOpt & USE_DMA ) {
947  hcf_io io_port = ifbp->IFB_IOBase;
948  DESC_STRCT *p;
949  if ( cmd == HCF_CNTL_DISABLE || cmd == HCF_CNTL_ENABLE ) {
950  OUT_PORT_DWORD( (io_port + HREG_DMA_CTRL), DMA_CTRLSTAT_RESET); /*8*/
951  ifbp->IFB_CntlOpt &= ~DMA_ENABLED;
952  }
953  if ( cmd == HCF_CNTL_ENABLE ) {
954  OUT_PORT_DWORD( (io_port + HREG_DMA_CTRL), DMA_CTRLSTAT_GO);
955  /* ;? by rewriting hcf_dma_rx_put you can probably just call hcf_dma_rx_put( ifbp->IFB_FirstDesc[DMA_RX] )
956  * as additional beneficiary side effect, the SOP and EOP bits will also be cleared
957  */
958  ifbp->IFB_CntlOpt |= DMA_ENABLED;
960  // make the entire rx descriptor chain DMA-owned, so the DMA engine can (re-)use it.
961  p = ifbp->IFB_FirstDesc[DMA_RX];
962  if (p != NULL) { //;? Think this over again in the light of the new chaining strategy
963  if ( 1 ) { //begin alternative
965  put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX], DMA_RX );
966  if ( ifbp->IFB_FirstDesc[DMA_RX] ) {
967  put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX]->next_desc_addr, DMA_RX );
968  }
969  } else {
970  while ( p ) {
971  //p->buf_cntl.cntl_stat |= DESC_DMA_OWNED;
972  p->BUF_CNT |= DESC_DMA_OWNED;
973  p = p->next_desc_addr;
974  }
975  // a rx chain is available so hand it over to the DMA engine
976  p = ifbp->IFB_FirstDesc[DMA_RX];
977  OUT_PORT_DWORD( (io_port + HREG_RXDMA_PTR32), p->desc_phys_addr);
978  } //end alternative
979  }
980  }
981  }
982 #endif // HCF_DMA
983  HCFASSERT( rc == HCF_SUCCESS, rc );
985  return rc;
986 } // hcf_cntl
987 
988 
989 /************************************************************************************************************
990  *
991  *.MODULE int hcf_connect( IFBP ifbp, hcf_io io_base )
992  *.PURPOSE Grants access right for the HCF to the IFB.
993  * Initializes Card and HCF housekeeping.
994  *
995  *.ARGUMENTS
996  * ifbp (near) address of the Interface Block
997  * io_base non-USB: I/O Base address of the NIC (connect)
998  * non-USB: HCF_DISCONNECT
999  * USB: HCF_CONNECT, HCF_DISCONNECT
1000  *
1001  *.RETURNS
1002  * HCF_SUCCESS
1003  * HCF_ERR_INCOMP_PRI
1004  * HCF_ERR_INCOMP_FW
1005  * HCF_ERR_DEFUNCT_CMD_SEQ
1006  *!! HCF_ERR_NO_NIC really returned ;?
1007  * HCF_ERR_NO_NIC
1008  * HCF_ERR_TIME_OUT
1009  *
1010  * MSF-accessible fields of Result Block:
1011  * IFB_IOBase entry parameter io_base
1012  * IFB_IORange HREG_IO_RANGE (0x40/0x80)
1013  * IFB_Version version of the IFB layout
1014  * IFB_FWIdentity CFG_FW_IDENTITY_STRCT, specifies the identity of the
1015  * "running" F/W, i.e. tertiary F/W under normal conditions
1016  * IFB_FWSup CFG_SUP_RANGE_STRCT, specifies the supplier range of
1017  * the "running" F/W, i.e. tertiary F/W under normal conditions
1018  * IFB_HSISup CFG_SUP_RANGE_STRCT, specifies the HW/SW I/F range of the NIC
1019  * IFB_PRIIdentity CFG_PRI_IDENTITY_STRCT, specifies the Identity of the Primary F/W
1020  * IFB_PRISup CFG_SUP_RANGE_STRCT, specifies the supplier range of the Primary F/W
1021  * all other all MSF accessible fields, which are not specified above, are zero-filled
1022  *
1023  *.CONDITIONS
1024  * It is the responsibility of the MSF to assure the correctness of the I/O Base address.
1025  *
1026  * Note: hcf_connect defaults to NIC interrupt disabled mode, i.e. as if hcf_action( HCF_ACT_INT_OFF )
1027  * was called.
1028  *
1029  *.DESCRIPTION
1030  * hcf_connect passes the MSF-defined location of the IFB to the HCF and grants or revokes access right for the
1031  * HCF to the IFB. Revoking is done by specifying HCF_DISCONNECT rather than an I/O address for the parameter
1032  * io_base. Every call of hcf_connect in "connect" mode, must eventually be followed by a call of hcf_connect
1033  * in "disconnect" mode. Calling hcf_connect in "connect"/"disconnect" mode can not be nested.
1034  * The IFB address must be used as a handle with all subsequent HCF-function calls and the HCF uses the IFB
1035  * address as a handle when it performs a call(back) of an MSF-function (i.e. msf_assert).
1036  *
1037  * Note that not only the MSF accessible fields are cleared, but also all internal housekeeping
1038  * information is re-initialized.
1039  * This implies that all settings which are done via hcf_action and hcf_put_info (e.g. CFG_MB_ASSERT, CFG_REG_MB,
1040  * CFG_REG_INFO_LOG) must be done again. The only field which is not cleared, is IFB_MSFSup.
1041  *
1042  * If HCF_INT_ON is selected as compile option, NIC interrupts are disabled.
1043  *
1044  * Assert fails if
1045  * - ifbp is not properly aligned ( ref chapter HCF_ALIGN in 4.1.1)
1046  * - I/O Base Address is not a multiple of 0x40 (note: 0x0000 is explicitly allowed).
1047  *
1048  *.DIAGRAM
1049  *
1050  *0: Throughout hcf_connect you need to distinguish the connect from the disconnect case, which requires
1051  * some attention about what to use as "I/O" address when for which purpose.
1052  *2:
1053  *2a: Reset H-II by toggling reset bit in IO-register on and off.
1054  * The HCF_TYPE_PRELOADED caters for the DOS environment where H-II is loaded by a separate program to
1055  * overcome the 64k size limit posed on DOS drivers.
1056  * The macro OPW is not yet useable because the IFB_IOBase field is not set.
1057  * Note 1: hopefully the clearing and initializing of the IFB (see below) acts as a delay which meets the
1058  * specification for S/W reset
1059  * Note 2: it turns out that on some H/W constellations, the clock to access the EEProm is not lowered
1060  * to an appropriate frequency by HREG_IO_SRESET. By giving an HCMD_INI first, this problem is worked around.
1061  *2b: Experimentally it is determined over a wide range of F/W versions that are waiting for the for Cmd bit in
1062  * Ev register gives a workable strategy. The available documentation does not give much clues.
1063  *4: clear and initialize the IFB
1064  * The HCF house keeping info is designed such that zero is the appropriate initial value for as much as
1065  * feasible IFB-items.
1066  * The readable fields mentioned in the description section and some HCF specific fields are given their
1067  * actual value.
1068  * IFB_TickIni is initialized at best guess before calibration
1069  * Hcf_connect defaults to "no interrupt generation" (implicitly achieved by the zero-filling).
1070  *6: Register compile-time linked MSF Routine and set default filter level
1071  * cast needed to get around the "near" problem in DOS COM model
1072  * er C2446: no conversion from void (__near __cdecl *)(unsigned char __far *,unsigned int,unsigned short,int)
1073  * to void (__far __cdecl *)(unsigned char __far *,unsigned int,unsigned short,int)
1074  *8: If a command is apparently still active (as indicated by the Busy bit in Cmd register) this may indicate a
1075  * blocked cmd pipe line. To unblock the following actions are done:
1076  * - Ack everything
1077  * - Wait for Busy bit drop in Cmd register
1078  * - Wait for Cmd bit raise in Ev register
1079  * The two waits are combined in a single HCF_WAIT_WHILE to optimize memory size. If either of these waits
1080  * fail (prot_cnt becomes 0), then something is serious wrong. Rather than PANICK, the assumption is that the
1081  * next cmd_exe will fail, causing the HCF to go into DEFUNCT mode
1082  *10: Ack everything to unblock a (possibly blocked) cmd pipe line
1083  * Note 1: it is very likely that an Alloc event is pending and very well possible that a (Send) Cmd event is
1084  * pending on non-initial calls
1085  * Note 2: it is assumed that this strategy takes away the need to ack every conceivable event after an
1086  * Hermes Initialize
1087  *12: Only H-II NEEDS the Hermes Initialize command. Due to the different semantics for H-I and H-II
1088  * Initialize command, init() does not (and can not, since it is called e.g. after a download) execute the
1089  * Hermes Initialize command. Executing the Hermes Initialize command for H-I would not harm but not do
1090  * anything useful either, so it is skipped.
1091  * The return status of cmd_exe is ignored. It is assumed that if cmd_exe fails, init fails too
1092  *14: use io_base as a flag to merge hcf_connect and hcf_disconnect into 1 routine
1093  * the call to init and its subsequent call of cmd_exe will return HCF_ERR_NO_NIC if appropriate. This status
1094  * is (badly) needed by some legacy combination of NT4 and card services which do not yield an I/O address in
1095  * time.
1096  *
1097  *.NOTICE
1098  * On platforms where the NULL-pointer is not a bit-pattern of all zeros, the zero-filling of the IFB results
1099  * in an incorrect initialization of pointers.
1100  * The implementation of the MailBox manipulation in put_mb_info protects against the absence of a MailBox
1101  * based on IFB_MBSize, IFB_MBWp and ifbp->IFB_MBRp. This has ramifications on the initialization of the
1102  * MailBox via hcf_put_info with the CFG_REG_MB type, but it prevents dependency on the "NULL-"ness of
1103  * IFB_MBp.
1104  *
1105  *.NOTICE
1106  * There are a number of problems when asserting and logging hcf_connect, e.g.
1107  * - Asserting on re-entrancy of hcf_connect by means of
1108  * "HCFASSERT( (ifbp->IFB_AssertTrace & HCF_ASSERT_CONNECT) == 0, 0 )" is not useful because IFB contents
1109  * are undefined
1110  * - Asserting before the IFB is cleared will cause mdd_assert() to interpret the garbage in IFB_AssertRtn
1111  * as a routine address
1112  * Therefore HCFTRACE nor HCFLOGENTRY is called by hcf_connect.
1113  *.ENDDOC END DOCUMENTATION
1114  *
1115  ************************************************************************************************************/
1116 int
1118 {
1119  int rc = HCF_SUCCESS;
1120  hcf_io io_addr;
1121  hcf_32 prot_cnt;
1122  hcf_8 *q;
1123  LTV_STRCT x;
1124 #if HCF_ASSERT
1125  hcf_16 xa = ifbp->IFB_FWIdentity.typ;
1126  /* is assumed to cause an assert later on if hcf_connect is called without intervening hcf_disconnect.
1127  * xa == CFG_FW_IDENTITY in subsequent calls without preceding hcf_disconnect,
1128  * xa == 0 in subsequent calls with preceding hcf_disconnect,
1129  * xa == "garbage" (any value except CFG_FW_IDENTITY is acceptable) in the initial call
1130  */
1131 #endif // HCF_ASSERT
1132 
1133  if ( io_base == HCF_DISCONNECT ) { //disconnect
1134  io_addr = ifbp->IFB_IOBase;
1135  OPW( HREG_INT_EN, 0 ); //;?workaround against dying F/W on subsequent hcf_connect calls
1136  } else { //connect /* 0 */
1137  io_addr = io_base;
1138  }
1139 
1140 #if 0 //;? if a subsequent hcf_connect is preceded by an hcf_disconnect the wakeup is not needed !!
1141 #if HCF_SLEEP
1142  OUT_PORT_WORD( .....+HREG_IO, HREG_IO_WAKEUP_ASYNC ); //OPW not yet useable
1143  MSF_WAIT(800); // MSF-defined function to wait n microseconds.
1144  note that MSF_WAIT uses not yet defined!!!! IFB_IOBase and IFB_TickIni (via PROT_CNT_INI)
1145  so be careful if this code is restored
1146 #endif // HCF_SLEEP
1147 #endif // 0
1148 
1149 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0 //switch clock back for SEEPROM access !!!
1150  OUT_PORT_WORD( io_addr + HREG_CMD, HCMD_INI ); //OPW not yet useable
1151  prot_cnt = INI_TICK_INI;
1152  HCF_WAIT_WHILE( (IN_PORT_WORD( io_addr + HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1153  OUT_PORT_WORD( (io_addr + HREG_IO), HREG_IO_SRESET ); //OPW not yet useable /* 2a*/
1154 #endif // HCF_TYPE_PRELOADED
1155  for ( q = (hcf_8*)(&ifbp->IFB_Magic); q > (hcf_8*)ifbp; *--q = 0 ) /*NOP*/; /* 4 */
1156  ifbp->IFB_Magic = HCF_MAGIC;
1157  ifbp->IFB_Version = IFB_VERSION;
1158 #if defined MSF_COMPONENT_ID //a new IFB demonstrates how dirty the solution is
1159  xxxx[xxxx_PRI_IDENTITY_OFFSET] = NULL; //IFB_PRIIdentity placeholder 0xFD02
1160  xxxx[xxxx_PRI_IDENTITY_OFFSET+1] = NULL; //IFB_PRISup placeholder 0xFD03
1161 #endif // MSF_COMPONENT_ID
1162 #if (HCF_TALLIES) & ( HCF_TALLIES_NIC | HCF_TALLIES_HCF )
1163  ifbp->IFB_TallyLen = 1 + 2 * (HCF_NIC_TAL_CNT + HCF_HCF_TAL_CNT); //convert # of Tallies to L value for LTV
1164  ifbp->IFB_TallyTyp = CFG_TALLIES; //IFB_TallyTyp: set T value
1165 #endif // HCF_TALLIES_NIC / HCF_TALLIES_HCF
1166  ifbp->IFB_IOBase = io_addr; //set IO_Base asap, so asserts via HREG_SW_2 don't harm
1167  ifbp->IFB_IORange = HREG_IO_RANGE;
1168  ifbp->IFB_CntlOpt = USE_16BIT;
1169 #if HCF_ASSERT
1170  assert_ifbp = ifbp;
1171  ifbp->IFB_AssertLvl = 1;
1172 #if (HCF_ASSERT) & HCF_ASSERT_LNK_MSF_RTN
1173  if ( io_base != HCF_DISCONNECT ) {
1174  ifbp->IFB_AssertRtn = (MSF_ASSERT_RTNP)msf_assert; /* 6 */
1175  }
1176 #endif // HCF_ASSERT_LNK_MSF_RTN
1177 #if (HCF_ASSERT) & HCF_ASSERT_MB //build the structure to pass the assert info to hcf_put_info
1178  ifbp->IFB_AssertStrct.len = sizeof(ifbp->IFB_AssertStrct)/sizeof(hcf_16) - 1;
1179  ifbp->IFB_AssertStrct.typ = CFG_MB_INFO;
1180  ifbp->IFB_AssertStrct.base_typ = CFG_MB_ASSERT;
1181  ifbp->IFB_AssertStrct.frag_cnt = 1;
1182  ifbp->IFB_AssertStrct.frag_buf[0].frag_len =
1183  ( offsetof(IFB_STRCT, IFB_AssertLvl) - offsetof(IFB_STRCT, IFB_AssertLine) ) / sizeof(hcf_16);
1184  ifbp->IFB_AssertStrct.frag_buf[0].frag_addr = &ifbp->IFB_AssertLine;
1185 #endif // HCF_ASSERT_MB
1186 #endif // HCF_ASSERT
1187  IF_PROT_TIME( prot_cnt = ifbp->IFB_TickIni = INI_TICK_INI );
1188 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0
1189 
1190  OPW( HREG_IO, 0x0000 ); //OPW useable /* 2b*/
1191  HCF_WAIT_WHILE( (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1192  IF_PROT_TIME( HCFASSERT( prot_cnt, IPW( HREG_EV_STAT) ) );
1193  IF_PROT_TIME( if ( prot_cnt ) prot_cnt = ifbp->IFB_TickIni );
1194 #endif // HCF_TYPE_PRELOADED
1195 
1196  HCFASSERT( DO_ASSERT, MERGE_2( HCF_ASSERT, 0xCAF0 ) ); //just to proof that the complete assert machinery is working
1197  HCFASSERT( xa != CFG_FW_IDENTITY, 0 ); // assert if hcf_connect is called without intervening hcf_disconnect.
1198  HCFASSERT( ((hcf_32)(void*)ifbp & (HCF_ALIGN-1) ) == 0, (hcf_32)(void*)ifbp );
1199  HCFASSERT( (io_addr & 0x003F) == 0, io_addr );
1200  //if Busy bit in Cmd register
1201  if (IPW( HREG_CMD ) & HCMD_BUSY ) { /* 8 */
1202  //. Ack all to unblock a (possibly) blocked cmd pipe line
1204  //. Wait for Busy bit drop in Cmd register
1205  //. Wait for Cmd bit raise in Ev register
1206  HCF_WAIT_WHILE( ( IPW( HREG_CMD ) & HCMD_BUSY ) && (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1207  IF_PROT_TIME( HCFASSERT( prot_cnt, IPW( HREG_EV_STAT) ) ); /* if prot_cnt == 0, cmd_exe will fail, causing DEFUNCT */
1208  }
1210 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0 /*12*/
1211  (void)cmd_exe( ifbp, HCMD_INI, 0 );
1212 #endif // HCF_TYPE_PRELOADED
1213  if ( io_base != HCF_DISCONNECT ) {
1214  rc = init( ifbp ); /*14*/
1215  if ( rc == HCF_SUCCESS ) {
1216  x.len = 2;
1217  x.typ = CFG_NIC_BUS_TYPE;
1218  (void)hcf_get_info( ifbp, &x );
1219  ifbp->IFB_BusType = x.val[0];
1220  //CFG_NIC_BUS_TYPE not supported -> default 32 bits/DMA, MSF has to overrule via CFG_CNTL_OPT
1221  if ( x.len == 0 || x.val[0] == 0x0002 || x.val[0] == 0x0003 ) {
1222 #if (HCF_IO) & HCF_IO_32BITS
1223  ifbp->IFB_CntlOpt &= ~USE_16BIT; //reset USE_16BIT
1224 #endif // HCF_IO_32BITS
1225 #if HCF_DMA
1226  ifbp->IFB_CntlOpt |= USE_DMA; //SET DMA
1227 #else
1228  ifbp->IFB_IORange = 0x40 /*i.s.o. HREG_IO_RANGE*/;
1229 #endif // HCF_DMA
1230  }
1231  }
1232  } else HCFASSERT( ( ifbp->IFB_Magic ^= HCF_MAGIC ) == 0, ifbp->IFB_Magic ) /*NOP*/;
1233  /* of above HCFASSERT only the side effect is needed, NOP in case HCFASSERT is dummy */
1234  ifbp->IFB_IOBase = io_base; /* 0*/
1235  return rc;
1236 } // hcf_connect
1237 
1238 #if HCF_DMA
1239 /************************************************************************************************************
1240  * Function get_frame_lst
1241  * - resolve the "last host-owned descriptor" problems when a descriptor list is reclaimed by the MSF.
1242  *
1243  * The FrameList to be reclaimed as well as the DescriptorList always start in IFB_FirstDesc[tx_rx_flag]
1244  * and this is always the "current" DELWA Descriptor.
1245  *
1246  * If a FrameList is available, the last descriptor of the FrameList to turned into a new DELWA Descriptor:
1247  * - a copy is made from the information in the last descriptor of the FrameList into the current
1248  * DELWA Descriptor
1249  * - the remainder of the DescriptorList is detached from the copy by setting the next_desc_addr at NULL
1250  * - the DMA control bits of the copy are cleared to do not confuse the MSF
1251  * - the copy of the last descriptor (i.e. the "old" DELWA Descriptor) is chained to the prev Descriptor
1252  * of the FrameList, thus replacing the original last Descriptor of the FrameList.
1253  * - IFB_FirstDesc is changed to the address of that replaced (original) last descriptor of the FrameList,
1254  * i.e. the "new" DELWA Descriptor.
1255  *
1256  * This function makes a copy of that last host-owned descriptor, so the MSF will get a copy of the descriptor.
1257  * On top of that, it adjusts DMA related fields in the IFB structure.
1258  // perform a copying-scheme to circumvent the 'last host owned descriptor cannot be reclaimed' limitation imposed by H2.5's DMA hardware design
1259  // a 'reclaim descriptor' should be available in the HCF:
1260  *
1261  * Returns: address of the first descriptor of the FrameList
1262  *
1263  8: Be careful once you start re-ordering the steps in the copy process, that it still works for cases
1264  * of FrameLists of 1, 2 and more than 2 descriptors
1265  *
1266  * Input parameters:
1267  * tx_rx_flag : specifies 'transmit' or 'receive' descriptor.
1268  *
1269  ************************************************************************************************************/
1271 get_frame_lst( IFBP ifbp, int tx_rx_flag )
1272 {
1273 
1274  DESC_STRCT *head = ifbp->IFB_FirstDesc[tx_rx_flag];
1275  DESC_STRCT *copy, *p, *prev;
1276 
1277  HCFASSERT( tx_rx_flag == DMA_RX || tx_rx_flag == DMA_TX, tx_rx_flag );
1278  //if FrameList
1279  if ( head ) {
1280  //. search for last descriptor of first FrameList
1281  p = prev = head;
1282  while ( ( p->BUF_SIZE & DESC_EOP ) == 0 && p->next_desc_addr ) {
1283  if ( ( ifbp->IFB_CntlOpt & DMA_ENABLED ) == 0 ) { //clear control bits when disabled
1284  p->BUF_CNT &= DESC_CNT_MASK;
1285  }
1286  prev = p;
1287  p = p->next_desc_addr;
1288  }
1289  //. if DMA enabled
1290  if ( ifbp->IFB_CntlOpt & DMA_ENABLED ) {
1291  //. . if last descriptor of FrameList is DMA owned
1292  //. . or if FrameList is single (DELWA) Descriptor
1293  if ( p->BUF_CNT & DESC_DMA_OWNED || head->next_desc_addr == NULL ) {
1294  //. . . refuse to return FrameList to caller
1295  head = NULL;
1296  }
1297  }
1298  }
1299  //if returnable FrameList found
1300  if ( head ) {
1301  //. if FrameList is single (DELWA) Descriptor (implies DMA disabled)
1302  if ( head->next_desc_addr == NULL ) {
1303  //. . clear DescriptorList
1304  /*;?ifbp->IFB_LastDesc[tx_rx_flag] =*/ ifbp->IFB_FirstDesc[tx_rx_flag] = NULL;
1305  //. else
1306  } else {
1307  //. . strip hardware-related bits from last descriptor
1308  //. . remove DELWA Descriptor from head of DescriptorList
1309  copy = head;
1310  head = head->next_desc_addr;
1311  //. . exchange first (Confined) and last (possibly imprisoned) Descriptor
1312  copy->buf_phys_addr = p->buf_phys_addr;
1313  copy->buf_addr = p->buf_addr;
1314  copy->BUF_SIZE = p->BUF_SIZE &= DESC_CNT_MASK; //get rid of DESC_EOP and possibly DESC_SOP
1315  copy->BUF_CNT = p->BUF_CNT &= DESC_CNT_MASK; //get rid of DESC_DMA_OWNED
1316 #if (HCF_EXT) & HCF_DESC_STRCT_EXT
1317  copy->DESC_MSFSup = p->DESC_MSFSup;
1318 #endif // HCF_DESC_STRCT_EXT
1319  //. . turn into a DELWA Descriptor
1320  p->buf_addr = NULL;
1321  //. . chain copy to prev /* 8*/
1322  prev->next_desc_addr = copy;
1323  //. . detach remainder of the DescriptorList from FrameList
1324  copy->next_desc_addr = NULL;
1325  copy->next_desc_phys_addr = 0xDEAD0000;
1326  //. . save the new start (i.e. DELWA Descriptor) in IFB_FirstDesc
1327  ifbp->IFB_FirstDesc[tx_rx_flag] = p;
1328  }
1329  //. strip DESC_SOP from first descriptor
1330  head->BUF_SIZE &= DESC_CNT_MASK;
1331  //head->BUF_CNT &= DESC_CNT_MASK; get rid of DESC_DMA_OWNED
1332  head->next_desc_phys_addr = 0xDEAD0000;
1333  }
1334  //return the just detached FrameList (if any)
1335  return head;
1336 } // get_frame_lst
1337 
1338 
1339 /************************************************************************************************************
1340  * Function put_frame_lst
1341  *
1342  * This function
1343  *
1344  * Returns: address of the first descriptor of the FrameList
1345  *
1346  * Input parameters:
1347  * tx_rx_flag : specifies 'transmit' or 'receive' descriptor.
1348  *
1349  * The following list should be kept in sync with hcf_dma_tx/rx_put, in order to get them in the WCI-spec !!!!
1350  * Assert fails if
1351  * - DMA is not enabled
1352  * - descriptor list is NULL
1353  * - a descriptor in the descriptor list is not double word aligned
1354  * - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1355  * - the DELWA descriptor is not a "singleton" DescriptorList.
1356  * - the DELWA descriptor is not the first Descriptor supplied
1357  * - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1358  * - Possibly more checks could be added !!!!!!!!!!!!!
1359 
1360  *.NOTICE
1361  * The asserts marked with *sc* are really sanity checks for the HCF, they can (supposedly) not be influenced
1362  * by incorrect MSF behavior
1363 
1364  // The MSF is required to supply the HCF with a single descriptor for MSF tx reclaim purposes.
1365  // This 'reclaim descriptor' can be recognized by the fact that its buf_addr field is zero.
1366  *********************************************************************************************
1367  * Although not required from a hardware perspective:
1368  * - make each descriptor in this rx-chain DMA-owned.
1369  * - Also set the count to zero. EOP and SOP bits are also cleared.
1370  *********************************************************************************************/
1371 HCF_STATIC void
1372 put_frame_lst( IFBP ifbp, DESC_STRCT *descp, int tx_rx_flag )
1373 {
1374  DESC_STRCT *p = descp;
1375  hcf_16 port;
1376 
1377  HCFASSERT( ifbp->IFB_CntlOpt & USE_DMA, ifbp->IFB_CntlOpt); //only hcf_dma_tx_put must also be DMA_ENABLED
1378  HCFASSERT( tx_rx_flag == DMA_RX || tx_rx_flag == DMA_TX, tx_rx_flag );
1379  HCFASSERT( p , 0 );
1380 
1381  while ( p ) {
1382  HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p );
1383  HCFASSERT( (p->BUF_CNT & ~DESC_CNT_MASK) == 0, p->BUF_CNT );
1384  HCFASSERT( (p->BUF_SIZE & ~DESC_CNT_MASK) == 0, p->BUF_SIZE );
1385  p->BUF_SIZE &= DESC_CNT_MASK;
1386  p->BUF_CNT &= tx_rx_flag == DMA_RX ? 0 : DESC_CNT_MASK;
1387  p->BUF_CNT |= DESC_DMA_OWNED;
1388  if ( p->next_desc_addr ) {
1389 // HCFASSERT( p->buf_addr && p->buf_phys_addr && p->BUF_SIZE && +/- p->BUF_SIZE, ... );
1390  HCFASSERT( p->next_desc_addr->desc_phys_addr, (hcf_32)p->next_desc_addr );
1391  p->next_desc_phys_addr = p->next_desc_addr->desc_phys_addr;
1392  } else { //
1393  p->next_desc_phys_addr = 0;
1394  if ( p->buf_addr == NULL ) { // DELWA Descriptor
1395  HCFASSERT( descp == p, (hcf_32)descp ); //singleton DescriptorList
1396  HCFASSERT( ifbp->IFB_FirstDesc[tx_rx_flag] == NULL, (hcf_32)ifbp->IFB_FirstDesc[tx_rx_flag]);
1397  HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag] == NULL, (hcf_32)ifbp->IFB_LastDesc[tx_rx_flag]);
1398  descp->BUF_CNT = 0; //&= ~DESC_DMA_OWNED;
1399  ifbp->IFB_FirstDesc[tx_rx_flag] = descp;
1400 // part of alternative ifbp->IFB_LastDesc[tx_rx_flag] = ifbp->IFB_FirstDesc[tx_rx_flag] = descp;
1401  // if "recycling" a FrameList
1402  // (e.g. called from hcf_cntl( HCF_CNTL_ENABLE )
1403  // . prepare for activation DMA controller
1404 // part of alternative descp = descp->next_desc_addr;
1405  } else { //a "real" FrameList, hand it over to the DMA engine
1406  HCFASSERT( ifbp->IFB_FirstDesc[tx_rx_flag], (hcf_32)descp );
1407  HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag], (hcf_32)descp );
1408  HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr == NULL,
1409  (hcf_32)ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr);
1410 // p->buf_cntl.cntl_stat |= DESC_DMA_OWNED;
1411  ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr = descp;
1412  ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_phys_addr = descp->desc_phys_addr;
1413  port = HREG_RXDMA_PTR32;
1414  if ( tx_rx_flag ) {
1415  p->BUF_SIZE |= DESC_EOP; // p points at the last descriptor in the caller-supplied descriptor chain
1416  descp->BUF_SIZE |= DESC_SOP;
1417  port = HREG_TXDMA_PTR32;
1418  }
1419  OUT_PORT_DWORD( (ifbp->IFB_IOBase + port), descp->desc_phys_addr );
1420  }
1421  ifbp->IFB_LastDesc[tx_rx_flag] = p;
1422  }
1423  p = p->next_desc_addr;
1424  }
1425 } // put_frame_lst
1426 
1427 
1428 /************************************************************************************************************
1429  *
1430  *.MODULE DESC_STRCT* hcf_dma_rx_get( IFBP ifbp )
1431  *.PURPOSE decapsulate a message and provides that message to the MSF.
1432  * reclaim all descriptors in the rx descriptor chain.
1433  *
1434  *.ARGUMENTS
1435  * ifbp address of the Interface Block
1436  *
1437  *.RETURNS
1438  * pointer to a FrameList
1439  *
1440  *.DESCRIPTION
1441  * hcf_dma_rx_get is intended to return a received frame when such a frame is deposited in Host memory by the
1442  * DMA engine. In addition hcf_dma_rx_get can be used to reclaim all descriptors in the rx descriptor chain
1443  * when the DMA Engine is disabled, e.g. as part of a driver unloading strategy.
1444  * hcf_dma_rx_get must be called repeatedly by the MSF when hcf_service_nic signals availability of a rx frame
1445  * through the HREG_EV_RDMAD flag of IFB_DmaPackets. The calling must stop when a NULL pointer is returned, at
1446  * which time the HREG_EV_RDMAD flag is also cleared by the HCF to arm the mechanism for the next frame
1447  * reception.
1448  * Regardless whether the DMA Engine is currently enabled (as controlled via hcf_cntl), if the DMA controller
1449  * deposited an Rx-frame in the Rx-DescriptorList, this frame is detached from the Rx-DescriptorList,
1450  * transformed into a FrameList (i.e. updating the housekeeping fields in the descriptors) and returned to the
1451  * caller.
1452  * If no such Rx-frame is available in the Rx-DescriptorList, the behavior of hcf_dma_rx_get depends on the
1453  * status of the DMA Engine.
1454  * If the DMA Engine is enabled, a NULL pointer is returned.
1455  * If the DMA Engine is disabled, the following strategy is used:
1456  * - the complete Rx-DescriptorList is returned. The DELWA Descriptor is not part of the Rx-DescriptorList.
1457  * - If there is no Rx-DescriptorList, the DELWA Descriptor is returned.
1458  * - If there is no DELWA Descriptor, a NULL pointer is returned.
1459  *
1460  * If the MSF performs an disable/enable sequence without exhausting the Rx-DescriptorList as described above,
1461  * the enable command will reset all house keeping information, i.e. already received but not yet by the MSF
1462  * retrieved frames are lost and the next frame will be received starting with the oldest descriptor.
1463  *
1464  * The HCF can be used in 2 fashions: with and without decapsulation for data transfer.
1465  * This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1466  * If appropriate, decapsulation is done by moving some data inside the buffers and updating the descriptors
1467  * accordingly.
1468  *!! ;?????where did I describe why a simple manipulation with the count values does not suffice?
1469  *
1470  *.DIAGRAM
1471  *
1472  *.ENDDOC END DOCUMENTATION
1473  *
1474  ************************************************************************************************************/
1475 
1476 DESC_STRCT*
1477 hcf_dma_rx_get (IFBP ifbp)
1478 {
1479  DESC_STRCT *descp; // pointer to start of FrameList
1480 
1481  descp = get_frame_lst( ifbp, DMA_RX );
1482  if ( descp && descp->buf_addr ) {
1483 
1484  //skip decapsulation at confined descriptor
1485 #if (HCF_ENCAP) == HCF_ENC
1486  int i;
1487  DESC_STRCT *p = descp->next_desc_addr; //pointer to 2nd descriptor of frame
1488  HCFASSERT(p, 0);
1489  // The 2nd descriptor contains (maybe) a SNAP header plus part or whole of the payload.
1490  //determine decapsulation sub-flag in RxFS
1492  if ( i == HFS_STAT_TUNNEL ||
1493  ( i == HFS_STAT_1042 && hcf_encap( (wci_bufp)&p->buf_addr[HCF_DASA_SIZE] ) != ENC_TUNNEL )) {
1494  // The 2nd descriptor contains a SNAP header plus part or whole of the payload.
1495  HCFASSERT( p->BUF_CNT == (p->buf_addr[5] + (p->buf_addr[4]<<8) + 2*6 + 2 - 8), p->BUF_CNT );
1496  // perform decapsulation
1497  HCFASSERT(p->BUF_SIZE >=8, p->BUF_SIZE);
1498  // move SA[2:5] in the second buffer to replace part of the SNAP header
1499  for ( i=3; i >= 0; i--) p->buf_addr[i+8] = p->buf_addr[i];
1500  // copy DA[0:5], SA[0:1] from first buffer to second buffer
1501  for ( i=0; i<8; i++) p->buf_addr[i] = descp->buf_addr[HFS_ADDR_DEST + i];
1502  // make first buffer shorter in count
1503  descp->BUF_CNT = HFS_ADDR_DEST;
1504  }
1505  }
1506 #endif // HCF_ENC
1507  if ( descp == NULL ) ifbp->IFB_DmaPackets &= (hcf_16)~HREG_EV_RDMAD; //;?could be integrated into get_frame_lst
1509  return descp;
1510 } // hcf_dma_rx_get
1511 
1512 
1513 /************************************************************************************************************
1514  *
1515  *.MODULE void hcf_dma_rx_put( IFBP ifbp, DESC_STRCT *descp )
1516  *.PURPOSE supply buffers for receive purposes.
1517  * supply the Rx-DELWA descriptor.
1518  *
1519  *.ARGUMENTS
1520  * ifbp address of the Interface Block
1521  * descp address of a DescriptorList
1522  *
1523  *.RETURNS N.A.
1524  *
1525  *.DESCRIPTION
1526  * This function is called by the MSF to supply the HCF with new/more buffers for receive purposes.
1527  * The HCF can be used in 2 fashions: with and without encapsulation for data transfer.
1528  * This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1529  * As a consequence, some additional constraints apply to the number of descriptor and the buffers associated
1530  * with the first 2 descriptors. Independent of the encapsulation feature, the COUNT fields are ignored.
1531  * A special case is the supplying of the DELWA descriptor, which must be supplied as the first descriptor.
1532  *
1533  * Assert fails if
1534  * - ifbp has a recognizable out-of-range value.
1535  * - NIC interrupts are not disabled while required by parameter action.
1536  * - in case decapsulation by the HCF is selected:
1537  * - The first databuffer does not have the exact size corresponding with the RxFS up to the 802.3 DestAddr
1538  * field (== 29 words).
1539  * - The FrameList does not consists of at least 2 Descriptors.
1540  * - The second databuffer does not have the minimum size of 8 bytes.
1541  *!! The 2nd part of the list of asserts should be kept in sync with put_frame_lst, in order to get
1542  *!! them in the WCI-spec !!!!
1543  * - DMA is not enabled
1544  * - descriptor list is NULL
1545  * - a descriptor in the descriptor list is not double word aligned
1546  * - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1547  * - the DELWA descriptor is not a "singleton" DescriptorList.
1548  * - the DELWA descriptor is not the first Descriptor supplied
1549  * - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1550  *!! - Possibly more checks could be added !!!!!!!!!!!!!
1551  *
1552  *.DIAGRAM
1553  *
1554  *
1555  *.ENDDOC END DOCUMENTATION
1556  *
1557  ************************************************************************************************************/
1558 void
1559 hcf_dma_rx_put( IFBP ifbp, DESC_STRCT *descp )
1560 {
1561 
1562  HCFLOGENTRY( HCF_TRACE_DMA_RX_PUT, 0xDA01 );
1563  HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
1564  HCFASSERT_INT;
1565 
1566  put_frame_lst( ifbp, descp, DMA_RX );
1567 #if HCF_ASSERT && (HCF_ENCAP) == HCF_ENC
1568  if ( descp->buf_addr ) {
1569  HCFASSERT( descp->BUF_SIZE == HCF_DMA_RX_BUF1_SIZE, descp->BUF_SIZE );
1570  HCFASSERT( descp->next_desc_addr, 0 ); // first descriptor should be followed by another descriptor
1571  // The second DB is for SNAP and payload purposes. It should be a minimum of 12 bytes in size.
1572  HCFASSERT( descp->next_desc_addr->BUF_SIZE >= 12, descp->next_desc_addr->BUF_SIZE );
1573  }
1574 #endif // HCFASSERT / HCF_ENC
1576 } // hcf_dma_rx_put
1577 
1578 
1579 /************************************************************************************************************
1580  *
1581  *.MODULE DESC_STRCT* hcf_dma_tx_get( IFBP ifbp )
1582  *.PURPOSE DMA mode: reclaims and decapsulates packets in the tx descriptor chain if:
1583  * - A Tx packet has been copied from host-RAM into NIC-RAM by the DMA engine
1584  * - The Hermes/DMAengine have been disabled
1585  *
1586  *.ARGUMENTS
1587  * ifbp address of the Interface Block
1588  *
1589  *.RETURNS
1590  * pointer to a reclaimed Tx packet.
1591  *
1592  *.DESCRIPTION
1593  * impact of the disable command:
1594  * When a non-empty pool of Tx descriptors exists (created by means of hcf_dma_put_tx), the MSF
1595  * is supposed to empty that pool by means of hcf_dma_tx_get calls after the disable in an
1596  * disable/enable sequence.
1597  *
1598  *.DIAGRAM
1599  *
1600  *.NOTICE
1601  *
1602  *.ENDDOC END DOCUMENTATION
1603  *
1604  ************************************************************************************************************/
1605 DESC_STRCT*
1606 hcf_dma_tx_get( IFBP ifbp )
1607 {
1608  DESC_STRCT *descp; // pointer to start of FrameList
1609 
1610  descp = get_frame_lst( ifbp, DMA_TX );
1611  if ( descp && descp->buf_addr ) {
1612  //skip decapsulation at confined descriptor
1613 #if (HCF_ENCAP) == HCF_ENC
1614  if ( ( descp->BUF_CNT == HFS_TYPE )) {
1615  // perform decapsulation if needed
1616  descp->next_desc_addr->buf_phys_addr -= HCF_DASA_SIZE;
1617  descp->next_desc_addr->BUF_CNT += HCF_DASA_SIZE;
1618  }
1619 #endif // HCF_ENC
1620  }
1621  if ( descp == NULL ) { //;?could be integrated into get_frame_lst
1622  ifbp->IFB_DmaPackets &= (hcf_16)~HREG_EV_TDMAD;
1623  }
1625  return descp;
1626 } // hcf_dma_tx_get
1627 
1628 
1629 /************************************************************************************************************
1630  *
1631  *.MODULE void hcf_dma_tx_put( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
1632  *.PURPOSE puts a packet in the Tx DMA queue in host ram and kicks off the TxDma engine.
1633  * supply the Tx-DELWA descriptor.
1634  *
1635  *.ARGUMENTS
1636  * ifbp address of the Interface Block
1637  * descp address of Tx Descriptor Chain (i.e. a single Tx frame)
1638  * tx_cntl indicates MAC-port and (Hermes) options
1639  *
1640  *.RETURNS N.A.
1641  *
1642  *.DESCRIPTION
1643  * The HCF can be used in 2 fashions: with and without encapsulation for data transfer.
1644  * This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1645  *
1646  * Regardless of the HCF_ENCAP system constant, the descriptor list created to describe the frame to be
1647  * transmitted, must supply space to contain the 802.11 header, preceding the actual frame to be transmitted.
1648  * Basically, this only supplies working storage to the HCF which passes this on to the DMA engine.
1649  * As a consequence the contents of this space do not matter.
1650  * Nevertheless BUF_CNT must take in account this storage.
1651  * This working space to contain the 802.11 header may not be fragmented, the first buffer must be
1652  * sufficiently large to contain at least the 802.11 header, i.e. HFS_ADDR_DEST (29 words or 0x3A bytes).
1653  * This way, the HCF can simply, regardless whether or not the HCF encapsulates the frame, write the parameter
1654  * tx_cntl at offset 0x36 (HFS_TX_CNTL) in the first buffer.
1655  * Note that it is allowed to have part or all of the actual frame represented by the first descriptor as long
1656  * as the requirement for storage for the 802.11 header is met, i.e. the 802.3 frame starts at offset
1657  * HFS_ADDR_DEST.
1658  * Except for the Assert on the 1st buffer in case of Encapsualtion, the SIZE fields are ignored.
1659  *
1660  * In case the encapsulation feature is compiled in, there are the following additional requirements.
1661  * o The BUF_CNT of the first buffer changes from a minimum of 0x3A bytes to exactly 0x3A, i.e. the workspace
1662  * to store the 802.11 header
1663  * o The BUF_SIZE of the first buffer is at least the space needed to store the
1664  * - 802.11 header (29 words)
1665  * - 802.3 header, i.e. 12 bytes addressing information and 2 bytes length field
1666  * - 6 bytes SNAP-header
1667  * This results in 39 words or 0x4E bytes or HFS_TYPE.
1668  * Note that if the BUF_SIZE is larger than 0x4E, this surplus is not used.
1669  * o The actual frame begins in the 2nd descriptor (which is already implied by the BUF_CNT == 0x3A requirement) and the associated buffer contains at least the 802.3 header, i.e. the 14 bytes representing addressing information and length/type field
1670  *
1671  * When the HCF does not encapsulates (i.e. length/type field <= 1500), no changes are made to descriptors
1672  * or buffers.
1673  *
1674  * When the HCF actually encapsulates (i.e. length/type field > 1500), it successively writes, starting at
1675  * offset HFS_ADDR_DEST (0x3A) in the first buffer:
1676  * - the 802.3 addressing information, copied from the begin of the second buffer
1677  * - the frame length, derived from the total length of the individual fragments, corrected for the SNAP
1678  * header length and Type field and ignoring the Destination Address, Source Address and Length field
1679  * - the appropriate snap header (Tunnel or 1042, depending on the value of the type field).
1680  *
1681  * The information in the first two descriptors is adjusted accordingly:
1682  * - the first descriptor count is changed from 0x3A to 0x4E (HFS_TYPE), which matches 0x3A + 12 + 2 + 6
1683  * - the second descriptor count is decreased by 12, being the moved addressing information
1684  * - the second descriptor (physical) buffer address is increased by 12.
1685  *
1686  * When the descriptors are returned by hcf_dma_tx_get, the transformation of the first two descriptors is
1687  * undone.
1688  *
1689  * Under any of the above scenarios, the assert BUF_CNT <= BUF_SIZE must be true for all descriptors
1690  * In case of encapsulation, BUF_SIZE of the 1st descriptor is asserted to be at least HFS_TYPE (0x4E), so it is NOT tested.
1691  *
1692  * Assert fails if
1693  * - ifbp has a recognizable out-of-range value.
1694  * - tx_cntl has a recognizable out-of-range value.
1695  * - NIC interrupts are not disabled while required by parameter action.
1696  * - in case encapsulation by the HCF is selected:
1697  * - The FrameList does not consists of at least 2 Descriptors.
1698  * - The first databuffer does not contain exactly the (space for) the 802.11 header (== 28 words)
1699  * - The first databuffer does not have a size to additionally accommodate the 802.3 header and the
1700  * SNAP header of the frame after encapsulation (== 39 words).
1701  * - The second databuffer does not contain at least DA, SA and 'type/length' (==14 bytes or 7 words)
1702  *!! The 2nd part of the list of asserts should be kept in sync with put_frame_lst, in order to get
1703  *!! them in the WCI-spec !!!!
1704  * - DMA is not enabled
1705  * - descriptor list is NULL
1706  * - a descriptor in the descriptor list is not double word aligned
1707  * - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1708  * - the DELWA descriptor is not a "singleton" DescriptorList.
1709  * - the DELWA descriptor is not the first Descriptor supplied
1710  * - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1711  *!! - Possibly more checks could be added !!!!!!!!!!!!!
1712  *.DIAGRAM
1713  *
1714  *.NOTICE
1715  *
1716  *.ENDDOC END DOCUMENTATION
1717  *
1718  *
1719  *1: Write tx_cntl parameter to HFS_TX_CNTL field into the Hermes-specific header in buffer 1
1720  *4: determine whether encapsulation is needed and write the type (tunnel or 1042) already at the appropriate
1721  * offset in the 1st buffer
1722  *6: Build the encapsualtion enveloppe in the free space at the end of the 1st buffer
1723  * - Copy DA/SA fields from the 2nd buffer
1724  * - Calculate total length of the message (snap-header + type-field + the length of all buffer fragments
1725  * associated with the 802.3 frame (i.e all descriptors except the first), but not the DestinationAddress,
1726  * SourceAddress and length-field)
1727  * Assert the message length
1728  * Write length. Note that the message is in BE format, hence on LE platforms the length must be converted
1729  * ;? THIS IS NOT WHAT CURRENTLY IS IMPLEMENTED
1730  * - Write snap header. Note that the last byte of the snap header is NOT copied, that byte is already in
1731  * place as result of the call to hcf_encap.
1732  * Note that there are many ways to skin a cat. To express the offsets in the 1st buffer while writing
1733  * the snap header, HFS_TYPE is chosen as a reference point to make it easier to grasp that the snap header
1734  * and encapsualtion type are at least relative in the right.
1735  *8: modify 1st descriptor to reflect moved part of the 802.3 header + Snap-header
1736  * modify 2nd descriptor to skip the moved part of the 802.3 header (DA/SA
1737  *10: set each descriptor to 'DMA owned', clear all other control bits.
1738  * Set SOP bit on first descriptor. Set EOP bit on last descriptor.
1739  *12: Either append the current frame to an existing descriptor list or
1740  *14: create a list beginning with the current frame
1741  *16: remember the new end of the list
1742  *20: hand the frame over to the DMA engine
1743  ************************************************************************************************************/
1744 void
1745 hcf_dma_tx_put( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
1746 {
1747  DESC_STRCT *p = descp->next_desc_addr;
1748  int i;
1749 
1750 #if HCF_ASSERT
1751  int x = ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ? tx_cntl & ~HFS_TX_CNTL_PORT : tx_cntl;
1752  HCFASSERT( (x & ~HCF_TX_CNTL_MASK ) == 0, tx_cntl );
1753 #endif // HCF_ASSERT
1754  HCFLOGENTRY( HCF_TRACE_DMA_TX_PUT, 0xDA03 );
1755  HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
1756  HCFASSERT_INT;
1758 
1759  if ( descp->buf_addr ) {
1760  *(hcf_16*)(descp->buf_addr + HFS_TX_CNTL) = tx_cntl; /*1*/
1761 #if (HCF_ENCAP) == HCF_ENC
1762  HCFASSERT( descp->next_desc_addr, 0 ); //at least 2 descripors
1763  HCFASSERT( descp->BUF_CNT == HFS_ADDR_DEST, descp->BUF_CNT ); //exact length required for 1st buffer
1764  HCFASSERT( descp->BUF_SIZE >= HCF_DMA_TX_BUF1_SIZE, descp->BUF_SIZE ); //minimal storage for encapsulation
1765  HCFASSERT( p->BUF_CNT >= 14, p->BUF_CNT ); //at least DA, SA and 'type' in 2nd buffer
1766 
1767  descp->buf_addr[HFS_TYPE-1] = hcf_encap(&descp->next_desc_addr->buf_addr[HCF_DASA_SIZE]); /*4*/
1768  if ( descp->buf_addr[HFS_TYPE-1] != ENC_NONE ) {
1769  for ( i=0; i < HCF_DASA_SIZE; i++ ) { /*6*/
1770  descp->buf_addr[i + HFS_ADDR_DEST] = descp->next_desc_addr->buf_addr[i];
1771  }
1772  i = sizeof(snap_header) + 2 - ( 2*6 + 2 );
1773  do { i += p->BUF_CNT; } while ( ( p = p->next_desc_addr ) != NULL );
1774  *(hcf_16*)(&descp->buf_addr[HFS_LEN]) = CNV_END_SHORT(i);
1775  for ( i=0; i < sizeof(snap_header) - 1; i++) {
1776  descp->buf_addr[HFS_TYPE - sizeof(snap_header) + i] = snap_header[i];
1777  }
1778  descp->BUF_CNT = HFS_TYPE; /*8*/
1779  descp->next_desc_addr->buf_phys_addr += HCF_DASA_SIZE;
1780  descp->next_desc_addr->BUF_CNT -= HCF_DASA_SIZE;
1781  }
1782 #endif // HCF_ENC
1783  }
1784  put_frame_lst( ifbp, descp, DMA_TX );
1786 } // hcf_dma_tx_put
1787 
1788 #endif // HCF_DMA
1789 
1790 /************************************************************************************************************
1791  *
1792  *.MODULE hcf_8 hcf_encap( wci_bufp type )
1793  *.PURPOSE test whether RFC1042 or Bridge-Tunnel encapsulation is needed.
1794  *
1795  *.ARGUMENTS
1796  * type (Far) pointer to the (Big Endian) Type/Length field in the message
1797  *
1798  *.RETURNS
1799  * ENC_NONE len/type is "len" ( (BIG_ENDIAN)type <= 1500 )
1800  * ENC_TUNNEL len/type is "type" and 0x80F3 or 0x8137
1801  * ENC_1042 len/type is "type" but not 0x80F3 or 0x8137
1802  *
1803  *.CONDITIONS
1804  * NIC Interrupts d.c
1805  *
1806  *.DESCRIPTION
1807  * Type must point to the Len/Type field of the message, this is the 2-byte field immediately after the 6 byte
1808  * Destination Address and 6 byte Source Address. The 2 successive bytes addressed by type are interpreted as
1809  * a Big Endian value. If that value is less than or equal to 1500, the message is assumed to be in 802.3
1810  * format. Otherwise the message is assumed to be in Ethernet-II format. Depending on the value of Len/Typ,
1811  * Bridge Tunnel or RFC1042 encapsulation is needed.
1812  *
1813  *.DIAGRAM
1814  *
1815  * 1: presume 802.3, hence preset return value at ENC_NONE
1816  * 2: convert type from "network" Endian format to native Endian
1817  * 4: the litmus test to distinguish type and len.
1818  * The hard code "magic" value of 1500 is intentional and should NOT be replaced by a mnemonic because it is
1819  * not related at all to the maximum frame size supported by the Hermes.
1820  * 6: check type against:
1821  * 0x80F3 //AppleTalk Address Resolution Protocol (AARP)
1822  * 0x8137 //IPX
1823  * to determine the type of encapsulation
1824  *
1825  *.ENDDOC END DOCUMENTATION
1826  *
1827  ************************************************************************************************************/
1830 {
1831 
1832  hcf_8 rc = ENC_NONE; /* 1 */
1833  hcf_16 t = (hcf_16)(*type<<8) + *(type+1); /* 2 */
1834 
1835  if ( t > 1500 ) { /* 4 */
1836  if ( t == 0x8137 || t == 0x80F3 ) {
1837  rc = ENC_TUNNEL; /* 6 */
1838  } else {
1839  rc = ENC_1042;
1840  }
1841  }
1842  return rc;
1843 } // hcf_encap
1844 
1845 
1846 /************************************************************************************************************
1847  *
1848  *.MODULE int hcf_get_info( IFBP ifbp, LTVP ltvp )
1849  *.PURPOSE Obtains transient and persistent configuration information from the Card and from the HCF.
1850  *
1851  *.ARGUMENTS
1852  * ifbp address of the Interface Block
1853  * ltvp address of LengthTypeValue structure specifying the "what" and the "how much" of the
1854  * information to be collected from the HCF or from the Hermes
1855  *
1856  *.RETURNS
1857  * HCF_ERR_LEN The provided buffer was too small
1858  * HCF_SUCCESS Success
1859  *!! via cmd_exe ( type >= CFG_RID_FW_MIN )
1860  * HCF_ERR_NO_NIC NIC removed during retrieval
1861  * HCF_ERR_TIME_OUT Expected Hermes event did not occur in expected time
1862  *!! via cmd_exe and setup_bap (type >= CFG_RID_FW_MIN )
1863  * HCF_ERR_DEFUNCT_... HCF is in defunct mode (bits 0x7F reflect cause)
1864  *
1865  *.DESCRIPTION
1866  * The T-field of the LTV-record (provided by the MSF in parameter ltvp) specifies the RID wanted. The RID
1867  * information identified by the T-field is copied into the V-field.
1868  * On entry, the L-field specifies the size of the buffer, also called the "Initial DataLength". The L-value
1869  * includes the size of the T-field, but not the size of the L-field itself.
1870  * On return, the L-field indicates the number of words actually contained by the Type and Value fields.
1871  * As the size of the Type field in the LTV-record is included in the "Initial DataLength" of the record, the
1872  * V-field can contain at most "Initial DataLength" - 1 words of data.
1873  * Copying stops if either the complete Information is copied or if the number of words indicated by the
1874  * "Initial DataLength" were copied. The "Initial DataLength" acts as a safe guard against Configuration
1875  * Information blocks that have different sizes for different F/W versions, e.g. when later versions support
1876  * more tallies than earlier versions.
1877  * If the size of Value field of the RID exceeds the size of the "Initial DataLength" -1, as much data
1878  * as fits is copied, and an error status of HCF_ERR_LEN is returned.
1879  *
1880  * It is the responsibility of the MSF to detect card removal and re-insertion and not call the HCF when the
1881  * NIC is absent. The MSF cannot, however, timely detect a Card removal if the Card is removed while
1882  * hcf_get_info is in progress. Therefore, the HCF performs its own check on Card presence after the read
1883  * operation of the NIC data. If the Card is not present or removed during the execution of hcf_get_info,
1884  * HCF_ERR_NO_NIC is returned and the content of the Data Buffer is unpredictable. This check is not performed
1885  * in case of the "HCF embedded" pseudo RIDs like CFG_TALLIES.
1886  *
1887  * Assert fails if
1888  * - ifbp has a recognizable out-of-range value.
1889  * - reentrancy, may be caused by calling hcf_functions without adequate protection
1890  * against NIC interrupts or multi-threading.
1891  * - ltvp is a NULL pointer.
1892  * - length field of the LTV-record at entry is 0 or 1 or has an excessive value (i.e. exceeds HCF_MAX_LTV).
1893  * - type field of the LTV-record is invalid.
1894  *
1895  *.DIAGRAM
1896  * Hcf_get_mb_info copies the contents of the oldest MailBox Info block in the MailBox to PC RAM. If len is
1897  * less than the size of the MailBox Info block, only as much as fits in the PC RAM buffer is copied. After
1898  * the copying the MailBox Read pointer is updated to point to the next MailBox Info block, hence the
1899  * remainder of an "oversized" MailBox Info block is lost. The truncation of the MailBox Info block is NOT
1900  * reflected in the return status. Note that hcf_get_info guarantees the length of the PC RAM buffer meets
1901  * the minimum requirements of at least 2, so no PC RAM buffer overrun.
1902  *
1903  * Calling hcf_get_mb_info when their is no MailBox Info block available or when there is no MailBox at all,
1904  * results in a "NULL" MailBox Info block.
1905  *
1906  *12: see NOTICE
1907  *17: The return status of cmd_wait and the first hcfio_in_string can be ignored, because when one fails, the
1908  * other fails via the IFB_DefunctStat mechanism
1909  *20: "HCFASSERT( rc == HCF_SUCCESS, rc )" is not suitable because this will always trigger as side effect of
1910  * the HCFASSERT in hcf_put_info which calls hcf_get_info to figure out whether the RID exists at all.
1911 
1912  *.NOTICE
1913  *
1914  * "HCF embedded" pseudo RIDs:
1915  * CFG_MB_INFO, CFG_TALLIES, CFG_DRV_IDENTITY, CFG_DRV_SUP_RANGE, CFG_DRV_ACT_RANGES_PRI,
1916  * CFG_DRV_ACT_RANGES_STA, CFG_DRV_ACT_RANGES_HSI
1917  * Note the HCF_ERR_LEN is NOT adequately set, when L >= 2 but less than needed
1918  *
1919  * Remarks: Transfers operation information and transient and persistent configuration information from the
1920  * Card and from the HCF to the MSF.
1921  * The exact layout of the provided data structure depends on the action code. Copying stops if either the
1922  * complete Configuration Information is copied or if the number of bytes indicated by len is copied. Len
1923  * acts as a safe guard against Configuration Information blocks which have different sizes for different
1924  * Hermes versions, e.g. when later versions support more tallies than earlier versions. It is a conscious
1925  * decision that unused parts of the PC RAM buffer are not cleared.
1926  *
1927  * Remarks: The only error against which is protected is the "Read error" as result of Card removal. Only the
1928  * last hcf_io_string need to be protected because if the first fails the second will fail as well. Checking
1929  * for cmd_exe errors is supposed superfluous because problems in cmd_exe are already caught or will be
1930  * caught by hcf_enable.
1931  *
1932  * CFG_MB_INFO: copy the oldest MailBox Info Block or the "null" block if none available.
1933  *
1934  * The mechanism to HCF_ASSERT on invalid typ-codes in the LTV record is based on the following strategy:
1935  * - during the pseudo-asynchronous Hermes commands (diagnose, download) only CFG_MB_INFO is acceptable
1936  * - some codes (e.g. CFG_TALLIES) are explicitly handled by the HCF which implies that these codes
1937  * are valid
1938  * - all other codes in the range 0xFC00 through 0xFFFF are passed to the Hermes. The Hermes returns an
1939  * LTV record with a zero value in the L-field for all Typ-codes it does not recognize. This is
1940  * defined and intended behavior, so HCF_ASSERT does not catch on this phenomena.
1941  * - all remaining codes are invalid and cause an ASSERT.
1942  *
1943  *.CONDITIONS
1944  * In case of USB, HCF_MAX_MSG ;?USED;? to limit the amount of data that can be retrieved via hcf_get_info.
1945  *
1946  *
1947  *.ENDDOC END DOCUMENTATION
1948  *
1949  ************************************************************************************************************/
1950 int
1951 hcf_get_info( IFBP ifbp, LTVP ltvp )
1952 {
1953 
1954  int rc = HCF_SUCCESS;
1955  hcf_16 len = ltvp->len;
1956  hcf_16 type = ltvp->typ;
1957  wci_recordp p = &ltvp->len; //destination word pointer (in LTV record)
1958  hcf_16 *q = NULL; /* source word pointer Note!! DOS COM can't cope with FAR
1959  * as a consequence MailBox must be near which is usually true anyway
1960  */
1961  int i;
1962 
1963  HCFLOGENTRY( HCF_TRACE_GET_INFO, ltvp->typ );
1964  HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
1965  HCFASSERT_INT;
1966  HCFASSERT( ltvp, 0 );
1967  HCFASSERT( 1 < ltvp->len && ltvp->len <= HCF_MAX_LTV + 1, MERGE_2( ltvp->typ, ltvp->len ) );
1968 
1969  ltvp->len = 0; //default to: No Info Available
1970  //filter out all specials
1971  for ( i = 0; ( q = xxxx[i] ) != NULL && q[1] != type; i++ ) /*NOP*/;
1972 
1973 #if HCF_TALLIES
1974  if ( type == CFG_TALLIES ) { /*3*/
1975  (void)hcf_action( ifbp, HCF_ACT_TALLIES );
1976  q = (hcf_16*)&ifbp->IFB_TallyLen;
1977  }
1978 #endif // HCF_TALLIES
1979 
1980  if ( type == CFG_MB_INFO ) {
1981  if ( ifbp->IFB_MBInfoLen ) {
1982  if ( ifbp->IFB_MBp[ifbp->IFB_MBRp] == 0xFFFF ) {
1983  ifbp->IFB_MBRp = 0; //;?Probably superfluous
1984  }
1985  q = &ifbp->IFB_MBp[ifbp->IFB_MBRp];
1986  ifbp->IFB_MBRp += *q + 1; //update read pointer
1987  if ( ifbp->IFB_MBp[ifbp->IFB_MBRp] == 0xFFFF ) {
1988  ifbp->IFB_MBRp = 0;
1989  }
1990  ifbp->IFB_MBInfoLen = ifbp->IFB_MBp[ifbp->IFB_MBRp];
1991  }
1992  }
1993 
1994  if ( q != NULL ) { //a special or CFG_TALLIES or CFG_MB_INFO
1995  i = min( len, *q ) + 1; //total size of destination (including T-field)
1996  while ( i-- ) {
1997  *p++ = *q;
1998 #if (HCF_TALLIES) & HCF_TALLIES_RESET
1999  if ( q > &ifbp->IFB_TallyTyp && type == CFG_TALLIES ) {
2000  *q = 0;
2001  }
2002 #endif // HCF_TALLIES_RESET
2003  q++;
2004  }
2005  } else { // not a special nor CFG_TALLIES nor CFG_MB_INFO
2006  if ( type == CFG_CNTL_OPT ) { //read back effective options
2007  ltvp->len = 2;
2008  ltvp->val[0] = ifbp->IFB_CntlOpt;
2009 #if (HCF_EXT) & HCF_EXT_NIC_ACCESS
2010  } else if ( type == CFG_PROD_DATA ) { //only needed for some test tool on top of H-II NDIS driver
2011  hcf_io io_port;
2012  wci_bufp pt; //pointer with the "right" type, just to help ease writing macros with embedded assembly
2015  io_port = ifbp->IFB_IOBase + HREG_AUX_DATA; //to prevent side effects of the MSF-defined macro
2016  p = ltvp->val; //destination char pointer (in LTV record)
2017  i = len - 1;
2018  if (i > 0 ) {
2019  pt = (wci_bufp)p; //just to help ease writing macros with embedded assembly
2020  IN_PORT_STRING_8_16( io_port, pt, i ); //space used by T: -1
2021  }
2022  } else if ( type == CFG_CMD_HCF ) {
2023 #define P ((CFG_CMD_HCF_STRCT FAR *)ltvp)
2024  HCFASSERT( P->cmd == CFG_CMD_HCF_REG_ACCESS, P->cmd ); //only Hermes register access supported
2025  if ( P->cmd == CFG_CMD_HCF_REG_ACCESS ) {
2026  HCFASSERT( P->mode < ifbp->IFB_IOBase, P->mode ); //Check Register space
2027  ltvp->len = min( len, 4 ); //RESTORE ltv length
2028  P->add_info = IPW( P->mode );
2029  }
2030 #undef P
2031 #endif // HCF_EXT_NIC_ACCESS
2032 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
2033  } else if (type == CFG_FW_PRINTF) {
2034  rc = fw_printf(ifbp, (CFG_FW_PRINTF_STRCT*)ltvp);
2035 #endif // HCF_ASSERT_PRINTF
2036  } else if ( type >= CFG_RID_FW_MIN ) {
2037 //;? by using HCMD_BUSY option when calling cmd_exe, using a get_frag with length 0 just to set up the
2038 //;? BAP and calling cmd_cmpl, you could merge the 2 Busy waits. Whether this really helps (and what
2039 //;? would be the optimal sequence in cmd_exe and get_frag) would have to be MEASURED
2040  /*17*/ if ( ( rc = cmd_exe( ifbp, HCMD_ACCESS, type ) ) == HCF_SUCCESS &&
2041  ( rc = setup_bap( ifbp, type, 0, IO_IN ) ) == HCF_SUCCESS ) {
2042  get_frag( ifbp, (wci_bufp)&ltvp->len, 2*len+2 BE_PAR(2) );
2043  if ( IPW( HREG_STAT ) == 0xFFFF ) { //NIC removal test
2044  ltvp->len = 0;
2045  HCFASSERT( DO_ASSERT, type );
2046  }
2047  }
2048  /*12*/ } else HCFASSERT( DO_ASSERT, type ) /*NOP*/; //NOP in case HCFASSERT is dummy
2049  }
2050  if ( len < ltvp->len ) {
2051  ltvp->len = len;
2052  if ( rc == HCF_SUCCESS ) {
2053  rc = HCF_ERR_LEN;
2054  }
2055  }
2056  HCFASSERT( rc == HCF_SUCCESS || ( rc == HCF_ERR_LEN && ifbp->IFB_AssertTrace & 1<<HCF_TRACE_PUT_INFO ),
2057  MERGE_2( type, rc ) ); /*20*/
2059  return rc;
2060 } // hcf_get_info
2061 
2062 
2063 /************************************************************************************************************
2064  *
2065  *.MODULE int hcf_put_info( IFBP ifbp, LTVP ltvp )
2066  *.PURPOSE Transfers operation and configuration information to the Card and to the HCF.
2067  *
2068  *.ARGUMENTS
2069  * ifbp address of the Interface Block
2070  * ltvp specifies the RID (as defined by Hermes I/F) or pseudo-RID (as defined by WCI)
2071  *
2072  *.RETURNS
2073  * HCF_SUCCESS
2074  *!! via cmd_exe
2075  * HCF_ERR_NO_NIC NIC removed during data retrieval
2076  * HCF_ERR_TIME_OUT Expected F/W event did not occur in time
2077  * HCF_ERR_DEFUNCT_...
2078  *!! via download CFG_DLNV_START <= type <= CFG_DL_STOP
2079  *!! via put_info CFG_RID_CFG_MIN <= type <= CFG_RID_CFG_MAX
2080  *!! via put_frag
2081  *
2082  *.DESCRIPTION
2083  * The L-field of the LTV-record (provided by the MSF in parameter ltvp) specifies the size of the buffer.
2084  * The L-value includes the size of the T-field, but not the size of the L-field.
2085  * The T- field specifies the RID placed in the V-field by the MSF.
2086  *
2087  * Not all CFG-codes can be used for hcf_put_info. The following CFG-codes are valid for hcf_put_info:
2088  * o One of the CFG-codes in the group "Network Parameters, Static Configuration Entities"
2089  * Changes made by hcf_put_info to CFG_codes in this group will not affect the F/W
2090  * and HCF behavior until hcf_cntl_port( HCF_PORT_ENABLE) is called.
2091  * o One of the CFG-codes in the group "Network Parameters, Dynamic Configuration Entities"
2092  * Changes made by hcf_put_info to CFG_codes will affect the F/W and HCF behavior immediately.
2093  * o CFG_PROG.
2094  * This code is used to initiate and terminate the process to download data either to
2095  * volatile or to non-volatile RAM on the NIC as well as for the actual download.
2096  * o CFG-codes related to the HCF behavior.
2097  * The related CFG-codes are:
2098  * - CFG_REG_MB
2099  * - CFG_REG_ASSERT_RTNP
2100  * - CFG_REG_INFO_LOG
2101  * - CFG_CMD_NIC
2102  * - CFG_CMD_DONGLE
2103  * - CFG_CMD_HCF
2104  * - CFG_NOTIFY
2105  *
2106  * All LTV-records "unknown" to the HCF are forwarded to the F/W.
2107  *
2108  * Assert fails if
2109  * - ifbp has a recognizable out-of-range value.
2110  * - ltvp is a NULL pointer.
2111  * - hcf_put_info was called without prior call to hcf_connect
2112  * - type field of the LTV-record is invalid, i.e. neither HCF nor F/W can handle the value.
2113  * - length field of the LTV-record at entry is less than 1 or exceeds MAX_LTV_SIZE.
2114  * - registering a MailBox with size less than 60 or a non-aligned buffer address is used.
2115  * - reentrancy, may be caused by calling hcf_functions without adequate protection against
2116  * NIC interrupts or multi-threading.
2117  *
2118  *.DIAGRAM
2119  *
2120  *.NOTICE
2121  * Remarks: In case of Hermes Configuration LTVs, the codes for the type are "cleverly" chosen to be
2122  * identical to the RID. Hermes Configuration information is copied from the provided data structure into the
2123  * Card.
2124  * In case of HCF Configuration LTVs, the type values are chosen in a range which does not overlap the
2125  * RID-range.
2126  *
2127  *20:
2128  *
2129  *.ENDDOC END DOCUMENTATION
2130  *
2131  ************************************************************************************************************/
2132 
2133 int
2134 hcf_put_info( IFBP ifbp, LTVP ltvp )
2135 {
2136  int rc = HCF_SUCCESS;
2137 
2138  HCFLOGENTRY( HCF_TRACE_PUT_INFO, ltvp->typ );
2139  HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
2140  HCFASSERT_INT;
2141  HCFASSERT( ltvp, 0 );
2142  HCFASSERT( 1 < ltvp->len && ltvp->len <= HCF_MAX_LTV + 1, ltvp->len );
2143 
2144  //all codes between 0xFA00 and 0xFCFF are passed to Hermes
2145 #if (HCF_TYPE) & HCF_TYPE_WPA
2146  {
2147  hcf_16 i;
2148  hcf_32 FAR * key_p;
2149 
2150  if ( ltvp->typ == CFG_ADD_TKIP_DEFAULT_KEY || ltvp->typ == CFG_ADD_TKIP_MAPPED_KEY ) {
2151  key_p = (hcf_32*)((CFG_ADD_TKIP_MAPPED_KEY_STRCT FAR *)ltvp)->tx_mic_key;
2152  i = TX_KEY; //i.e. TxKeyIndicator == 1, KeyID == 0
2153  if ( ltvp->typ == CFG_ADD_TKIP_DEFAULT_KEY ) {
2154  key_p = (hcf_32*)((CFG_ADD_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)->tx_mic_key;
2155  i = CNV_LITTLE_TO_SHORT(((CFG_ADD_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)->tkip_key_id_info);
2156  }
2157  if ( i & TX_KEY ) { /* TxKeyIndicator == 1
2158  (either really set by MSF in case of DEFAULT or faked by HCF in case of MAPPED ) */
2159  ifbp->IFB_MICTxCntl = (hcf_16)( HFS_TX_CNTL_MIC | (i & KEY_ID )<<8 );
2160  ifbp->IFB_MICTxKey[0] = CNV_LONGP_TO_LITTLE( key_p );
2161  ifbp->IFB_MICTxKey[1] = CNV_LONGP_TO_LITTLE( (key_p+1) );
2162  }
2163  i = ( i & KEY_ID ) * 2;
2164  ifbp->IFB_MICRxKey[i] = CNV_LONGP_TO_LITTLE( (key_p+2) );
2165  ifbp->IFB_MICRxKey[i+1] = CNV_LONGP_TO_LITTLE( (key_p+3) );
2166  }
2167 #define P ((CFG_REMOVE_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)
2168  if ( ( ltvp->typ == CFG_REMOVE_TKIP_MAPPED_KEY ) ||
2169  ( ltvp->typ == CFG_REMOVE_TKIP_DEFAULT_KEY &&
2170  ( (ifbp->IFB_MICTxCntl >> 8) & KEY_ID ) == CNV_SHORT_TO_LITTLE(P->tkip_key_id )
2171  )
2172  ) { ifbp->IFB_MICTxCntl = 0; } //disable MIC-engine
2173 #undef P
2174  }
2175 #endif // HCF_TYPE_WPA
2176 
2177  if ( ltvp->typ == CFG_PROG ) {
2178  rc = download( ifbp, (CFG_PROG_STRCT FAR *)ltvp );
2179  } else switch (ltvp->typ) {
2180 #if (HCF_ASSERT) & HCF_ASSERT_RT_MSF_RTN
2181  case CFG_REG_ASSERT_RTNP: //Register MSF Routines
2182 #define P ((CFG_REG_ASSERT_RTNP_STRCT FAR *)ltvp)
2183  ifbp->IFB_AssertRtn = P->rtnp;
2184 // ifbp->IFB_AssertLvl = P->lvl; //TODO not yet supported so default is set in hcf_connect
2185  HCFASSERT( DO_ASSERT, MERGE_2( HCF_ASSERT, 0xCAF1 ) ); //just to proof that the complete assert machinery is working
2186 #undef P
2187  break;
2188 #endif // HCF_ASSERT_RT_MSF_RTN
2189 #if (HCF_EXT) & HCF_EXT_INFO_LOG
2190  case CFG_REG_INFO_LOG: //Register Log filter
2191  ifbp->IFB_RIDLogp = ((CFG_RID_LOG_STRCT FAR*)ltvp)->recordp;
2192  break;
2193 #endif // HCF_EXT_INFO_LOG
2194  case CFG_CNTL_OPT: //overrule option
2195  HCFASSERT( ( ltvp->val[0] & ~(USE_DMA | USE_16BIT) ) == 0, ltvp->val[0] );
2196  if ( ( ltvp->val[0] & USE_DMA ) == 0 ) ifbp->IFB_CntlOpt &= ~USE_DMA;
2197  ifbp->IFB_CntlOpt |= ltvp->val[0] & USE_16BIT;
2198  break;
2199 
2200  case CFG_REG_MB: //Register MailBox
2201 #define P ((CFG_REG_MB_STRCT FAR *)ltvp)
2202  HCFASSERT( ( (hcf_32)P->mb_addr & 0x0001 ) == 0, (hcf_32)P->mb_addr );
2203  HCFASSERT( (P)->mb_size >= 60, (P)->mb_size );
2204  ifbp->IFB_MBp = P->mb_addr;
2205  /* if no MB present, size must be 0 for ;?the old;? put_info_mb to work correctly */
2206  ifbp->IFB_MBSize = ifbp->IFB_MBp == NULL ? 0 : P->mb_size;
2207  ifbp->IFB_MBWp = ifbp->IFB_MBRp = 0;
2208  ifbp->IFB_MBp[0] = 0; //flag the MailBox as empty
2209  ifbp->IFB_MBInfoLen = 0;
2210  HCFASSERT( ifbp->IFB_MBSize >= 60 || ifbp->IFB_MBp == NULL, ifbp->IFB_MBSize );
2211 #undef P
2212  break;
2213  case CFG_MB_INFO: //store MailBoxInfoBlock
2214  rc = put_info_mb( ifbp, (CFG_MB_INFO_STRCT FAR *)ltvp );
2215  break;
2216 
2217 #if (HCF_EXT) & HCF_EXT_NIC_ACCESS
2218  case CFG_CMD_NIC:
2219 #define P ((CFG_CMD_NIC_STRCT FAR *)ltvp)
2220  OPW( HREG_PARAM_2, P->parm2 );
2221  OPW( HREG_PARAM_1, P->parm1 );
2222  rc = cmd_exe( ifbp, P->cmd, P->parm0 );
2223  P->hcf_stat = (hcf_16)rc;
2224  P->stat = IPW( HREG_STAT );
2225  P->resp0 = IPW( HREG_RESP_0 );
2226  P->resp1 = IPW( HREG_RESP_1 );
2227  P->resp2 = IPW( HREG_RESP_2 );
2228  P->ifb_err_cmd = ifbp->IFB_ErrCmd;
2229  P->ifb_err_qualifier = ifbp->IFB_ErrQualifier;
2230 #undef P
2231  break;
2232  case CFG_CMD_HCF:
2233 #define P ((CFG_CMD_HCF_STRCT FAR *)ltvp)
2234  HCFASSERT( P->cmd == CFG_CMD_HCF_REG_ACCESS, P->cmd ); //only Hermes register access supported
2235  if ( P->cmd == CFG_CMD_HCF_REG_ACCESS ) {
2236  HCFASSERT( P->mode < ifbp->IFB_IOBase, P->mode ); //Check Register space
2237  OPW( P->mode, P->add_info);
2238  }
2239 #undef P
2240  break;
2241 #endif // HCF_EXT_NIC_ACCESS
2242 
2243 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
2245  ifbp->IFB_FwPfBuff = *(CFG_FW_PRINTF_BUFFER_LOCATION_STRCT*)ltvp;
2246  break;
2247 #endif // HCF_ASSERT_PRINTF
2248 
2249  default: //pass everything unknown above the "FID" range to the Hermes or Dongle
2250  rc = put_info( ifbp, ltvp );
2251  }
2252  //DO NOT !!! HCFASSERT( rc == HCF_SUCCESS, rc ) /* 20 */
2254  return rc;
2255 } // hcf_put_info
2256 
2257 
2258 /************************************************************************************************************
2259  *
2260  *.MODULE int hcf_rcv_msg( IFBP ifbp, DESC_STRCT *descp, unsigned int offset )
2261  *.PURPOSE All: decapsulate a message.
2262  * pre-HermesII.5: verify MIC.
2263  * non-USB, non-DMA mode: Transfer a message from the NIC to the Host and acknowledge reception.
2264  * USB: Transform a message from proprietary USB format to 802.3 format
2265  *
2266  *.ARGUMENTS
2267  * ifbp address of the Interface Block
2268  * descp Pointer to the Descriptor List location.
2269  * offset USB: not used
2270  * non-USB: specifies the beginning of the data to be obtained (0 corresponds with DestAddr field
2271  * of frame).
2272  *
2273  *.RETURNS
2274  * HCF_SUCCESS No WPA error ( or HCF_ERR_MIC already reported by hcf_service_nic)
2275  * HCF_ERR_MIC message contains an erroneous MIC ( HCF_SUCCESS is reported if HCF_ERR_MIC is already
2276  * reported by hcf_service_nic)
2277  * HCF_ERR_NO_NIC NIC removed during data retrieval
2278  * HCF_ERR_DEFUNCT...
2279  *
2280  *.DESCRIPTION
2281  * The Receive Message Function can be executed by the MSF to obtain the Data Info fields of the message that
2282  * is reported to be available by the Service NIC Function.
2283  *
2284  * The Receive Message Function copies the message data available in the Card memory into a buffer structure
2285  * provided by the MSF.
2286  * Only data of the message indicated by the Service NIC Function can be obtained.
2287  * Execution of the Service NIC function may result in the availability of a new message, but it definitely
2288  * makes the message reported by the preceding Service NIC function, unavailable.
2289  *
2290  * in non-USB/non-DMA mode, hcf_rcv_msg starts the copy process at the (non-negative) offset requested by the
2291  * parameter offset, relative to HFS_ADDR_DEST, e.g offset 0 starts copying from the Destination Address, the
2292  * very begin of the 802.3 frame message. Offset must either lay within the part of the 802.3 frame as stored
2293  * by hcf_service_nic in the lookahead buffer or be just behind it, i.e. the first byte not yet read.
2294  * When offset is within lookahead, data is copied from lookahead.
2295  * When offset is beyond lookahead, data is read directly from RxFS in NIC with disregard of the actual value
2296  * of offset
2297  *
2298  *.NOTICE:
2299  * o at entry: look ahead buffer as passed with hcf_service_nic is still accessible and unchanged
2300  * o at exit: Receive Frame in NIC memory is released
2301  *
2302  * Description:
2303  * Starting at the byte indicated by the Offset value, the bytes are copied from the Data Info
2304  * Part of the current Receive Frame Structure to the Host memory data buffer structure
2305  * identified by descp.
2306  * The maximum value for Offset is the number of characters of the 802.3 frame read into the
2307  * look ahead buffer by hcf_service_nic (i.e. the look ahead buffer size minus
2308  * Control and 802.11 fields)
2309  * If Offset is less than the maximum value, copying starts from the look ahead buffer till the
2310  * end of that buffer is reached
2311  * Then (or if the maximum value is specified for Offset), the
2312  * message is directly copied from NIC memory to Host memory.
2313  * If an invalid (i.e. too large) offset is specified, an assert catches but the buffer contents are
2314  * undefined.
2315  * Copying stops if either:
2316  * o the end of the 802.3 frame is reached
2317  * o the Descriptor with a NULL pointer in the next_desc_addr field is reached
2318  *
2319  * When the copying stops, the receiver is ack'ed, thus freeing the NIC memory where the frame is stored
2320  * As a consequence, hcf_rcv_msg can only be called once for any particular Rx frame.
2321  *
2322  * For the time being (PCI Bus mastering not yet supported), only the following fields of each
2323  * of the descriptors in the descriptor list must be set by the MSF:
2324  * o buf_cntl.buf_dim[1]
2325  * o *next_desc_addr
2326  * o *buf_addr
2327  * At return from hcf_rcv_msg, the field buf_cntl.buf_dim[0] of the used Descriptors reflects
2328  * the number of bytes in the buffer corresponding with the Descriptor.
2329  * On the last used Descriptor, buf_cntl.buf_dim[0] is less or equal to buf_cntl.buf_dim[1].
2330  * On all preceding Descriptors buf_cntl.buf_dim[0] is equal to buf_cntl.buf_dim[1].
2331  * On all succeeding (unused) Descriptors, buf_cntl.buf_dim[0] is zero.
2332  * Note: this I/F is based on the assumptions how the I/F needed for PCI Bus mastering will
2333  * be, so it may change.
2334  *
2335  * The most likely handling of HCF_ERR_NO_NIC by the MSF is to drop the already copied
2336  * data as elegantly as possible under the constraints and requirements posed by the (N)OS.
2337  * If no received Frame Structure is pending, "Success" rather than "Read error" is returned.
2338  * This error constitutes a logic flaw in the MSF
2339  * The HCF can only catch a minority of this
2340  * type of errors
2341  * Based on consistency ideas, the HCF catches none of these errors.
2342  *
2343  * Assert fails if
2344  * - ifbp has a recognizable out-of-range value
2345  * - there is no unacknowledged Rx-message available
2346  * - offset is out of range (outside look ahead buffer)
2347  * - descp is a NULL pointer
2348  * - any of the descriptors is not double word aligned
2349  * - reentrancy, may be caused by calling hcf_functions without adequate protection
2350  * against NIC interrupts or multi-threading.
2351  * - Interrupts are enabled.
2352  *
2353  *.DIAGRAM
2354  *
2355  *.NOTICE
2356  * - by using unsigned int as type for offset, no need to worry about negative offsets
2357  * - Asserting on being enabled/present is superfluous, since a non-zero IFB_lal implies that hcf_service_nic
2358  * was called and detected a Rx-message. A zero IFB_lal will set the BUF_CNT field of at least the first
2359  * descriptor to zero.
2360  *
2361  *.ENDDOC END DOCUMENTATION
2362  *
2363  ************************************************************************************************************/
2364 int
2365 hcf_rcv_msg( IFBP ifbp, DESC_STRCT *descp, unsigned int offset )
2366 {
2367  int rc = HCF_SUCCESS;
2368  wci_bufp cp; //char oriented working pointer
2369  hcf_16 i;
2370  int tot_len = ifbp->IFB_RxLen - offset; //total length
2371  wci_bufp lap = ifbp->IFB_lap + offset; //start address in LookAhead Buffer
2372  hcf_16 lal = ifbp->IFB_lal - offset; //available data within LookAhead Buffer
2373  hcf_16 j;
2374 
2375  HCFLOGENTRY( HCF_TRACE_RCV_MSG, offset );
2376  HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
2377  HCFASSERT_INT;
2378  HCFASSERT( descp, HCF_TRACE_RCV_MSG );
2380  HCFASSERT( ifbp->IFB_RxLen >= offset, MERGE_2( offset, ifbp->IFB_RxLen ) );
2381  HCFASSERT( ifbp->IFB_lal >= offset, offset );
2382  HCFASSERT( (ifbp->IFB_CntlOpt & USE_DMA) == 0, 0xDADA );
2383 
2384  if ( tot_len < 0 ) {
2385  lal = 0; tot_len = 0; //suppress all copying activity in the do--while loop
2386  }
2387  do { //loop over all available fragments
2388  // obnoxious hcf.c(1480) : warning C4769: conversion of near pointer to long integer
2389  HCFASSERT( ((hcf_32)descp & 3 ) == 0, (hcf_32)descp );
2390  cp = descp->buf_addr;
2391  j = min( (hcf_16)tot_len, descp->BUF_SIZE ); //minimum of "what's` available" and fragment size
2392  descp->BUF_CNT = j;
2393  tot_len -= j; //adjust length still to go
2394  if ( lal ) { //if lookahead Buffer not yet completely copied
2395  i = min( lal, j ); //minimum of "what's available" in LookAhead and fragment size
2396  lal -= i; //adjust length still available in LookAhead
2397  j -= i; //adjust length still available in current fragment
2398  /*;? while loop could be improved by moving words but that is complicated on platforms with
2399  * alignment requirements*/
2400  while ( i-- ) *cp++ = *lap++;
2401  }
2402  if ( j ) { //if LookAhead Buffer exhausted but still space in fragment, copy directly from NIC RAM
2403  get_frag( ifbp, cp, j BE_PAR(0) );
2404  CALC_RX_MIC( cp, j );
2405  }
2406  } while ( ( descp = descp->next_desc_addr ) != NULL );
2407 #if (HCF_TYPE) & HCF_TYPE_WPA
2408  if ( ifbp->IFB_RxFID ) {
2409  rc = check_mic( ifbp ); //prevents MIC error report if hcf_service_nic already consumed all
2410  }
2411 #endif // HCF_TYPE_WPA
2412  (void)hcf_action( ifbp, HCF_ACT_RX_ACK ); //only 1 shot to get the data, so free the resources in the NIC
2413  HCFASSERT( rc == HCF_SUCCESS, rc );
2415  return rc;
2416 } // hcf_rcv_msg
2417 
2418 
2419 /************************************************************************************************************
2420  *
2421  *.MODULE int hcf_send_msg( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
2422  *.PURPOSE Encapsulate a message and append padding and MIC.
2423  * non-USB: Transfers the resulting message from Host to NIC and initiates transmission.
2424  * USB: Transfer resulting message into a flat buffer.
2425  *
2426  *.ARGUMENTS
2427  * ifbp address of the Interface Block
2428  * descp pointer to the DescriptorList or NULL
2429  * tx_cntl indicates MAC-port and (Hermes) options
2430  * HFS_TX_CNTL_SPECTRALINK
2431  * HFS_TX_CNTL_PRIO
2432  * HFS_TX_CNTL_TX_OK
2433  * HFS_TX_CNTL_TX_EX
2434  * HFS_TX_CNTL_TX_DELAY
2435  * HFS_TX_CNTL_TX_CONT
2436  * HCF_PORT_0 MAC Port 0 (default)
2437  * HCF_PORT_1 (AP only) MAC Port 1
2438  * HCF_PORT_2 (AP only) MAC Port 2
2439  * HCF_PORT_3 (AP only) MAC Port 3
2440  * HCF_PORT_4 (AP only) MAC Port 4
2441  * HCF_PORT_5 (AP only) MAC Port 5
2442  * HCF_PORT_6 (AP only) MAC Port 6
2443  *
2444  *.RETURNS
2445  * HCF_SUCCESS
2446  * HCF_ERR_DEFUNCT_..
2447  * HCF_ERR_TIME_OUT
2448  *
2449  *.DESCRIPTION:
2450  * The Send Message Function embodies 2 functions:
2451  * o transfers a message (including MAC header) from the provided buffer structure in Host memory to the Transmit
2452  * Frame Structure (TxFS) in NIC memory.
2453  * o Issue a send command to the F/W to actually transmit the contents of the TxFS.
2454  *
2455  * Control is based on the Resource Indicator IFB_RscInd.
2456  * The Resource Indicator is maintained by the HCF and should only be interpreted but not changed by the MSF.
2457  * The MSF must check IFB_RscInd to be non-zero before executing the call to the Send Message Function.
2458  * When no resources are available, the MSF must handle the queuing of the Transmit frame and check the
2459  * Resource Indicator periodically after calling hcf_service_nic.
2460  *
2461  * The Send Message Functions transfers a message to NIC memory when it is called with a non-NULL descp.
2462  * Before the Send Message Function is invoked this way, the Resource Indicator (IFB_RscInd) must be checked.
2463  * If the Resource is not available, Send Message Function execution must be postponed until after processing of
2464  * a next hcf_service_nic it appears that the Resource has become available.
2465  * The message is copied from the buffer structure identified by descp to the NIC.
2466  * Copying stops if a NULL pointer in the next_desc_addr field is reached.
2467  * Hcf_send_msg does not check for transmit buffer overflow, because the F/W does this protection.
2468  * In case of a transmit buffer overflow, the surplus which does not fit in the buffer is simply dropped.
2469  *
2470  * The Send Message Function activates the F/W to actually send the message to the medium when the
2471  * HFS_TX_CNTL_TX_DELAY bit of the tx_cntl parameter is not set.
2472  * If the descp parameter of the current call is non-NULL, the message as represented by descp is send.
2473  * If the descp parameter of the current call is NULL, and if the preceding call of the Send Message Function had
2474  * a non-NULL descp and the preceding call had the HFS_TX_CNTL_TX_DELAY bit of tx_cntl set, then the message as
2475  * represented by the descp of the preceding call is send.
2476  *
2477  * Hcf_send_msg supports encapsulation (see HCF_ENCAP) of Ethernet-II frames.
2478  * An Ethernet-II frame is transferred to the Transmit Frame structure as an 802.3 frame.
2479  * Hcf_send_msg distinguishes between an 802.3 and an Ethernet-II frame by looking at the data length/type field
2480  * of the frame. If this field contains a value larger than 1514, the frame is considered to be an Ethernet-II
2481  * frame, otherwise it is treated as an 802.3 frame.
2482  * To ease implementation of the HCF, this type/type field must be located in the first descriptor structure,
2483  * i.e. the 1st fragment must have a size of at least 14 (to contain DestAddr, SrcAddr and Len/Type field).
2484  * An Ethernet-II frame is encapsulated by inserting a SNAP header between the addressing information and the
2485  * type field. This insertion is transparent for the MSF.
2486  * The HCF contains a fixed table that stores a number of types. If the value specified by the type/type field
2487  * occurs in this table, Bridge Tunnel Encapsulation is used, otherwise RFC1042 encapsulation is used.
2488  * Bridge Tunnel uses AA AA 03 00 00 F8 as SNAP header,
2489  * RFC1042 uses AA AA 03 00 00 00 as SNAP header.
2490  * The table currently contains:
2491  * 0 0x80F3 AppleTalk Address Resolution Protocol (AARP)
2492  * 0 0x8137 IPX
2493  *
2494  * The algorithm to distinguish between 802.3 and Ethernet-II frames limits the maximum length for frames of
2495  * 802.3 frames to 1514 bytes.
2496  * Encapsulation can be suppressed by means of the system constant HCF_ENCAP, e.g. to support proprietary
2497  * protocols with 802.3 like frames with a size larger than 1514 bytes.
2498  *
2499  * In case the HCF encapsulates the frame, the number of bytes that is actually transmitted is determined by the
2500  * cumulative value of the buf_cntl.buf_dim[0] fields.
2501  * In case the HCF does not encapsulate the frame, the number of bytes that is actually transmitted is not
2502  * determined by the cumulative value of the buf_cntl.buf_dim[DESC_CNTL_CNT] fields of the desc_strct's but by
2503  * the Length field of the 802.3 frame.
2504  * If there is a conflict between the cumulative value of the buf_cntl.buf_dim[0] fields and the
2505  * 802.3 Length field the 802.3 Length field determines the number of bytes actually transmitted by the NIC while
2506  * the cumulative value of the buf_cntl.buf_dim[0] fields determines the position of the MIC, hence a mismatch
2507  * will result in MIC errors on the Receiving side.
2508  * Currently this problem is flagged on the Transmit side by an Assert.
2509  * The following fields of each of the descriptors in the descriptor list must be set by the MSF:
2510  * o buf_cntl.buf_dim[0]
2511  * o *next_desc_addr
2512  * o *buf_addr
2513  *
2514  * All bits of the tx_cntl parameter except HFS_TX_CNTL_TX_DELAY and the HCF_PORT# bits are passed to the F/W via
2515  * the HFS_TX_CNTL field of the TxFS.
2516  *
2517  * Note that hcf_send_msg does not detect NIC absence. The MSF is supposed to have its own -platform dependent-
2518  * way to recognize card removal/insertion.
2519  * The total system must be robust against card removal and there is no principal difference between card removal
2520  * just after hcf_send_msg returns but before the actual transmission took place or sometime earlier.
2521  *
2522  * Assert fails if
2523  * - ifbp has a recognizable out-of-range value
2524  * - descp is a NULL pointer
2525  * - no resources for PIF available.
2526  * - Interrupts are enabled.
2527  * - reentrancy, may be caused by calling hcf_functions without adequate protection
2528  * against NIC interrupts or multi-threading.
2529  *
2530  *.DIAGRAM
2531  *4: for the normal case (i.e. no HFS_TX_CNTL_TX_DELAY option active), a fid is acquired via the
2532  * routine get_fid. If no FID is acquired, the remainder is skipped without an error notification. After
2533  * all, the MSF is not supposed to call hcf_send_msg when no Resource is available.
2534  *7: The ControlField of the TxFS is written. Since put_frag can only return the fatal Defunct or "No NIC", the
2535  * return status can be ignored because when it fails, cmd_wait will fail as well. (see also the note on the
2536  * need for a return code below).
2537  * Note that HFS_TX_CNTL has different values for H-I, H-I/WPA and H-II and HFS_ADDR_DEST has different
2538  * values for H-I (regardless of WPA) and H-II.
2539  * By writing 17, 1 or 2 ( implying 16, 0 or 1 garbage word after HFS_TX_CNTL) the BAP just gets to
2540  * HFS_ADDR_DEST for H-I, H-I/WPA and H-II respectively.
2541  *10: if neither encapsulation nor MIC calculation is needed, splitting the first fragment in two does not
2542  * really help but it makes the flow easier to follow to do not optimize on this difference
2543  *
2544  * hcf_send_msg checks whether the frame is an Ethernet-II rather than an "official" 802.3 frame.
2545  * The E-II check is based on the length/type field in the MAC header. If this field has a value larger than
2546  * 1500, E-II is assumed. The implementation of this test fails if the length/type field is not in the first
2547  * descriptor. If E-II is recognized, a SNAP header is inserted. This SNAP header represents either RFC1042
2548  * or Bridge-Tunnel encapsulation, depending on the return status of the support routine hcf_encap.
2549  *
2550  *.NOTICE
2551  * hcf_send_msg leaves the responsibility to only send messages on enabled ports at the MSF level.
2552  * This is considered the strategy which is sufficiently adequate for all "robust" MSFs, have the least
2553  * processor utilization and being still acceptable robust at the WCI !!!!!
2554  *
2555  * hcf_send_msg does not NEED a return value to report NIC absence or removal during the execution of
2556  * hcf_send_msg(), because the MSF and higher layers must be able to cope anyway with the NIC being removed
2557  * after a successful completion of hcf_send_msg() but before the actual transmission took place.
2558  * To accommodate user expectations the current implementation does report NIC absence.
2559  * Defunct blocks all NIC access and will (also) be reported on a number of other calls.
2560  *
2561  * hcf_send_msg does not check for transmit buffer overflow because the Hermes does this protection.
2562  * In case of a transmit buffer overflow, the surplus which does not fit in the buffer is simply dropped.
2563  * Note that this possibly results in the transmission of incomplete frames.
2564  *
2565  * After some deliberation with F/W team, it is decided that - being in the twilight zone of not knowing
2566  * whether the problem at hand is an MSF bug, HCF buf, F/W bug, H/W malfunction or even something else - there
2567  * is no "best thing to do" in case of a failing send, hence the HCF considers the TxFID ownership to be taken
2568  * over by the F/W and hopes for an Allocate event in due time
2569  *
2570  *.ENDDOC END DOCUMENTATION
2571  *
2572  ************************************************************************************************************/
2573 int
2574 hcf_send_msg( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
2575 {
2576  int rc = HCF_SUCCESS;
2577  DESC_STRCT *p /* = descp*/; //working pointer
2578  hcf_16 len; // total byte count
2579  hcf_16 i;
2580 
2581  hcf_16 fid = 0;
2582 
2583  HCFASSERT( ifbp->IFB_RscInd || descp == NULL, ifbp->IFB_RscInd );
2584  HCFASSERT( (ifbp->IFB_CntlOpt & USE_DMA) == 0, 0xDADB );
2585 
2586  HCFLOGENTRY( HCF_TRACE_SEND_MSG, tx_cntl );
2587  HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
2588  HCFASSERT_INT;
2589  /* obnoxious c:/hcf/hcf.c(1480) : warning C4769: conversion of near pointer to long integer,
2590  * so skip */
2591  HCFASSERT( ((hcf_32)descp & 3 ) == 0, (hcf_32)descp );
2592 #if HCF_ASSERT
2593  { int x = ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ? tx_cntl & ~HFS_TX_CNTL_PORT : tx_cntl;
2594  HCFASSERT( (x & ~HCF_TX_CNTL_MASK ) == 0, tx_cntl );
2595  }
2596 #endif // HCF_ASSERT
2597 
2598  if ( descp ) ifbp->IFB_TxFID = 0; //cancel a pre-put message
2599 
2600  /* the following initialization code is redundant for a pre-put message
2601  * but moving it inside the "if fid" logic makes the merging with the
2602  * USB flow awkward
2603  */
2604 #if (HCF_TYPE) & HCF_TYPE_WPA
2605  tx_cntl |= ifbp->IFB_MICTxCntl;
2606 #endif // HCF_TYPE_WPA
2607  fid = ifbp->IFB_TxFID;
2608  if (fid == 0 && ( fid = get_fid( ifbp ) ) != 0 ) /* 4 */
2609  /* skip the next compound statement if:
2610  - pre-put message or
2611  - no fid available (which should never occur if the MSF adheres to the WCI)
2612  */
2613  { // to match the closing curly bracket of above "if" in case of HCF_TYPE_USB
2614  //calculate total length ;? superfluous unless CCX or Encapsulation
2615  len = 0;
2616  p = descp;
2617  do len += p->BUF_CNT; while ( ( p = p->next_desc_addr ) != NULL );
2618  p = descp;
2619 //;? HCFASSERT( len <= HCF_MAX_MSG, len );
2620  /*7*/ (void)setup_bap( ifbp, fid, HFS_TX_CNTL, IO_OUT );
2621 #if (HCF_TYPE) & HCF_TYPE_TX_DELAY
2622  HCFASSERT( ( descp != NULL ) ^ ( tx_cntl & HFS_TX_CNTL_TX_DELAY ), tx_cntl );
2623  if ( tx_cntl & HFS_TX_CNTL_TX_DELAY ) {
2624  tx_cntl &= ~HFS_TX_CNTL_TX_DELAY;
2625  ifbp->IFB_TxFID = fid;
2626  fid = 0;
2627  }
2628 #endif // HCF_TYPE_TX_DELAY
2629  OPW( HREG_DATA_1, tx_cntl ) ;
2630  OPW( HREG_DATA_1, 0 );
2631 
2632  HCFASSERT( p->BUF_CNT >= 14, p->BUF_CNT );
2633  /* assume DestAddr/SrcAddr/Len/Type ALWAYS contained in 1st fragment
2634  * otherwise life gets too cumbersome for MIC and Encapsulation !!!!!!!!
2635  if ( p->BUF_CNT >= 14 ) { alternatively: add a safety escape !!!!!!!!!!!! } */
2636 
2637  CALC_TX_MIC( NULL, -1 ); //initialize MIC
2638  /*10*/ put_frag( ifbp, p->buf_addr, HCF_DASA_SIZE BE_PAR(0) ); //write DA, SA with MIC calculation
2639  CALC_TX_MIC( p->buf_addr, HCF_DASA_SIZE ); //MIC over DA, SA
2640  CALC_TX_MIC( null_addr, 4 ); //MIC over (virtual) priority field
2641 
2642  //if encapsulation needed
2643 #if (HCF_ENCAP) == HCF_ENC
2644  //write length (with SNAP-header,Type, without //DA,SA,Length ) no MIC calc.
2645  if ( ( snap_header[sizeof(snap_header)-1] = hcf_encap( &p->buf_addr[HCF_DASA_SIZE] ) ) != ENC_NONE ) {
2646  OPW( HREG_DATA_1, CNV_END_SHORT( len + (sizeof(snap_header) + 2) - ( 2*6 + 2 ) ) );
2647  //write splice with MIC calculation
2648  put_frag( ifbp, snap_header, sizeof(snap_header) BE_PAR(0) );
2649  CALC_TX_MIC( snap_header, sizeof(snap_header) ); //MIC over 6 byte SNAP
2650  i = HCF_DASA_SIZE;
2651  } else
2652 #endif // HCF_ENC
2653  {
2654  OPW( HREG_DATA_1, *(wci_recordp)&p->buf_addr[HCF_DASA_SIZE] );
2655  i = 14;
2656  }
2657  //complete 1st fragment starting with Type with MIC calculation
2658  put_frag( ifbp, &p->buf_addr[i], p->BUF_CNT - i BE_PAR(0) );
2659  CALC_TX_MIC( &p->buf_addr[i], p->BUF_CNT - i );
2660 
2661  //do the remaining fragments with MIC calculation
2662  while ( ( p = p->next_desc_addr ) != NULL ) {
2663  /* obnoxious c:/hcf/hcf.c(1480) : warning C4769: conversion of near pointer to long integer,
2664  * so skip */
2665  HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p );
2666  put_frag( ifbp, p->buf_addr, p->BUF_CNT BE_PAR(0) );
2667  CALC_TX_MIC( p->buf_addr, p->BUF_CNT );
2668  }
2669  //pad message, finalize MIC calculation and write MIC to NIC
2670  put_frag_finalize( ifbp );
2671  }
2672  if ( fid ) {
2673  /*16*/ rc = cmd_exe( ifbp, HCMD_BUSY | HCMD_TX | HCMD_RECL, fid );
2674  ifbp->IFB_TxFID = 0;
2675  /* probably this (i.e. no RscInd AND "HREG_EV_ALLOC") at this point in time occurs so infrequent,
2676  * that it might just as well be acceptable to skip this
2677  * "optimization" code and handle that additional interrupt once in a while
2678  */
2679 // 180 degree error in logic ;? #if ALLOC_15
2680  /*20*/ if ( ifbp->IFB_RscInd == 0 ) {
2681  ifbp->IFB_RscInd = get_fid( ifbp );
2682  }
2683 // #endif // ALLOC_15
2684  }
2685 // HCFASSERT( level::ifbp->IFB_RscInd, ifbp->IFB_RscInd );
2687  return rc;
2688 } // hcf_send_msg
2689 
2690 
2691 /************************************************************************************************************
2692  *
2693  *.MODULE int hcf_service_nic( IFBP ifbp, wci_bufp bufp, unsigned int len )
2694  *.PURPOSE Services (most) NIC events.
2695  * Provides received message
2696  * Provides status information.
2697  *
2698  *.ARGUMENTS
2699  * ifbp address of the Interface Block
2700  * In non-DMA mode:
2701  * bufp address of char buffer, sufficiently large to hold the first part of the RxFS up through HFS_TYPE
2702  * len length in bytes of buffer specified by bufp
2703  * value between HFS_TYPE + 2 and HFS_ADDR_DEST + HCF_MAX_MSG
2704  *
2705  *.RETURNS
2706  * HCF_SUCCESS
2707  * HCF_ERR_MIC message contains an erroneous MIC (only if frame fits completely in bufp)
2708  *
2709  *.DESCRIPTION
2710  *
2711  * MSF-accessible fields of Result Block
2712  * - IFB_RxLen 0 or Frame size.
2713  * - IFB_MBInfoLen 0 or the L-field of the oldest MBIB.
2714  * - IFB_RscInd
2715  * - IFB_HCF_Tallies updated if a corresponding event occurred.
2716  * - IFB_NIC_Tallies updated if a Tally Info frame received from the NIC.
2717  * - IFB_DmaPackets
2718  * - IFB_TxFsStat
2719  * - IFB_TxFsSwSup
2720  * - IFB_LinkStat reflects new link status or 0x0000 if no change relative to previous hcf_service_nic call.
2721 or
2722 * - IFB_LinkStat link status, 0x8000 reflects change relative to previous hcf_service_nic call.
2723 *
2724 * When IFB_MBInfoLen is non-zero, at least one MBIB is available.
2725 *
2726 * IFB_RxLen reflects the number of received bytes in 802.3 view (Including DestAddr, SrcAddr and Length,
2727 * excluding MIC-padding, MIC and sum check) of active Rx Frame Structure. If no Rx Data s available, IFB_RxLen
2728 * equals 0x0000.
2729 * Repeated execution causes the Service NIC Function to provide information about subsequently received
2730 * messages, irrespective whether a hcf_rcv_msg or hcf_action(HCF_ACT_RX) is performed in between.
2731 *
2732 * When IFB_RxLen is non-zero, a Received Frame Structure is available to be routed to the protocol stack.
2733 * When Monitor Mode is not active, this is guaranteed to be an error-free non-WMP frame.
2734 * In case of Monitor Mode, it may also be a frame with an error or a WMP frame.
2735 * Erroneous frames have a non-zero error-sub field in the HFS_STAT field in the look ahead buffer.
2736 *
2737 * If a Receive message is available in NIC RAM, the Receive Frame Structure is (partly) copied from the NIC to
2738 * the buffer identified by bufp.
2739 * Copying stops either after len bytes or when the complete 802.3 frame is copied.
2740 * During the copying the message is decapsulated (if appropriate).
2741 * If the frame is read completely by hcf_service_nic (i.e. the frame fits completely in the lookahead buffer),
2742 * the frame is automatically ACK'ed to the F/W and still available via the look ahead buffer and hcf_rcv_msg.
2743 * Only if the frame is read completely by hcf_service_nic, hcf_service_nic checks the MIC and sets the return
2744 * status accordingly. In this case, hcf_rcv_msg does not check the MIC.
2745 *
2746 * The MIC calculation algorithm works more efficient if the length of the look ahead buffer is
2747 * such that it fits exactly 4 n bytes of the 802.3 frame, i.e. len == HFS_ADDR_DEST + 4*n.
2748 *
2749 * The Service NIC Function supports the NIC event service handling process.
2750 * It performs the appropriate actions to service the NIC, such that the event cause is eliminated and related
2751 * information is saved.
2752 * The Service NIC Function is executed by the MSF ISR or polling routine as first step to determine the event
2753 * cause(s). It is the responsibility of the MSF to perform all not directly NIC related interrupt service
2754 * actions, e.g. in a PC environment this includes servicing the PIC, and managing the Processor Interrupt
2755 * Enabling/Disabling.
2756 * In case of a polled based system, the Service NIC Function must be executed "frequently".
2757 * The Service NIC Function may have side effects related to the Mailbox and Resource Indicator (IFB_RscInd).
2758 *
2759 * hcf_service_nic returns:
2760 * - The length of the data in the available MBIB (IFB_MBInfoLen)
2761 * - Changes in the link status (IFB_LinkStat)
2762 * - The length of the data in the available Receive Frame Structure (IFB_RxLen)
2763 * - updated IFB_RscInd
2764 * - Updated Tallies
2765 *
2766 * hcf_service_nic is presumed to neither interrupt other HCF-tasks nor to be interrupted by other HCF-tasks.
2767 * A way to achieve this is to precede hcf_service_nic as well as all other HCF-tasks with a call to
2768 * hcf_action to disable the card interrupts and, after all work is completed, with a call to hcf_action to
2769 * restore (which is not necessarily the same as enabling) the card interrupts.
2770 * In case of a polled environment, it is assumed that the MSF programmer is sufficiently familiar with the
2771 * specific requirements of that environment to translate the interrupt strategy to a polled strategy.
2772 *
2773 * hcf_service_nic services the following Hermes events:
2774 * - HREG_EV_INFO Asynchronous Information Frame
2775 * - HREG_EV_INFO_DROP WMAC did not have sufficient RAM to build Unsolicited Information Frame
2776 * - HREG_EV_TX_EXC (if applicable, i.e. selected via HCF_EXT_INT_TX_EX bit of HCF_EXT)
2777 * - HREG_EV_SLEEP_REQ (if applicable, i.e. selected via HCF_DDS/HCF_CDS bit of HCF_SLEEP)
2778 * ** in non_DMA mode
2779 * - HREG_EV_ALLOC Asynchronous part of Allocation/Reclaim completed while out of resources at
2780 * completion of hcf_send_msg/notify
2781 * - HREG_EV_RX the detection of the availability of received messages
2782 * including WaveLAN Management Protocol (WMP) message processing
2783 * ** in DMA mode
2784 * - HREG_EV_RDMAD
2785 * - HREG_EV_TDMAD
2786 *!! hcf_service_nic does not service the following Hermes events:
2787 *!! HREG_EV_TX (the "OK" Tx Event) is no longer supported by the WCI, if it occurs it is unclear
2788 *!! what the cause is, so no meaningful strategy is available. Not acking the bit is
2789 *!! probably the best help that can be given to the debugger.
2790 *!! HREG_EV_CMD handled in cmd_wait.
2791 *!! HREG_EV_FW_DMA (i.e. HREG_EV_RXDMA, HREG_EV_TXDMA and_EV_LPESC) are either not used or used
2792 *!! between the F/W and the DMA engine.
2793 *!! HREG_EV_ACK_REG_READY is only applicable for H-II (i.e. not HII.5 and up, see DAWA)
2794 *
2795 * If, in non-DMA mode, a Rx message is available, its length is reflected by the IFB_RxLen field of the IFB.
2796 * This length reflects the data itself and the Destination Address, Source Address and DataLength/Type field
2797 * but not the SNAP-header in case of decapsulation by the HCF. If no message is available, IFB_RxLen is
2798 * zero. Former versions of the HCF handled WMP messages and supported a "monitor" mode in hcf_service_nic,
2799 * which deposited certain or all Rx messages in the MailBox. The responsibility to handle these frames is
2800 * moved to the MSF. The HCF offers as supports hcf_put_info with CFG_MB_INFO as parameter to emulate the old
2801 * implementation under control of the MSF.
2802 *
2803 * **Rx Buffer free strategy
2804 * When hcf_service_nic reports the availability of a non-DMA message, the MSF can access that message by
2805 * means of hcf_rcv_msg. It must be prevented that the LAN Controller writes new data in the NIC buffer
2806 * before the MSF is finished with the current message. The NIC buffer is returned to the LAN Controller
2807 * when:
2808 * - the complete frame fits in the lookahead buffer or
2809 * - hcf_rcv_msg is called or
2810 * - hcf_action with HCF_ACT_RX is called or
2811 * - hcf_service_nic is called again
2812 * It can be reasoned that hcf_action( INT_ON ) should not be given before the MSF has completely processed
2813 * a reported Rx-frame. The reason is that the INT_ON action is guaranteed to cause a (Rx-)interrupt (the
2814 * MSF is processing a Rx-frame, hence the Rx-event bit in the Hermes register must be active). This
2815 * interrupt will cause hcf_service_nic to be called, which will cause the ack-ing of the "last" Rx-event
2816 * to the Hermes, causing the Hermes to discard the associated NIC RAM buffer.
2817 * Assert fails if
2818 * - ifbp is zero or other recognizable out-of-range value.
2819 * - hcf_service_nic is called without a prior call to hcf_connect.
2820 * - interrupts are enabled.
2821 * - reentrancy, may be caused by calling hcf_functions without adequate protection
2822 * against NIC interrupts or multi-threading.
2823 *
2824 *
2825 *.DIAGRAM
2826 *1: IFB_LinkStat is cleared, if a LinkStatus frame is received, IFB_LinkStat will be updated accordingly
2827 * by isr_info.
2828 or
2829 *1: IFB_LinkStat change indication is cleared. If a LinkStatus frame is received, IFB_LinkStat will be updated
2830 * accordingly by isr_info.
2831 *2: IFB_RxLen must be cleared before the NIC presence check otherwise:
2832 * - this value may stay non-zero if the NIC is pulled out at an inconvenient moment.
2833 * - the RxAck on a zero-FID needs a zero-value for IFB_RxLen to work
2834 * Note that as side-effect of the hcf_action call, the remainder of Rx related info is re-initialized as
2835 * well.
2836 *4: In case of Defunct mode, the information supplied by Hermes is unreliable, so the body of
2837 * hcf_service_nic is skipped. Since hcf_cntl turns into a NOP if Primary or Station F/W is incompatible,
2838 * hcf_service_nic is also skipped in those cases.
2839 * To prevent that hcf_service_nic reports bogus information to the MSF with all - possibly difficult to
2840 * debug - undesirable side effects, it is paramount to check the NIC presence. In former days the presence
2841 * test was based on the Hermes register HREG_SW_0. Since in HCF_ACT_INT_OFF is chosen for strategy based on
2842 * HREG_EV_STAT, this is now also used in hcf_service_nic. The motivation to change strategy is partly
2843 * due to inconsistent F/W implementations with respect to HREG_SW_0 manipulation around reset and download.
2844 * Note that in polled environments Card Removal is not detected by INT_OFF which makes the check in
2845 * hcf_service_nic even more important.
2846 *8: The event status register of the Hermes is sampled
2847 * The assert checks for unexpected events ;?????????????????????????????????????.
2848 * - HREG_EV_INFO_DROP is explicitly excluded from the acceptable HREG_EV_STAT bits because it indicates
2849 * a too heavily loaded system.
2850 * - HREG_EV_ACK_REG_READY is 0x0000 for H-I (and hopefully H-II.5)
2851 *
2852 *
2853 * HREG_EV_TX_EXC is accepted (via HREG_EV_TX_EXT) if and only if HCF_EXT_INT_TX_EX set in the HCF_EXT
2854 * definition at compile time.
2855 * The following activities are handled:
2856 * - Alloc events are handled by hcf_send_msg (and notify). Only if there is no "spare" resource, the
2857 * alloc event is superficially serviced by hcf_service_nic to create a pseudo-resource with value
2858 * 0x001. This value is recognized by get_fid (called by hcf_send_msg and notify) where the real
2859 * TxFid is retrieved and the Hermes is acked and - hopefully - the "normal" case with a spare TxFid
2860 * in IFB_RscInd is restored.
2861 * - Info drop events are handled by incrementing a tally
2862 * - LinkEvent (including solicited and unsolicited tallies) are handled by procedure isr_info.
2863 * - TxEx (if selected at compile time) is handled by copying the significant part of the TxFS
2864 * into the IFB for further processing by the MSF.
2865 * Note the complication of the zero-FID protection sub-scheme in DAWA.
2866 * Note, the Ack of all of above events is handled at the end of hcf_service_nic
2867 *16: In case of non-DMA ( either not compiled in or due to a run-time choice):
2868 * If an Rx-frame is available, first the FID of that frame is read, including the complication of the
2869 * zero-FID protection sub-scheme in DAWA. Note that such a zero-FID is acknowledged at the end of
2870 * hcf_service_nic and that this depends on the IFB_RxLen initialization in the begin of hcf_service_nic.
2871 * The Assert validates the HCF assumption about Hermes implementation upon which the range of
2872 * Pseudo-RIDs is based.
2873 * Then the control fields up to the start of the 802.3 frame are read from the NIC into the lookahead buffer.
2874 * The status field is converted to native Endianness.
2875 * The length is, after implicit Endianness conversion if needed, and adjustment for the 14 bytes of the
2876 * 802.3 MAC header, stored in IFB_RxLen.
2877 * In MAC Monitor mode, 802.11 control frames with a TOTAL length of 14 are received, so without this
2878 * length adjustment, IFB_RxLen could not be used to distinguish these frames from "no frame".
2879 * No MIC calculation processes are associated with the reading of these Control fields.
2880 *26: This length test feels like superfluous robustness against malformed frames, but it turned out to be
2881 * needed in the real (hostile) world.
2882 * The decapsulation check needs sufficient data to represent DA, SA, L, SNAP and Type which amounts to
2883 * 22 bytes. In MAC Monitor mode, 802.11 control frames with a smaller length are received. To prevent
2884 * that the implementation goes haywire, a check on the length is needed.
2885 * The actual decapsulation takes place on the fly in the copying process by overwriting the SNAP header.
2886 * Note that in case of decapsulation the SNAP header is not passed to the MSF, hence IFB_RxLen must be
2887 * compensated for the SNAP header length.
2888 * The 22 bytes needed for decapsulation are (more than) sufficient for the exceptional handling of the
2889 * MIC algorithm of the L-field (replacing the 2 byte L-field with 4 0x00 bytes).
2890 *30: The 12 in the no-WPA branch corresponds with the get_frag, the 2 with the IPW of the WPA branch
2891 *32: If Hermes reported MIC-presence, than the MIC engine is initialized with the non-dummy MIC calculation
2892 * routine address and appropriate key.
2893 *34: The 8 bytes after the DA, SA, L are read and it is checked whether decapsulation is needed i.e.:
2894 * - the Hermes reported Tunnel encapsulation or
2895 * - the Hermes reported 1042 Encapsulation and hcf_encap reports that the HCF would not have used
2896 * 1042 as the encapsulation mechanism
2897 * Note that the first field of the RxFS in bufp has Native Endianness due to the conversion done by the
2898 * BE_PAR in get_frag.
2899 *36: The Type field is the only word kept (after moving) of the just read 8 bytes, it is moved to the
2900 * L-field. The original L-field and 6 byte SNAP header are discarded, so IFB_RxLen and buf_addr must
2901 * be adjusted by 8.
2902 *40: Determine how much of the frame (starting with DA) fits in the Lookahead buffer, then read the not-yet
2903 * read data into the lookahead buffer.
2904 * If the lookahead buffer contains the complete message, check the MIC. The majority considered this
2905 * I/F more appropriate then have the MSF call hcf_get_data only to check the MIC.
2906 *44: Since the complete message is copied from NIC RAM to PC RAM, the Rx can be acknowledged to the Hermes
2907 * to optimize the flow ( a better chance to get new Rx data in the next pass through hcf_service_nic ).
2908 * This acknowledgement can not be done via hcf_action( HCF_ACT_RX_ACK ) because this also clears
2909 * IFB_RxLEN thus corrupting the I/F to the MSF.
2910 *;?: In case of DMA (compiled in and activated):
2911 
2912 
2913 *54: Limiting the number of places where the F/W is acked (e.g. the merging of the Rx-ACK with the other
2914 * ACKs), is supposed to diminish the potential of race conditions in the F/W.
2915 * Note 1: The CMD event is acknowledged in cmd_cmpl
2916 * Note 2: HREG_EV_ACK_REG_READY is 0x0000 for H-I (and hopefully H-II.5)
2917 * Note 3: The ALLOC event is acknowledged in get_fid (except for the initialization flow)
2918 *
2919 *.NOTICE
2920 * The Non-DMA HREG_EV_RX is handled different compared with the other F/W events.
2921 * The HREG_EV_RX event is acknowledged by the first hcf_service_nic call after the
2922 * hcf_service_nic call that reported the occurrence of this event.
2923 * This acknowledgment
2924 * makes the next Receive Frame Structure (if any) available.
2925 * An updated IFB_RxLen
2926 * field reflects this availability.
2927 *
2928 *.NOTICE
2929 * The minimum size for Len must supply space for:
2930 * - an F/W dependent number of bytes of Control Info field including the 802.11 Header field
2931 * - Destination Address
2932 * - Source Address
2933 * - Length field
2934 * - [ SNAP Header]
2935 * - [ Ethernet-II Type]
2936 * This results in 68 for Hermes-I and 80 for Hermes-II
2937 * This way the minimum amount of information is available needed by the HCF to determine whether the frame
2938 * must be decapsulated.
2939 *.ENDDOC END DOCUMENTATION
2940 *
2941 ************************************************************************************************************/
2942 int
2943 hcf_service_nic( IFBP ifbp, wci_bufp bufp, unsigned int len )
2944 {
2945 
2946  int rc = HCF_SUCCESS;
2947  hcf_16 stat;
2949  hcf_16 i;
2950 
2952  HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
2953  HCFASSERT_INT;
2954 
2955  ifbp->IFB_LinkStat = 0; // ;? to be obsoleted ASAP /* 1*/
2956  ifbp->IFB_DSLinkStat &= ~CFG_LINK_STAT_CHANGE; /* 1*/
2957  (void)hcf_action( ifbp, HCF_ACT_RX_ACK ); /* 2*/
2958  if ( ifbp->IFB_CardStat == 0 && ( stat = IPW( HREG_EV_STAT ) ) != 0xFFFF ) { /* 4*/
2959 /* IF_NOT_DMA( HCFASSERT( !( stat & ~HREG_EV_BASIC_MASK, stat ) )
2960  * IF_NOT_USE_DMA( HCFASSERT( !( stat & ~HREG_EV_BASIC_MASK, stat ) )
2961  * IF_USE_DMA( HCFASSERT( !( stat & ~( HREG_EV_BASIC_MASK ^ ( HREG_EV_...DMA.... ), stat ) )
2962  */
2963  /* 8*/
2964  if ( ifbp->IFB_RscInd == 0 && stat & HREG_EV_ALLOC ) { //Note: IFB_RscInd is ALWAYS 1 for DMA
2965  ifbp->IFB_RscInd = 1;
2966  }
2967  IF_TALLY( if ( stat & HREG_EV_INFO_DROP ) { ifbp->IFB_HCF_Tallies.NoBufInfo++; } );
2968 #if (HCF_EXT) & HCF_EXT_INT_TICK
2969  if ( stat & HREG_EV_TICK ) {
2970  ifbp->IFB_TickCnt++;
2971  }
2972 #if 0 // (HCF_SLEEP) & HCF_DDS
2973  if ( ifbp->IFB_TickCnt == 3 && ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_CONNECTED ) == 0 ) {
2974  CFG_DDS_TICK_TIME_STRCT ltv;
2975  // 2 second period (with 1 tick uncertanty) in not-connected mode -->go into DS_OOR
2976  hcf_action( ifbp, HCF_ACT_SLEEP );
2977  ifbp->IFB_DSLinkStat |= CFG_LINK_STAT_DS_OOR; //set OutOfRange
2978  ltv.len = 2;
2979  ltv.typ = CFG_DDS_TICK_TIME;
2980  ltv.tick_time = ( ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_TIMER ) + 0x10 ) *64; //78 is more right
2981  hcf_put_info( ifbp, (LTVP)&ltv );
2982  printk(KERN_NOTICE "Preparing for sleep, link_status: %04X, timer : %d\n",
2983  ifbp->IFB_DSLinkStat, ltv.tick_time );//;?remove me 1 day
2984  ifbp->IFB_TickCnt++; //;?just to make sure we do not keep on printing above message
2985  if ( ltv.tick_time < 300 * 125 ) ifbp->IFB_DSLinkStat += 0x0010;
2986 
2987  }
2988 #endif // HCF_DDS
2989 #endif // HCF_EXT_INT_TICK
2990  if ( stat & HREG_EV_INFO ) {
2991  isr_info( ifbp );
2992  }
2993 #if (HCF_EXT) & HCF_EXT_INT_TX_EX
2994  if ( stat & HREG_EV_TX_EXT && ( i = IPW( HREG_TX_COMPL_FID ) ) != 0 /*DAWA*/ ) {
2996  (void)setup_bap( ifbp, i, 0, IO_IN );
2997  get_frag( ifbp, &ifbp->IFB_TxFsStat, HFS_SWSUP BE_PAR(1) );
2998  }
2999 #endif // HCF_EXT_INT_TX_EX
3000 
3001 #if HCF_DMA
3002  if ( !( ifbp->IFB_CntlOpt & USE_DMA ) )
3003 #endif // HCF_DMA
3004  /*16*/ if ( stat & HREG_EV_RX && ( ifbp->IFB_RxFID = IPW( HREG_RX_FID ) ) != 0 ) { //if 0 then DAWA_ACK
3005  HCFASSERT( bufp, len );
3006  HCFASSERT( len >= HFS_DAT + 2, len );
3008  HCFASSERT( ifbp->IFB_RxFID < CFG_PROD_DATA, ifbp->IFB_RxFID);
3009  (void)setup_bap( ifbp, ifbp->IFB_RxFID, 0, IO_IN );
3010  get_frag( ifbp, bufp, HFS_ADDR_DEST BE_PAR(1) );
3011  ifbp->IFB_lap = buf_addr = bufp + HFS_ADDR_DEST;
3012  ifbp->IFB_RxLen = (hcf_16)(bufp[HFS_DAT_LEN] + (bufp[HFS_DAT_LEN+1]<<8) + 2*6 + 2);
3013  /*26*/ if ( ifbp->IFB_RxLen >= 22 ) { // convenient for MIC calculation (5 DWs + 1 "skipped" W)
3014  //. get DA,SA,Len/Type and (SNAP,Type or 8 data bytes)
3015  /*30*/ get_frag( ifbp, buf_addr, 22 BE_PAR(0) );
3016  /*32*/ CALC_RX_MIC( bufp, -1 ); //. initialize MIC
3017  CALC_RX_MIC( buf_addr, HCF_DASA_SIZE ); //. MIC over DA, SA
3018  CALC_RX_MIC( null_addr, 4 ); //. MIC over (virtual) priority field
3019  CALC_RX_MIC( buf_addr+14, 8 ); //. skip Len, MIC over SNAP,Type or 8 data bytes)
3020  buf_addr += 22;
3021 #if (HCF_ENCAP) == HCF_ENC
3022  HCFASSERT( len >= HFS_DAT + 2 + sizeof(snap_header), len );
3023  /*34*/ i = *(wci_recordp)&bufp[HFS_STAT] & ( HFS_STAT_MSG_TYPE | HFS_STAT_ERR );
3024  if ( i == HFS_STAT_TUNNEL ||
3025  ( i == HFS_STAT_1042 && hcf_encap( (wci_bufp)&bufp[HFS_TYPE] ) != ENC_TUNNEL ) ) {
3026  //. copy E-II Type to 802.3 LEN field
3027  /*36*/ bufp[HFS_LEN ] = bufp[HFS_TYPE ];
3028  bufp[HFS_LEN+1] = bufp[HFS_TYPE+1];
3029  //. discard Snap by overwriting with data
3030  ifbp->IFB_RxLen -= (HFS_TYPE - HFS_LEN);
3031  buf_addr -= ( HFS_TYPE - HFS_LEN ); // this happens to bring us at a DW boundary of 36
3032  }
3033 #endif // HCF_ENC
3034  }
3035  /*40*/ ifbp->IFB_lal = min( (hcf_16)(len - HFS_ADDR_DEST), ifbp->IFB_RxLen );
3036  i = ifbp->IFB_lal - ( buf_addr - ( bufp + HFS_ADDR_DEST ) );
3037  get_frag( ifbp, buf_addr, i BE_PAR(0) );
3038  CALC_RX_MIC( buf_addr, i );
3039 #if (HCF_TYPE) & HCF_TYPE_WPA
3040  if ( ifbp->IFB_lal == ifbp->IFB_RxLen ) {
3041  rc = check_mic( ifbp );
3042  }
3043 #endif // HCF_TYPE_WPA
3044  /*44*/ if ( len - HFS_ADDR_DEST >= ifbp->IFB_RxLen ) {
3045  ifbp->IFB_RxFID = 0;
3046  } else { /* IFB_RxFID is cleared, so you do not get another Rx_Ack at next entry of hcf_service_nic */
3047  stat &= (hcf_16)~HREG_EV_RX; //don't ack Rx if processing not yet completed
3048  }
3049  }
3050  // in case of DMA: signal availability of rx and/or tx packets to MSF
3051  IF_USE_DMA( ifbp->IFB_DmaPackets |= stat & ( HREG_EV_RDMAD | HREG_EV_TDMAD ) );
3052  // rlav : pending HREG_EV_RDMAD or HREG_EV_TDMAD events get acknowledged here.
3053  /*54*/ stat &= (hcf_16)~( HREG_EV_SLEEP_REQ | HREG_EV_CMD | HREG_EV_ACK_REG_READY | HREG_EV_ALLOC | HREG_EV_FW_DMA );
3054 //a positive mask would be easier to understand /*54*/ stat &= (hcf_16)~( HREG_EV_SLEEP_REQ | HREG_EV_CMD | HREG_EV_ACK_REG_READY | HREG_EV_ALLOC | HREG_EV_FW_DMA );
3055  IF_USE_DMA( stat &= (hcf_16)~HREG_EV_RX );
3056  if ( stat ) {
3057  DAWA_ACK( stat ); /*DAWA*/
3058  }
3059  }
3061  return rc;
3062 } // hcf_service_nic
3063 
3064 
3065 /************************************************************************************************************
3066  ************************** H C F S U P P O R T R O U T I N E S ******************************************
3067  ************************************************************************************************************/
3068 
3069 
3070 /************************************************************************************************************
3071  *
3072  *.SUBMODULE void calc_mic( hcf_32* p, hcf_32 m )
3073  *.PURPOSE calculate MIC on a quad byte.
3074  *
3075  *.ARGUMENTS
3076  * p address of the MIC
3077  * m 32 bit value to be processed by the MIC calculation engine
3078  *
3079  *.RETURNS N.A.
3080  *
3081  *.DESCRIPTION
3082  * calc_mic is the implementation of the MIC algorithm. It is a monkey-see monkey-do copy of
3083  * Michael::appendByte()
3084  * of Appendix C of ..........
3085  *
3086  *
3087  *.DIAGRAM
3088  *
3089  *.NOTICE
3090  *.ENDDOC END DOCUMENTATION
3091  *
3092  ************************************************************************************************************/
3093 
3094 #if (HCF_TYPE) & HCF_TYPE_WPA
3095 
3096 #define ROL32( A, n ) ( ((A) << (n)) | ( ((A)>>(32-(n))) & ( (1UL << (n)) - 1 ) ) )
3097 #define ROR32( A, n ) ROL32( (A), 32-(n) )
3098 
3099 #define L *p
3100 #define R *(p+1)
3101 
3102 void
3103 calc_mic( hcf_32* p, hcf_32 m )
3104 {
3105 #if HCF_BIG_ENDIAN
3106  m = (m >> 16) | (m << 16);
3107 #endif // HCF_BIG_ENDIAN
3108  L ^= m;
3109  R ^= ROL32( L, 17 );
3110  L += R;
3111  R ^= ((L & 0xff00ff00) >> 8) | ((L & 0x00ff00ff) << 8);
3112  L += R;
3113  R ^= ROL32( L, 3 );
3114  L += R;
3115  R ^= ROR32( L, 2 );
3116  L += R;
3117 } // calc_mic
3118 #undef R
3119 #undef L
3120 #endif // HCF_TYPE_WPA
3121 
3122 
3123 
3124 #if (HCF_TYPE) & HCF_TYPE_WPA
3125 /************************************************************************************************************
3126  *
3127  *.SUBMODULE void calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len )
3128  *.PURPOSE calculate MIC on a single fragment.
3129  *
3130  *.ARGUMENTS
3131  * ifbp address of the Interface Block
3132  * bufp (byte) address of buffer
3133  * len length in bytes of buffer specified by bufp
3134  *
3135  *.RETURNS N.A.
3136  *
3137  *.DESCRIPTION
3138  * calc_mic_rx_frag ........
3139  *
3140  * The MIC is located in the IFB.
3141  * The MIC is separate for Tx and Rx, thus allowing hcf_send_msg to occur between hcf_service_nic and
3142  * hcf_rcv_msg.
3143  *
3144  *
3145  *.DIAGRAM
3146  *
3147  *.NOTICE
3148  *.ENDDOC END DOCUMENTATION
3149  *
3150  ************************************************************************************************************/
3151 void
3152 calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len )
3153 {
3154  static union { hcf_32 x32; hcf_16 x16[2]; hcf_8 x8[4]; } x; //* area to accumulate 4 bytes input for MIC engine
3155  int i;
3156 
3157  if ( len == -1 ) { //initialize MIC housekeeping
3158  i = *(wci_recordp)&p[HFS_STAT];
3159  /* i = CNV_SHORTP_TO_LITTLE(&p[HFS_STAT]); should not be neede to prevent alignment poroblems
3160  * since len == -1 if and only if p is lookahaead buffer which MUST be word aligned
3161  * to be re-investigated by NvR
3162  */
3163 
3164  if ( ( i & HFS_STAT_MIC ) == 0 ) {
3165  ifbp->IFB_MICRxCarry = 0xFFFF; //suppress MIC calculation
3166  } else {
3167  ifbp->IFB_MICRxCarry = 0;
3168 //* Note that "coincidentally" the bit positions used in HFS_STAT
3169 //* correspond with the offset of the key in IFB_MICKey
3170  i = ( i & HFS_STAT_MIC_KEY_ID ) >> 10; /* coincidentally no shift needed for i itself */
3171  ifbp->IFB_MICRx[0] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICRxKey[i ]);
3172  ifbp->IFB_MICRx[1] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICRxKey[i+1]);
3173  }
3174  } else {
3175  if ( ifbp->IFB_MICRxCarry == 0 ) {
3176  x.x32 = CNV_LONGP_TO_LITTLE(p);
3177  p += 4;
3178  if ( len < 4 ) {
3179  ifbp->IFB_MICRxCarry = (hcf_16)len;
3180  } else {
3181  ifbp->IFB_MICRxCarry = 4;
3182  len -= 4;
3183  }
3184  } else while ( ifbp->IFB_MICRxCarry < 4 && len ) { //note for hcf_16 applies: 0xFFFF > 4
3185  x.x8[ifbp->IFB_MICRxCarry++] = *p++;
3186  len--;
3187  }
3188  while ( ifbp->IFB_MICRxCarry == 4 ) { //contrived so we have only 1 call to calc_mic so we could bring it in-line
3189  calc_mic( ifbp->IFB_MICRx, x.x32 );
3190  x.x32 = CNV_LONGP_TO_LITTLE(p);
3191  p += 4;
3192  if ( len < 4 ) {
3193  ifbp->IFB_MICRxCarry = (hcf_16)len;
3194  }
3195  len -= 4;
3196  }
3197  }
3198 } // calc_mic_rx_frag
3199 #endif // HCF_TYPE_WPA
3200 
3201 
3202 #if (HCF_TYPE) & HCF_TYPE_WPA
3203 /************************************************************************************************************
3204  *
3205  *.SUBMODULE void calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len )
3206  *.PURPOSE calculate MIC on a single fragment.
3207  *
3208  *.ARGUMENTS
3209  * ifbp address of the Interface Block
3210  * bufp (byte) address of buffer
3211  * len length in bytes of buffer specified by bufp
3212  *
3213  *.RETURNS N.A.
3214  *
3215  *.DESCRIPTION
3216  * calc_mic_tx_frag ........
3217  *
3218  * The MIC is located in the IFB.
3219  * The MIC is separate for Tx and Rx, thus allowing hcf_send_msg to occur between hcf_service_nic and
3220  * hcf_rcv_msg.
3221  *
3222  *
3223  *.DIAGRAM
3224  *
3225  *.NOTICE
3226  *.ENDDOC END DOCUMENTATION
3227  *
3228  ************************************************************************************************************/
3229 void
3230 calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len )
3231 {
3232  static union { hcf_32 x32; hcf_16 x16[2]; hcf_8 x8[4]; } x; //* area to accumulate 4 bytes input for MIC engine
3233 
3234  //if initialization request
3235  if ( len == -1 ) {
3236  //. presume MIC calculation disabled
3237  ifbp->IFB_MICTxCarry = 0xFFFF;
3238  //. if MIC calculation enabled
3239  if ( ifbp->IFB_MICTxCntl ) {
3240  //. . clear MIC carry
3241  ifbp->IFB_MICTxCarry = 0;
3242  //. . initialize MIC-engine
3243  ifbp->IFB_MICTx[0] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICTxKey[0]); /*Tx always uses Key 0 */
3244  ifbp->IFB_MICTx[1] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICTxKey[1]);
3245  }
3246  //else
3247  } else {
3248  //. if MIC enabled (Tx) / if MIC present (Rx)
3249  //. and no carry from previous calc_mic_frag
3250  if ( ifbp->IFB_MICTxCarry == 0 ) {
3251  //. . preset accu with 4 bytes from buffer
3252  x.x32 = CNV_LONGP_TO_LITTLE(p);
3253  //. . adjust pointer accordingly
3254  p += 4;
3255  //. . if buffer contained less then 4 bytes
3256  if ( len < 4 ) {
3257  //. . . promote valid bytes in accu to carry
3258  //. . . flag accu to contain incomplete double word
3259  ifbp->IFB_MICTxCarry = (hcf_16)len;
3260  //. . else
3261  } else {
3262  //. . . flag accu to contain complete double word
3263  ifbp->IFB_MICTxCarry = 4;
3264  //. . adjust remaining buffer length
3265  len -= 4;
3266  }
3267  //. else if MIC enabled
3268  //. and if carry bytes from previous calc_mic_tx_frag
3269  //. . move (1-3) bytes from carry into accu
3270  } else while ( ifbp->IFB_MICTxCarry < 4 && len ) { /* note for hcf_16 applies: 0xFFFF > 4 */
3271  x.x8[ifbp->IFB_MICTxCarry++] = *p++;
3272  len--;
3273  }
3274  //. while accu contains complete double word
3275  //. and MIC enabled
3276  while ( ifbp->IFB_MICTxCarry == 4 ) {
3277  //. . pass accu to MIC engine
3278  calc_mic( ifbp->IFB_MICTx, x.x32 );
3279  //. . copy next 4 bytes from buffer to accu
3280  x.x32 = CNV_LONGP_TO_LITTLE(p);
3281  //. . adjust buffer pointer
3282  p += 4;
3283  //. . if buffer contained less then 4 bytes
3284  //. . . promote valid bytes in accu to carry
3285  //. . . flag accu to contain incomplete double word
3286  if ( len < 4 ) {
3287  ifbp->IFB_MICTxCarry = (hcf_16)len;
3288  }
3289  //. . adjust remaining buffer length
3290  len -= 4;
3291  }
3292  }
3293 } // calc_mic_tx_frag
3294 #endif // HCF_TYPE_WPA
3295 
3296 
3297 #if HCF_PROT_TIME
3298 /************************************************************************************************************
3299  *
3300  *.SUBMODULE void calibrate( IFBP ifbp )
3301  *.PURPOSE calibrates the S/W protection counter against the Hermes Timer tick.
3302  *
3303  *.ARGUMENTS
3304  * ifbp address of the Interface Block
3305  *
3306  *.RETURNS N.A.
3307  *
3308  *.DESCRIPTION
3309  * calibrates the S/W protection counter against the Hermes Timer tick
3310  * IFB_TickIni is the value used to initialize the S/W protection counter such that the expiration period
3311  * more or less independent of the processor speed. If IFB_TickIni is not yet calibrated, it is done now.
3312  * This calibration is "reasonably" accurate because the Hermes is in a quiet state as a result of the
3313  * Initialize command.
3314  *
3315  *
3316  *.DIAGRAM
3317  *
3318  *1: IFB_TickIni is initialized at INI_TICK_INI by hcf_connect. If calibrate succeeds, IFB_TickIni is
3319  * guaranteed to be changed. As a consequence there will be only 1 shot at calibration (regardless of the
3320  * number of init calls) under normal circumstances.
3321  *2: Calibration is done HCF_PROT_TIME_CNT times. This diminish the effects of jitter and interference,
3322  * especially in a pre-emptive environment. HCF_PROT_TIME_CNT is in the range of 16 through 32 and derived
3323  * from the HCF_PROT_TIME specified by the MSF programmer. The divisor needed to scale HCF_PROT_TIME into the
3324  * 16-32 range, is used as a multiplicator after the calibration, to scale the found value back to the
3325  * requested range. This way a compromise is achieved between accuracy and duration of the calibration
3326  * process.
3327  *3: Acknowledge the Timer Tick Event.
3328  * Each cycle is limited to at most INI_TICK_INI samples of the TimerTick status of the Hermes.
3329  * Since the start of calibrate is unrelated to the Hermes Internal Timer, the first interval may last from 0
3330  * to the normal interval, all subsequent intervals should be the full length of the Hermes Tick interval.
3331  * The Hermes Timer Tick is not reprogrammed by the HCF, hence it is running at the default of 10 k
3332  * microseconds.
3333  *4: If the Timer Tick Event is continuously up (prot_cnt still has the value INI_TICK_INI) or no Timer Tick
3334  * Event occurred before the protection counter expired, reset IFB_TickIni to INI_TICK_INI,
3335  * set the defunct bit of IFB_CardStat (thus rendering the Hermes inoperable) and exit the calibrate routine.
3336  *8: ifbp->IFB_TickIni is multiplied to scale the found value back to the requested range as explained under 2.
3337  *
3338  *.NOTICE
3339  * o Although there are a number of viewpoints possible, calibrate() uses as error strategy that a single
3340  * failure of the Hermes TimerTick is considered fatal.
3341  * o There is no hard and concrete time-out value defined for Hermes activities. The default 1 seconds is
3342  * believed to be sufficiently "relaxed" for real life and to be sufficiently short to be still useful in an
3343  * environment with humans.
3344  * o Note that via IFB_DefunctStat time outs in cmd_wait and in hcfio_string block all Hermes access till the
3345  * next init so functions which call a mix of cmd_wait and hcfio_string only need to check the return status
3346  * of the last call
3347  * o The return code is preset at Time out.
3348  * The additional complication that no calibrated value for the protection count can be assumed since
3349  * calibrate() does not yet have determined a calibrated value (a catch 22), is handled by setting the
3350  * initial value at INI_TICK_INI (by hcf_connect). This approach is considered safe, because:
3351  * - the HCF does not use the pipeline mechanism of Hermes commands.
3352  * - the likelihood of failure (the only time when protection count is relevant) is small.
3353  * - the time will be sufficiently large on a fast machine (busy bit drops on good NIC before counter
3354  * expires)
3355  * - the time will be sufficiently small on a slow machine (counter expires on bad NIC before the end user
3356  * switches the power off in despair
3357  * The time needed to wrap a 32 bit counter around is longer than many humans want to wait, hence the more or
3358  * less arbitrary value of 0x40000L is chosen, assuming it does not take too long on an XT and is not too
3359  * short on a scream-machine.
3360  *
3361  *.ENDDOC END DOCUMENTATION
3362  *
3363  ************************************************************************************************************/
3364 HCF_STATIC void
3366 {
3367  int cnt = HCF_PROT_TIME_CNT;
3368  hcf_32 prot_cnt;
3369 
3370  HCFTRACE( ifbp, HCF_TRACE_CALIBRATE );
3371  if ( ifbp->IFB_TickIni == INI_TICK_INI ) { /*1*/
3372  ifbp->IFB_TickIni = 0; /*2*/
3373  while ( cnt-- ) {
3374  prot_cnt = INI_TICK_INI;
3375  OPW( HREG_EV_ACK, HREG_EV_TICK ); /*3*/
3376  while ( (IPW( HREG_EV_STAT ) & HREG_EV_TICK) == 0 && --prot_cnt ) {
3377  ifbp->IFB_TickIni++;
3378  }
3379  if ( prot_cnt == 0 || prot_cnt == INI_TICK_INI ) { /*4*/
3380  ifbp->IFB_TickIni = INI_TICK_INI;
3383  HCFASSERT( DO_ASSERT, prot_cnt );
3384  }
3385  }
3386  ifbp->IFB_TickIni <<= HCF_PROT_TIME_SHFT; /*8*/
3387  }
3389 } // calibrate
3390 #endif // HCF_PROT_TIME
3391 
3392 
3393 #if (HCF_TYPE) & HCF_TYPE_WPA
3394 /************************************************************************************************************
3395  *
3396  *.SUBMODULE int check_mic( IFBP ifbp )
3397  *.PURPOSE verifies the MIC of a received non-USB frame.
3398  *
3399  *.ARGUMENTS
3400  * ifbp address of the Interface Block
3401  *
3402  *.RETURNS
3403  * HCF_SUCCESS
3404  * HCF_ERR_MIC
3405  *
3406  *.DESCRIPTION
3407  *
3408  *
3409  *.DIAGRAM
3410  *
3411  *4: test whether or not a MIC is reported by the Hermes
3412  *14: the calculated MIC and the received MIC are compared, the return status is set when there is a mismatch
3413  *
3414  *.NOTICE
3415  *.ENDDOC END DOCUMENTATION
3416  *
3417  ************************************************************************************************************/
3418 int
3419 check_mic( IFBP ifbp )
3420 {
3421  int rc = HCF_SUCCESS;
3422  hcf_32 x32[2]; //* area to save rcvd 8 bytes MIC
3423 
3424  //if MIC present in RxFS
3425  if ( *(wci_recordp)&ifbp->IFB_lap[-HFS_ADDR_DEST] & HFS_STAT_MIC ) {
3426  //or if ( ifbp->IFB_MICRxCarry != 0xFFFF )
3427  CALC_RX_MIC( mic_pad, 8 ); //. process up to 3 remaining bytes of data and append 5 to 8 bytes of padding to MIC calculation
3428  get_frag( ifbp, (wci_bufp)x32, 8 BE_PAR(0));//. get 8 byte MIC from NIC
3429  //. if calculated and received MIC do not match
3430  //. . set status at HCF_ERR_MIC
3431  /*14*/ if ( x32[0] != CNV_LITTLE_TO_LONG(ifbp->IFB_MICRx[0]) ||
3432  x32[1] != CNV_LITTLE_TO_LONG(ifbp->IFB_MICRx[1]) ) {
3433  rc = HCF_ERR_MIC;
3434  }
3435  }
3436  //return status
3437  return rc;
3438 } // check_mic
3439 #endif // HCF_TYPE_WPA
3440 
3441 
3442 /************************************************************************************************************
3443  *
3444  *.SUBMODULE int cmd_cmpl( IFBP ifbp )
3445  *.PURPOSE waits for Hermes Command Completion.
3446  *
3447  *.ARGUMENTS
3448  * ifbp address of the Interface Block
3449  *
3450  *.RETURNS
3451  * IFB_DefunctStat
3452  * HCF_ERR_TIME_OUT
3453  * HCF_ERR_DEFUNCT_CMD_SEQ
3454  * HCF_SUCCESS
3455  *
3456  *.DESCRIPTION
3457  *
3458  *
3459  *.DIAGRAM
3460  *
3461  *2: Once cmd_cmpl is called, the Busy option bit in IFB_Cmd must be cleared
3462  *4: If Status register and command code don't match either:
3463  * - the Hermes and Host are out of sync ( a fatal error)
3464  * - error bits are reported via the Status Register.
3465  * Out of sync is considered fatal and brings the HCF in Defunct mode
3466  * Errors reported via the Status Register should be caused by sequence violations in Hermes command
3467  * sequences and hence these bugs should have been found during engineering testing. Since there is no
3468  * strategy to cope with this problem, it might as well be ignored at run time. Note that for any particular
3469  * situation where a strategy is formulated to handle the consequences of a particular bug causing a
3470  * particular Error situation reported via the Status Register, the bug should be removed rather than adding
3471  * logic to cope with the consequences of the bug.
3472  * There have been HCF versions where an error report via the Status Register even brought the HCF in defunct
3473  * mode (although it was not yet named like that at that time). This is particular undesirable behavior for a
3474  * general library.
3475  * Simply reporting the error (as "interesting") is debatable. There also have been HCF versions with this
3476  * strategy using the "vague" HCF_FAILURE code.
3477  * The error is reported via:
3478  * - MiscErr tally of the HCF Tally set
3479  * - the (informative) fields IFB_ErrCmd and IFB_ErrQualifier
3480  * - the assert mechanism
3481  *8: Here the Defunct case and the Status error are separately treated
3482  *
3483  *
3484  *.ENDDOC END DOCUMENTATION
3485  *
3486  ************************************************************************************************************/
3487 HCF_STATIC int
3489 {
3490 
3491  PROT_CNT_INI;
3492  int rc = HCF_SUCCESS;
3493  hcf_16 stat;
3494 
3496  ifbp->IFB_Cmd &= ~HCMD_BUSY; /* 2 */
3497  HCF_WAIT_WHILE( (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 ); /* 4 */
3498  stat = IPW( HREG_STAT );
3499 #if HCF_PROT_TIME
3500  if ( prot_cnt == 0 ) {
3501  IF_TALLY( ifbp->IFB_HCF_Tallies.MiscErr++ );
3502  rc = HCF_ERR_TIME_OUT;
3503  HCFASSERT( DO_ASSERT, ifbp->IFB_Cmd );
3504  } else
3505 #endif // HCF_PROT_TIME
3506  {
3507  DAWA_ACK( HREG_EV_CMD );
3508  /*4*/ if ( stat != (ifbp->IFB_Cmd & HCMD_CMD_CODE) ) {
3509  /*8*/ if ( ( (stat ^ ifbp->IFB_Cmd ) & HCMD_CMD_CODE) != 0 ) {
3512  }
3513  IF_TALLY( ifbp->IFB_HCF_Tallies.MiscErr++ );
3514  ifbp->IFB_ErrCmd = stat;
3515  ifbp->IFB_ErrQualifier = IPW( HREG_RESP_0 );
3518  }
3519  }
3520  HCFASSERT( rc == HCF_SUCCESS, rc);
3522  return rc;
3523 } // cmd_cmpl
3524 
3525 
3526 /************************************************************************************************************
3527  *
3528  *.SUBMODULE int cmd_exe( IFBP ifbp, int cmd_code, int par_0 )
3529  *.PURPOSE Executes synchronous part of Hermes Command and - optionally - waits for Command Completion.
3530  *
3531  *.ARGUMENTS
3532  * ifbp address of the Interface Block
3533  * cmd_code
3534  * par_0
3535  *
3536  *.RETURNS
3537  * IFB_DefunctStat
3538  * HCF_ERR_DEFUNCT_CMD_SEQ
3539  * HCF_SUCCESS
3540  * HCF_ERR_TO_BE_ADDED <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
3541  *
3542  *.DESCRIPTION
3543  * Executes synchronous Hermes Command and waits for Command Completion
3544  *
3545  * The general HCF strategy is to wait for command completion. As a consequence:
3546  * - the read of the busy bit before writing the command register is superfluous
3547  * - the Hermes requirement that no Inquiry command may be executed if there is still an unacknowledged
3548  * Inquiry command outstanding, is automatically met.
3549  * The Tx command uses the "Busy" bit in the cmd_code parameter to deviate from this general HCF strategy.
3550  * The idea is that by not busy-waiting on completion of this frequently used command the processor
3551  * utilization is diminished while using the busy-wait on all other seldom used commands the flow is kept
3552  * simple.
3553  *
3554  *
3555  *
3556  *.DIAGRAM
3557  *
3558  *1: skip the body of cmd_exe when in defunct mode or when - based on the S/W Support register write and
3559  * read back test - there is apparently no NIC.
3560  * Note: we gave up on the "old" strategy to write the S/W Support register at magic only when needed. Due to
3561  * the intricateness of Hermes F/W varieties ( which behave differently as far as corruption of the S/W
3562  * Support register is involved), the increasing number of Hermes commands which do an implicit initialize
3563  * (thus modifying the S/W Support register) and the workarounds of some OS/Support S/W induced aspects (e.g.
3564  * the System Soft library at WinNT which postpones the actual mapping of I/O space up to 30 seconds after
3565  * giving the go-ahead), the "magic" strategy is now reduced to a simple write and read back. This means that
3566  * problems like a bug tramping over the memory mapped Hermes registers will no longer be noticed as side
3567  * effect of the S/W Support register check.
3568  *2: check whether the preceding command skipped the busy wait and if so, check for command completion
3569  *
3570  *.NOTICE
3571  *.ENDDOC END DOCUMENTATION
3572  *
3573  ************************************************************************************************************/
3574 
3575 HCF_STATIC int
3576 cmd_exe( IFBP ifbp, hcf_16 cmd_code, hcf_16 par_0 ) //if HCMD_BUSY of cmd_code set, then do NOT wait for completion
3577 {
3578  int rc;
3579 
3580  HCFLOGENTRY( HCF_TRACE_CMD_EXE, cmd_code );
3581  HCFASSERT( (cmd_code & HCMD_CMD_CODE) != HCMD_TX || cmd_code & HCMD_BUSY, cmd_code ); //Tx must have Busy bit set
3582  OPW( HREG_SW_0, HCF_MAGIC );
3583  if ( IPW( HREG_SW_0 ) == HCF_MAGIC ) { /* 1 */
3584  rc = ifbp->IFB_DefunctStat;
3585  }
3586  else rc = HCF_ERR_NO_NIC;
3587  if ( rc == HCF_SUCCESS ) {
3588  //;?is this a hot idea, better MEASURE performance impact
3589  /*2*/ if ( ifbp->IFB_Cmd & HCMD_BUSY ) {
3590  rc = cmd_cmpl( ifbp );
3591  }
3592  OPW( HREG_PARAM_0, par_0 );
3593  OPW( HREG_CMD, cmd_code &~HCMD_BUSY );
3594  ifbp->IFB_Cmd = cmd_code;
3595  if ( (cmd_code & HCMD_BUSY) == 0 ) { //;?is this a hot idea, better MEASURE performance impact
3596  rc = cmd_cmpl( ifbp );
3597  }
3598  }
3599  HCFASSERT( rc == HCF_SUCCESS, MERGE_2( rc, cmd_code ) );
3601  return rc;
3602 } // cmd_exe
3603 
3604 
3605 /************************************************************************************************************
3606  *
3607  *.SUBMODULE int download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp )
3608  *.PURPOSE downloads F/W image into NIC and initiates execution of the downloaded F/W.
3609  *
3610  *.ARGUMENTS
3611  * ifbp address of the Interface Block
3612  * ltvp specifies the pseudo-RID (as defined by WCI)
3613  *
3614  *.RETURNS
3615  *
3616  *.DESCRIPTION
3617  *
3618  *
3619  *.DIAGRAM
3620  *1: First, Ack everything to unblock a (possibly) blocked cmd pipe line
3621  * Note 1: it is very likely that an Alloc event is pending and very well possible that a (Send) Cmd event is
3622  * pending
3623  * Note 2: it is assumed that this strategy takes away the need to ack every conceivable event after an
3624  * Hermes Initialize
3625  *
3626  *
3627  *.ENDDOC END DOCUMENTATION
3628  *
3629  ************************************************************************************************************/
3630 HCF_STATIC int
3631 download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp ) //Hermes-II download (volatile only)
3632 {
3633  hcf_16 i;
3634  int rc = HCF_SUCCESS;
3635  wci_bufp cp;
3637 
3638  HCFLOGENTRY( HCF_TRACE_DL, ltvp->typ );
3639 #if (HCF_TYPE) & HCF_TYPE_PRELOADED
3640  HCFASSERT( DO_ASSERT, ltvp->mode );
3641 #else
3642  //if initial "program" LTV
3643  if ( ifbp->IFB_DLMode == CFG_PROG_STOP && ltvp->mode == CFG_PROG_VOLATILE) {
3644  //. switch Hermes to initial mode
3645  /*1*/ OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
3646  rc = cmd_exe( ifbp, HCMD_INI, 0 ); /* HCMD_INI can not be part of init() because that is called on
3647  * other occasions as well */
3648  rc = init( ifbp );
3649  }
3650  //if final "program" LTV
3651  if ( ltvp->mode == CFG_PROG_STOP && ifbp->IFB_DLMode == CFG_PROG_VOLATILE) {
3652  //. start tertiary (or secondary)
3653  OPW( HREG_PARAM_1, (hcf_16)(ltvp->nic_addr >> 16) );
3654  rc = cmd_exe( ifbp, HCMD_EXECUTE, (hcf_16) ltvp->nic_addr );
3655  if (rc == HCF_SUCCESS) {
3656  rc = init( ifbp ); /*;? do we really want to skip init if cmd_exe failed, i.e.
3657  * IFB_FW_Comp_Id is than possibly incorrect */
3658  }
3659  //else (non-final)
3660  } else {
3661  //. if mode == Readback SEEPROM
3662 #if 0 //;? as long as the next if contains a hard coded 0, might as well leave it out even more obvious
3663  if ( 0 /*len is definitely not want we want;?*/ && ltvp->mode == CFG_PROG_SEEPROM_READBACK ) {
3664  OPW( HREG_PARAM_1, (hcf_16)(ltvp->nic_addr >> 16) );
3665  OPW( HREG_PARAM_2, (hcf_16)((ltvp->len - 4) << 1) );
3666  //. . perform Hermes prog cmd with appropriate mode bits
3667  rc = cmd_exe( ifbp, HCMD_PROGRAM | ltvp->mode, (hcf_16)ltvp->nic_addr );
3668  //. . set up NIC RAM addressability according Resp0-1
3671  //. . set up L-field of LTV according Resp2
3672  i = ( IPW( HREG_RESP_2 ) + 1 ) / 2; // i contains max buffer size in words, a probably not very useful piece of information ;?
3673 /*Nico's code based on i is the "real amount of data available"
3674  if ( ltvp->len - 4 < i ) rc = HCF_ERR_LEN;
3675  else ltvp->len = i + 4;
3676 */
3677 /* Rolands code based on the idea that a MSF should not ask for more than is available
3678  // check if number of bytes requested exceeds max buffer size
3679  if ( ltvp->len - 4 > i ) {
3680  rc = HCF_ERR_LEN;
3681  ltvp->len = i + 4;
3682  }
3683 */
3684  //. . copy data from NIC via AUX port to LTV
3685  cp = (wci_bufp)ltvp->host_addr; /*IN_PORT_STRING_8_16 macro may modify its parameters*/
3686  i = ltvp->len - 4;
3687  IN_PORT_STRING_8_16( io_port, cp, i );
3688  //. else (non-final programming)
3689  } else
3690 #endif //;? as long as the above if contains a hard coded 0, might as well leave it out even more obvious
3691  { //. . get number of words to program
3692  HCFASSERT( ltvp->segment_size, *ltvp->host_addr );
3693  i = ltvp->segment_size/2;
3694  //. . copy data (words) from LTV via AUX port to NIC
3695  cp = (wci_bufp)ltvp->host_addr; //OUT_PORT_STRING_8_16 macro may modify its parameters
3696  //. . if mode == volatile programming
3697  if ( ltvp->mode == CFG_PROG_VOLATILE ) {
3698  //. . . set up NIC RAM addressability via AUX port
3699  OPW( HREG_AUX_PAGE, (hcf_16)(ltvp->nic_addr >> 16 << 9 | (ltvp->nic_addr & 0xFFFF) >> 7 ) );
3700  OPW( HREG_AUX_OFFSET, (hcf_16)(ltvp->nic_addr & 0x007E) );
3701  OUT_PORT_STRING_8_16( io_port, cp, i );
3702  }
3703  }
3704  }
3705  ifbp->IFB_DLMode = ltvp->mode; //save state in IFB_DLMode
3706 #endif // HCF_TYPE_PRELOADED
3707  HCFASSERT( rc == HCF_SUCCESS, rc );
3709  return rc;
3710 } // download
3711 
3712 
3713 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
3714 /**************************************************
3715  * Certain Hermes-II firmware versions can generate
3716  * debug information. This debug information is
3717  * contained in a buffer in nic-RAM, and can be read
3718  * via the aux port.
3719  **************************************************/
3720 HCF_STATIC int
3721 fw_printf(IFBP ifbp, CFG_FW_PRINTF_STRCT FAR *ltvp)
3722 {
3723  int rc = HCF_SUCCESS;
3724  hcf_16 fw_cnt;
3725 // hcf_32 DbMsgBuffer = 0x29D2, DbMsgCount= 0x000029D0;
3726 // hcf_16 DbMsgSize=0x00000080;
3727  hcf_32 DbMsgBuffer;
3728  CFG_FW_PRINTF_BUFFER_LOCATION_STRCT *p = &ifbp->IFB_FwPfBuff;
3729  ltvp->len = 1;
3730  if ( p->DbMsgSize != 0 ) {
3731  // first, check the counter in nic-RAM and compare it to the latest counter value of the HCF
3732  OPW( HREG_AUX_PAGE, (hcf_16)(p->DbMsgCount >> 7) );
3733  OPW( HREG_AUX_OFFSET, (hcf_16)(p->DbMsgCount & 0x7E) );
3734  fw_cnt = ((IPW( HREG_AUX_DATA) >>1 ) & ((hcf_16)p->DbMsgSize - 1));
3735  if ( fw_cnt != ifbp->IFB_DbgPrintF_Cnt ) {
3736 // DbgPrint("fw_cnt=%d IFB_DbgPrintF_Cnt=%d\n", fw_cnt, ifbp->IFB_DbgPrintF_Cnt);
3737  DbMsgBuffer = p->DbMsgBuffer + ifbp->IFB_DbgPrintF_Cnt * 6; // each entry is 3 words
3738  OPW( HREG_AUX_PAGE, (hcf_16)(DbMsgBuffer >> 7) );
3739  OPW( HREG_AUX_OFFSET, (hcf_16)(DbMsgBuffer & 0x7E) );
3740  ltvp->msg_id = IPW(HREG_AUX_DATA);
3741  ltvp->msg_par = IPW(HREG_AUX_DATA);
3742  ltvp->msg_tstamp = IPW(HREG_AUX_DATA);
3743  ltvp->len = 4;
3744  ifbp->IFB_DbgPrintF_Cnt++;
3745  ifbp->IFB_DbgPrintF_Cnt &= (p->DbMsgSize - 1);
3746  }
3747  }
3748  return rc;
3749 };
3750 #endif // HCF_ASSERT_PRINTF
3751 
3752 
3753 /************************************************************************************************************
3754  *
3755  *.SUBMODULE hcf_16 get_fid( IFBP ifbp )
3756  *.PURPOSE get allocated FID for either transmit or notify.
3757  *
3758  *.ARGUMENTS
3759  * ifbp address of the Interface Block
3760  *
3761  *.RETURNS
3762  * 0 no FID available
3763  * <>0 FID number
3764  *
3765  *.DESCRIPTION
3766  *
3767  *
3768  *.DIAGRAM
3769  * The preference is to use a "pending" alloc. If no alloc is pending, then - if available - the "spare" FID
3770  * is used.
3771  * If the spare FID is used, IFB_RscInd (representing the spare FID) must be cleared
3772  * If the pending alloc is used, the alloc event must be acknowledged to the Hermes.
3773  * In case the spare FID was depleted and the IFB_RscInd has been "faked" as pseudo resource with a 0x0001
3774  * value by hcf_service_nic, IFB_RscInd has to be "corrected" again to its 0x0000 value.
3775  *
3776  * Note that due to the Hermes-II H/W problems which are intended to be worked around by DAWA, the Alloc bit
3777  * in the Event register is no longer a reliable indication of the presence/absence of a FID. The "Clear FID"
3778  * part of the DAWA logic, together with the choice of the definition of the return information from get_fid,
3779  * handle this automatically, i.e. without additional code in get_fid.
3780  *.ENDDOC END DOCUMENTATION
3781  *
3782  ************************************************************************************************************/
3784 get_fid( IFBP ifbp )
3785 {
3786 
3787  hcf_16 fid = 0;
3788 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
3789  PROT_CNT_INI;
3790 #endif // HCF_TYPE_HII5
3791 
3792  IF_DMA( HCFASSERT(!(ifbp->IFB_CntlOpt & USE_DMA), ifbp->IFB_CntlOpt) );
3793 
3794  if ( IPW( HREG_EV_STAT) & HREG_EV_ALLOC) {
3795  fid = IPW( HREG_ALLOC_FID );
3796  HCFASSERT( fid, ifbp->IFB_RscInd );
3798 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
3800  HCFASSERT( prot_cnt, IPW( HREG_EV_STAT ) );
3801 #endif // HCF_TYPE_HII5
3802  DAWA_ACK( HREG_EV_ALLOC );
3803 // 180 degree error in logic ;? #if ALLOC_15
3804  if ( ifbp->IFB_RscInd == 1 ) {
3805  ifbp->IFB_RscInd = 0;
3806  }
3807 //#endif // ALLOC_15
3808  } else {
3809 // 180 degree error in logic ;? #if ALLOC_15
3810  fid = ifbp->IFB_RscInd;
3811 //#endif // ALLOC_15
3812  ifbp->IFB_RscInd = 0;
3813  }
3814  return fid;
3815 } // get_fid
3816 
3817 
3818 /************************************************************************************************************
3819  *
3820  *.SUBMODULE void get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
3821  *.PURPOSE reads with 16/32 bit I/O via BAP1 port from NIC RAM to Host memory.
3822  *
3823  *.ARGUMENTS
3824  * ifbp address of the Interface Block
3825  * bufp (byte) address of buffer
3826  * len length in bytes of buffer specified by bufp
3827  * word_len Big Endian only: number of leading bytes to swap in pairs
3828  *
3829  *.RETURNS N.A.
3830  *
3831  *.DESCRIPTION
3832  * process the single byte (if applicable) read by the previous get_frag and copy len (or len-1) bytes from
3833  * NIC to bufp.
3834  * On a Big Endian platform, the parameter word_len controls the number of leading bytes whose endianness is
3835  * converted (i.e. byte swapped)
3836  *
3837  *
3838  *.DIAGRAM
3839  *10: The PCMCIA card can be removed in the middle of the transfer. By depositing a "magic number" in the
3840  * HREG_SW_0 register of the Hermes at initialization time and by verifying this register, it can be
3841  * determined whether the card is still present. The return status is set accordingly.
3842  * Clearing the buffer is a (relative) cheap way to prevent that failing I/O results in run-away behavior
3843  * because the garbage in the buffer is interpreted by the caller irrespective of the return status (e.g.
3844  * hcf_service_nic has this behavior).
3845  *
3846  *.NOTICE
3847  * It turns out DOS ODI uses zero length fragments. The HCF code can cope with it, but as a consequence, no
3848  * Assert on len is possible
3849  *
3850  *.ENDDOC END DOCUMENTATION
3851  *
3852  ************************************************************************************************************/
3853 HCF_STATIC void
3854 get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
3855 {
3856  hcf_io io_port = ifbp->IFB_IOBase + HREG_DATA_1; //BAP data register
3857  wci_bufp p = bufp; //working pointer
3858  int i; //prevent side effects from macro
3859  int j;
3860 
3861  HCFASSERT( ((hcf_32)bufp & (HCF_ALIGN-1) ) == 0, (hcf_32)bufp );
3862 
3863 /*1: here recovery logic for intervening BAP access between hcf_service_nic and hcf_rcv_msg COULD be added
3864  * if current access is RxInitial
3865  * . persistent_offset += len
3866  */
3867 
3868  i = len;
3869  //if buffer length > 0 and carry from previous get_frag
3870  if ( i && ifbp->IFB_CarryIn ) {
3871  //. move carry to buffer
3872  //. adjust buffer length and pointer accordingly
3873  *p++ = (hcf_8)(ifbp->IFB_CarryIn>>8);
3874  i--;
3875  //. clear carry flag
3876  ifbp->IFB_CarryIn = 0;
3877  }
3878 #if (HCF_IO) & HCF_IO_32BITS
3879  //skip zero-length I/O, single byte I/O and I/O not worthwhile (i.e. less than 6 bytes)for DW logic
3880  //if buffer length >= 6 and 32 bits I/O support
3881  if ( !(ifbp->IFB_CntlOpt & USE_16BIT) && i >= 6 ) {
3882  hcf_32 FAR *p4; //prevent side effects from macro
3883  if ( ( (hcf_32)p & 0x1 ) == 0 ) { //. if buffer at least word aligned
3884  if ( (hcf_32)p & 0x2 ) { //. . if buffer not double word aligned
3885  //. . . read single word to get double word aligned
3886  *(wci_recordp)p = IN_PORT_WORD( io_port );
3887  //. . . adjust buffer length and pointer accordingly
3888  p += 2;
3889  i -= 2;
3890  }
3891  //. . read as many double word as possible
3892  p4 = (hcf_32 FAR *)p;
3893  j = i/4;
3894  IN_PORT_STRING_32( io_port, p4, j );
3895  //. . adjust buffer length and pointer accordingly
3896  p += i & ~0x0003;
3897  i &= 0x0003;
3898  }
3899  }
3900 #endif // HCF_IO_32BITS
3901  //if no 32-bit support OR byte aligned OR 1-3 bytes left
3902  if ( i ) {
3903  //. read as many word as possible in "alignment safe" way
3904  j = i/2;
3905  IN_PORT_STRING_8_16( io_port, p, j );
3906  //. if 1 byte left
3907  if ( i & 0x0001 ) {
3908  //. . read 1 word
3909  ifbp->IFB_CarryIn = IN_PORT_WORD( io_port );
3910  //. . store LSB in last char of buffer
3911  bufp[len-1] = (hcf_8)ifbp->IFB_CarryIn;
3912  //. . save MSB in carry, set carry flag
3913  ifbp->IFB_CarryIn |= 0x1;
3914  }
3915  }
3916 #if HCF_BIG_ENDIAN
3917  HCFASSERT( word_len == 0 || word_len == 2 || word_len == 4, word_len );
3918  HCFASSERT( word_len == 0 || ((hcf_32)bufp & 1 ) == 0, (hcf_32)bufp );
3919  HCFASSERT( word_len <= len, MERGE2( word_len, len ) );
3920  //see put_frag for an alternative implementation, but be careful about what are int's and what are
3921  //hcf_16's
3922  if ( word_len ) { //. if there is anything to convert
3923  hcf_8 c;
3924  c = bufp[1]; //. . convert the 1st hcf_16
3925  bufp[1] = bufp[0];
3926  bufp[0] = c;
3927  if ( word_len > 1 ) { //. . if there is to convert more than 1 word ( i.e 2 )
3928  c = bufp[3]; //. . . convert the 2nd hcf_16
3929  bufp[3] = bufp[2];
3930  bufp[2] = c;
3931  }
3932  }
3933 #endif // HCF_BIG_ENDIAN
3934 } // get_frag
3935 
3936 /************************************************************************************************************
3937  *
3938  *.SUBMODULE int init( IFBP ifbp )
3939  *.PURPOSE Handles common initialization aspects (H-I init, calibration, config.mngmt, allocation).
3940  *
3941  *.ARGUMENTS
3942  * ifbp address of the Interface Block
3943  *
3944  *.RETURNS
3945  * HCF_ERR_INCOMP_PRI
3946  * HCF_ERR_INCOMP_FW
3947  * HCF_ERR_TIME_OUT
3948  * >>hcf_get_info
3949  * HCF_ERR_NO_NIC
3950  * HCF_ERR_LEN
3951  *
3952  *.DESCRIPTION
3953  * init will successively:
3954  * - in case of a (non-preloaded) H-I, initialize the NIC
3955  * - calibrate the S/W protection timer against the Hermes Timer
3956  * - collect HSI, "active" F/W Configuration Management Information
3957  * - in case active F/W is Primary F/W: collect Primary F/W Configuration Management Information
3958  * - check HSI and Primary F/W compatibility with the HCF
3959  * - in case active F/W is Station or AP F/W: check Station or AP F/W compatibility with the HCF
3960  * - in case active F/W is not Primary F/W: allocate FIDs to be used in transmit/notify process
3961  *
3962  *
3963  *.DIAGRAM
3964  *2: drop all error status bits in IFB_CardStat since they are expected to be re-evaluated.
3965  *4: Ack everything except HREG_EV_SLEEP_REQ. It is very likely that an Alloc event is pending and
3966  * very well possible that a Send Cmd event is pending. Acking HREG_EV_SLEEP_REQ is handled by hcf_action(
3967  * HCF_ACT_INT_ON ) !!!
3968  *10: Calibrate the S/W time-out protection mechanism by calling calibrate(). Note that possible errors
3969  * in the calibration process are nor reported by init but will show up via the defunct mechanism in
3970  * subsequent hcf-calls.
3971  *14: usb_check_comp() is called to have the minimal visual clutter for the legacy H-I USB dongle
3972  * compatibility check.
3973  *16: The following configuration management related information is retrieved from the NIC:
3974  * - HSI supplier
3975  * - F/W Identity
3976  * - F/W supplier
3977  * if appropriate:
3978  * - PRI Identity
3979  * - PRI supplier
3980  * appropriate means on H-I: always
3981  * and on H-II if F/W supplier reflects a primary (i.e. only after an Hermes Reset or Init
3982  * command).
3983  * QUESTION ;? !!!!!! should, For each of the above RIDs the Endianness is converted to native Endianness.
3984  * Only the return code of the first hcf_get_info is used. All hcf_get_info calls are made, regardless of
3985  * the success or failure of the 1st hcf_get_info. The assumptions are:
3986  * - if any call fails, they all fail, so remembering the result of the 1st call is adequate
3987  * - a failing call will overwrite the L-field with a 0x0000 value, which services both as an
3988  * error indication for the values cached in the IFB as making mmd_check_comp fail.
3989  * In case of H-I, when getting the F/W identity fails, the F/W is assumed to be H-I AP F/W pre-dating
3990  * version 9.0 and the F/W Identity and Supplier are faked accordingly.
3991  * In case of H-II, the Primary, Station and AP Identity are merged into a single F/W Identity.
3992  * The same applies to the Supplier information. As a consequence the PRI information can no longer be
3993  * retrieved when a Tertiary runs. To accommodate MSFs and Utilities who depend on PRI information being
3994  * available at any time, this information is cached in the IFB. In this cache the generic "F/W" value of
3995  * the typ-fields is overwritten with the specific (legacy) "PRI" values. To actually re-route the (legacy)
3996  * PRI request via hcf_get_info, the xxxx-table must be set. In case of H-I, this caching, modifying and
3997  * re-routing is not needed because PRI information is always available directly from the NIC. For
3998  * consistency the caching fields in the IFB are filled with the PRI information anyway.
3999  *18: mdd_check_comp() is called to check the Supplier Variant and Range of the Host-S/W I/F (HSI) and the
4000  * Primary Firmware Variant and Range against the Top and Bottom level supported by this HCF. If either of
4001  * these tests fails, the CARD_STAT_INCOMP_PRI bit of IFB_CardStat is set
4002  * Note: There should always be a primary except during production, so this makes the HCF in its current form
4003  * unsuitable for manufacturing test systems like the FTS. This can be remedied by an adding a test like
4004  * ifbp->IFB_PRISup.id == COMP_ID_PRI
4005  *20: In case there is Tertiary F/W and this F/W is Station F/W, the Supplier Variant and Range of the Station
4006  * Firmware function as retrieved from the Hermes is checked against the Top and Bottom level supported by
4007  * this HCF.
4008  * Note: ;? the tertiary F/W compatibility checks could be moved to the DHF, which already has checked the
4009  * CFI and MFI compatibility of the image with the NIC before the image was downloaded.
4010  *28: In case of non-Primary F/W: allocates and acknowledge a (TX or Notify) FID and allocates without
4011  * acknowledge another (TX or Notify) FID (the so-called 1.5 alloc scheme) with the following steps:
4012  * - execute the allocate command by calling cmd_exe
4013  * - wait till either the alloc event or a time-out occurs
4014  * - regardless whether the alloc event occurs, call get_fid to
4015  * - read the FID and save it in IFB_RscInd to be used as "spare FID"
4016  * - acknowledge the alloc event
4017  * - do another "half" allocate to complete the "1.5 Alloc scheme"
4018  * Note that above 3 steps do not harm and thus give the "cheapest" acceptable strategy.
4019  * If a time-out occurred, then report time out status (after all)
4020  *
4021  *.ENDDOC END DOCUMENTATION
4022  *
4023  ************************************************************************************************************/
4024 HCF_STATIC int
4025 init( IFBP ifbp )
4026 {
4027 
4028  int rc = HCF_SUCCESS;
4029 
4031 
4032  ifbp->IFB_CardStat = 0; /* 2*/
4033  OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ ); /* 4*/
4034  IF_PROT_TIME( calibrate( ifbp ) ); /*10*/
4035 #if 0 // OOR
4036  ifbp->IFB_FWIdentity.len = 2; //misuse the IFB space for a put
4037  ifbp->IFB_FWIdentity.typ = CFG_TICK_TIME;
4038  ifbp->IFB_FWIdentity.comp_id = (1000*1000)/1024 + 1; //roughly 1 second
4039  hcf_put_info( ifbp, (LTVP)&ifbp->IFB_FWIdentity.len );
4040 #endif // OOR
4041  ifbp->IFB_FWIdentity.len = sizeof(CFG_FW_IDENTITY_STRCT)/sizeof(hcf_16) - 1;
4042  ifbp->IFB_FWIdentity.typ = CFG_FW_IDENTITY;
4043  rc = hcf_get_info( ifbp, (LTVP)&ifbp->IFB_FWIdentity.len );
4044 /* ;? conversion should not be needed for mmd_check_comp */
4045 #if HCF_BIG_ENDIAN
4046  ifbp->IFB_FWIdentity.comp_id = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.comp_id );
4047  ifbp->IFB_FWIdentity.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.variant );
4048  ifbp->IFB_FWIdentity.version_major = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.version_major );
4049  ifbp->IFB_FWIdentity.version_minor = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.version_minor );
4050 #endif // HCF_BIG_ENDIAN
4051 #if defined MSF_COMPONENT_ID /*14*/
4052  if ( rc == HCF_SUCCESS ) { /*16*/
4053  ifbp->IFB_HSISup.len = sizeof(CFG_SUP_RANGE_STRCT)/sizeof(hcf_16) - 1;
4054  ifbp->IFB_HSISup.typ = CFG_NIC_HSI_SUP_RANGE;
4055  rc = hcf_get_info( ifbp, (LTVP)&ifbp->IFB_HSISup.len );
4056 /* ;? conversion should not be needed for mmd_check_comp , BUT according to a report of a BE-user it is
4057  * should be resolved in the WARP release
4058  * since some compilers make ugly but unnecessary code of these instructions even for LE,
4059  * it is conditionally compiled */
4060 #if HCF_BIG_ENDIAN
4061  ifbp->IFB_HSISup.role = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.role );
4062  ifbp->IFB_HSISup.id = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.id );
4063  ifbp->IFB_HSISup.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.variant );
4064  ifbp->IFB_HSISup.bottom = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.bottom );
4065  ifbp->IFB_HSISup.top = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.top );
4066 #endif // HCF_BIG_ENDIAN
4067  ifbp->IFB_FWSup.len = sizeof(CFG_SUP_RANGE_STRCT)/sizeof(hcf_16) - 1;
4068  ifbp->IFB_FWSup.typ = CFG_FW_SUP_RANGE;
4069  (void)hcf_get_info( ifbp, (LTVP)&ifbp->IFB_FWSup.len );
4070 /* ;? conversion should not be needed for mmd_check_comp */
4071 #if HCF_BIG_ENDIAN
4072  ifbp->IFB_FWSup.role = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.role );
4073  ifbp->IFB_FWSup.id = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.id );
4074  ifbp->IFB_FWSup.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.variant );
4075  ifbp->IFB_FWSup.bottom = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.bottom );
4076  ifbp->IFB_FWSup.top = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.top );
4077 #endif // HCF_BIG_ENDIAN
4078 
4079  if ( ifbp->IFB_FWSup.id == COMP_ID_PRI ) { /* 20*/
4080  int i = sizeof( CFG_FW_IDENTITY_STRCT) + sizeof(CFG_SUP_RANGE_STRCT );
4081  while ( i-- ) ((hcf_8*)(&ifbp->IFB_PRIIdentity))[i] = ((hcf_8*)(&ifbp->IFB_FWIdentity))[i];
4082  ifbp->IFB_PRIIdentity.typ = CFG_PRI_IDENTITY;
4083  ifbp->IFB_PRISup.typ = CFG_PRI_SUP_RANGE;
4084  xxxx[xxxx_PRI_IDENTITY_OFFSET] = &ifbp->IFB_PRIIdentity.len;
4085  xxxx[xxxx_PRI_IDENTITY_OFFSET+1] = &ifbp->IFB_PRISup.len;
4086  }
4087  if ( !mmd_check_comp( (void*)&cfg_drv_act_ranges_hsi, &ifbp->IFB_HSISup) /* 22*/
4088 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0
4089 //;? the PRI compatibility check is only relevant for DHF
4090  || !mmd_check_comp( (void*)&cfg_drv_act_ranges_pri, &ifbp->IFB_PRISup)
4091 #endif // HCF_TYPE_PRELOADED
4092  ) {
4094  rc = HCF_ERR_INCOMP_PRI;
4095  }
4096  if ( ( ifbp->IFB_FWSup.id == COMP_ID_STA && !mmd_check_comp( (void*)&cfg_drv_act_ranges_sta, &ifbp->IFB_FWSup) ) ||
4097  ( ifbp->IFB_FWSup.id == COMP_ID_APF && !mmd_check_comp( (void*)&cfg_drv_act_ranges_apf, &ifbp->IFB_FWSup) )
4098  ) { /* 24 */
4100  rc = HCF_ERR_INCOMP_FW;
4101  }
4102  }
4103 #endif // MSF_COMPONENT_ID
4104 
4105  if ( rc == HCF_SUCCESS && ifbp->IFB_FWIdentity.comp_id >= COMP_ID_FW_STA ) {
4106  PROT_CNT_INI;
4107  /**************************************************************************************
4108  * rlav: the DMA engine needs the host to cause a 'hanging alloc event' for it to consume.
4109  * not sure if this is the right spot in the HCF, thinking about hcf_enable...
4110  **************************************************************************************/
4111  rc = cmd_exe( ifbp, HCMD_ALLOC, 0 );
4112 // 180 degree error in logic ;? #if ALLOC_15
4113 // ifbp->IFB_RscInd = 1; //let's hope that by the time hcf_send_msg isa called, there will be a FID
4114 //#else
4115  if ( rc == HCF_SUCCESS ) {
4117  IF_PROT_TIME( HCFASSERT(prot_cnt, IPW( HREG_EV_STAT )) );
4118 #if HCF_DMA
4119  if ( ! ( ifbp->IFB_CntlOpt & USE_DMA ) )
4120 #endif // HCF_DMA
4121  {
4122  ifbp->IFB_RscInd = get_fid( ifbp );
4123  HCFASSERT( ifbp->IFB_RscInd, 0 );
4124  cmd_exe( ifbp, HCMD_ALLOC, 0 );
4125  IF_PROT_TIME( if ( prot_cnt == 0 ) rc = HCF_ERR_TIME_OUT );
4126  }
4127  }
4128 //#endif // ALLOC_15
4129  }
4130 
4131  HCFASSERT( rc == HCF_SUCCESS, rc );
4133  return rc;
4134 } // init
4135 
4136 /************************************************************************************************************
4137  *
4138  *.SUBMODULE void isr_info( IFBP ifbp )
4139  *.PURPOSE handles link events.
4140  *
4141  *.ARGUMENTS
4142  * ifbp address of the Interface Block
4143  *
4144  *.RETURNS N.A.
4145  *
4146  *.DESCRIPTION
4147  *
4148  *
4149  *.DIAGRAM
4150  *1: First the FID number corresponding with the InfoEvent is determined.
4151  * Note the complication of the zero-FID protection sub-scheme in DAWA.
4152  * Next the L-field and the T-field are fetched into scratch buffer info.
4153  *2: In case of tallies, the 16 bits Hermes values are accumulated in the IFB into 32 bits values. Info[0]
4154  * is (expected to be) HCF_NIC_TAL_CNT + 1. The contraption "while ( info[0]-- >1 )" rather than
4155  * "while ( --info[0] )" is used because it is dangerous to determine the length of the Value field by
4156  * decrementing info[0]. As a result of a bug in some version of the F/W, info[0] may be 0, resulting
4157  * in a very long loop in the pre-decrement logic.
4158  *4: In case of a link status frame, the information is copied to the IFB field IFB_linkStat
4159  *6: All other than Tallies (including "unknown" ones) are checked against the selection set by the MSF
4160  * via CFG_RID_LOG. If a match is found or the selection set has the wild-card type (i.e non-NULL buffer
4161  * pointer at the terminating zero-type), the frame is copied to the (type-specific) log buffer.
4162  * Note that to accumulate tallies into IFB AND to log them or to log a frame when a specific match occures
4163  * AND based on the wild-card selection, you have to call setup_bap again after the 1st copy.
4164  *
4165  *.ENDDOC END DOCUMENTATION
4166  *
4167  ************************************************************************************************************/
4168 HCF_STATIC void
4170 {
4171  hcf_16 info[2], fid;
4172 #if (HCF_EXT) & HCF_EXT_INFO_LOG
4173  RID_LOGP ridp = ifbp->IFB_RIDLogp; //NULL or pointer to array of RID_LOG structures (terminated by zero typ)
4174 #endif // HCF_EXT_INFO_LOG
4175 
4176  HCFTRACE( ifbp, HCF_TRACE_ISR_INFO ); /* 1 */
4177  fid = IPW( HREG_INFO_FID );
4179  if ( fid ) {
4180  (void)setup_bap( ifbp, fid, 0, IO_IN );
4181  get_frag( ifbp, (wci_bufp)info, 4 BE_PAR(2) );
4182  HCFASSERT( info[0] <= HCF_MAX_LTV + 1, MERGE_2( info[1], info[0] ) ); //;? a smaller value makes more sense
4183 #if (HCF_TALLIES) & HCF_TALLIES_NIC //Hermes tally support
4184  if ( info[1] == CFG_TALLIES ) {
4185  hcf_32 *p;
4186  /*2*/ if ( info[0] > HCF_NIC_TAL_CNT ) {
4187  info[0] = HCF_NIC_TAL_CNT + 1;
4188  }
4189  p = (hcf_32*)&ifbp->IFB_NIC_Tallies;
4190  while ( info[0]-- >1 ) *p++ += IPW( HREG_DATA_1 ); //request may return zero length
4191  }
4192  else
4193 #endif // HCF_TALLIES_NIC
4194  {
4195  /*4*/ if ( info[1] == CFG_LINK_STAT ) {
4196  ifbp->IFB_LinkStat = IPW( HREG_DATA_1 );
4197  }
4198 #if (HCF_EXT) & HCF_EXT_INFO_LOG
4199  /*6*/ while ( 1 ) {
4200  if ( ridp->typ == 0 || ridp->typ == info[1] ) {
4201  if ( ridp->bufp ) {
4202  HCFASSERT( ridp->len >= 2, ridp->typ );
4203  ridp->bufp[0] = min((hcf_16)(ridp->len - 1), info[0] ); //save L
4204  ridp->bufp[1] = info[1]; //save T
4205  get_frag( ifbp, (wci_bufp)&ridp->bufp[2], (ridp->bufp[0] - 1)*2 BE_PAR(0) );
4206  }
4207  break;
4208  }
4209  ridp++;
4210  }
4211 #endif // HCF_EXT_INFO_LOG
4212  }
4214  }
4215  return;
4216 } // isr_info
4217 
4218 //
4219 //
4220 // #endif // HCF_TALLIES_NIC
4221 // /*4*/ if ( info[1] == CFG_LINK_STAT ) {
4222 // ifbp->IFB_DSLinkStat = IPW( HREG_DATA_1 ) | CFG_LINK_STAT_CHANGE; //corrupts BAP !! ;?
4223 // ifbp->IFB_LinkStat = ifbp->IFB_DSLinkStat & CFG_LINK_STAT_FW; //;? to be obsoleted
4224 // printk(KERN_ERR "linkstatus: %04x\n", ifbp->IFB_DSLinkStat ); //;?remove me 1 day
4225 // #if (HCF_SLEEP) & HCF_DDS
4226 // if ( ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_CONNECTED ) == 0 ) { //even values are disconnected etc.
4227 // ifbp->IFB_TickCnt = 0; //start 2 second period (with 1 tick uncertanty)
4228 // printk(KERN_NOTICE "isr_info: AwaitConnection phase started, IFB_TickCnt = 0\n" ); //;?remove me 1 day
4229 // }
4230 // #endif // HCF_DDS
4231 // }
4232 // #if (HCF_EXT) & HCF_EXT_INFO_LOG
4233 // /*6*/ while ( 1 ) {
4234 // if ( ridp->typ == 0 || ridp->typ == info[1] ) {
4235 // if ( ridp->bufp ) {
4236 // HCFASSERT( ridp->len >= 2, ridp->typ );
4237 // (void)setup_bap( ifbp, fid, 2, IO_IN ); //restore BAP for tallies, linkstat and specific type followed by wild card
4238 // ridp->bufp[0] = min( ridp->len - 1, info[0] ); //save L
4239 // get_frag( ifbp, (wci_bufp)&ridp->bufp[1], ridp->bufp[0]*2 BE_PAR(0) );
4240 // }
4241 // break; //;?this break is no longer needed due to setup_bap but lets concentrate on DDS first
4242 // }
4243 // ridp++;
4244 // }
4245 // #endif // HCF_EXT_INFO_LOG
4246 // }
4247 // HCFTRACE( ifbp, HCF_TRACE_ISR_INFO | HCF_TRACE_EXIT );
4248 //
4249 //
4250 //
4251 //
4252 // return;
4253 //} // isr_info
4254 
4255 
4256 /************************************************************************************************************
4257  *
4258  *.SUBMODULE void mdd_assert( IFBP ifbp, unsigned int line_number, hcf_32 q )
4259  *.PURPOSE filters assert on level and interfaces to the MSF supplied msf_assert routine.
4260  *
4261  *.ARGUMENTS
4262  * ifbp address of the Interface Block
4263  * line_number line number of the line which caused the assert
4264  * q qualifier, additional information which may give a clue about the problem
4265  *
4266  *.RETURNS N.A.
4267  *
4268  *.DESCRIPTION
4269  *
4270  *
4271  *.DIAGRAM
4272  *
4273  *.NOTICE
4274  * mdd_assert has been through a turmoil, renaming hcf_assert to assert and hcf_assert again and supporting off
4275  * and on being called from the MSF level and other ( immature ) ModularDriverDevelopment modules like DHF and
4276  * MMD.
4277  * !!!! The assert routine is not an hcf_..... routine in the sense that it may be called by the MSF,
4278  * however it is called from mmd.c and dhf.c, so it must be external.
4279  * To prevent namespace pollution it needs a prefix, to prevent that MSF programmers think that
4280  * they are allowed to call the assert logic, the prefix HCF can't be used, so MDD is selected!!!!
4281  *
4282  * When called from the DHF module the line number is incremented by DHF_FILE_NAME_OFFSET and when called from
4283  * the MMD module by MMD_FILE_NAME_OFFSET.
4284  *
4285  *.ENDDOC END DOCUMENTATION
4286  *
4287  ************************************************************************************************************/
4288 #if HCF_ASSERT
4289 void
4290 mdd_assert( IFBP ifbp, unsigned int line_number, hcf_32 q )
4291 {
4292  hcf_16 run_time_flag = ifbp->IFB_AssertLvl;
4293 
4294  if ( run_time_flag /* > ;?????? */ ) { //prevent recursive behavior, later to be extended to level filtering
4295  ifbp->IFB_AssertQualifier = q;
4296  ifbp->IFB_AssertLine = (hcf_16)line_number;
4297 #if (HCF_ASSERT) & ( HCF_ASSERT_LNK_MSF_RTN | HCF_ASSERT_RT_MSF_RTN )
4298  if ( ifbp->IFB_AssertRtn ) {
4299  ifbp->IFB_AssertRtn( line_number, ifbp->IFB_AssertTrace, q );
4300  }
4301 #endif // HCF_ASSERT_LNK_MSF_RTN / HCF_ASSERT_RT_MSF_RTN
4302 #if (HCF_ASSERT) & HCF_ASSERT_SW_SUP
4303  OPW( HREG_SW_2, line_number );
4304  OPW( HREG_SW_2, ifbp->IFB_AssertTrace );
4305  OPW( HREG_SW_2, (hcf_16)q );
4306  OPW( HREG_SW_2, (hcf_16)(q >> 16 ) );
4307 #endif // HCF_ASSERT_SW_SUP
4308 
4309 #if (HCF_ASSERT) & HCF_ASSERT_MB
4310  ifbp->IFB_AssertLvl = 0; // prevent recursive behavior
4311  hcf_put_info( ifbp, (LTVP)&ifbp->IFB_AssertStrct );
4312  ifbp->IFB_AssertLvl = run_time_flag; // restore appropriate filter level
4313 #endif // HCF_ASSERT_MB
4314  }
4315 } // mdd_assert
4316 #endif // HCF_ASSERT
4317 
4318 
4319 /************************************************************************************************************
4320  *
4321  *.SUBMODULE void put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
4322  *.PURPOSE writes with 16/32 bit I/O via BAP1 port from Host memory to NIC RAM.
4323  *
4324  *.ARGUMENTS
4325  * ifbp address of the Interface Block
4326  * bufp (byte) address of buffer
4327  * len length in bytes of buffer specified by bufp
4328  * word_len Big Endian only: number of leading bytes to swap in pairs
4329  *
4330  *.RETURNS N.A.
4331  *
4332  *.DESCRIPTION
4333  * process the single byte (if applicable) not yet written by the previous put_frag and copy len
4334  * (or len-1) bytes from bufp to NIC.
4335  *
4336  *
4337  *.DIAGRAM
4338  *
4339  *.NOTICE
4340  * It turns out DOS ODI uses zero length fragments. The HCF code can cope with it, but as a consequence, no
4341  * Assert on len is possible
4342  *
4343  *.ENDDOC END DOCUMENTATION
4344  *
4345  ************************************************************************************************************/
4346 HCF_STATIC void
4347 put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
4348 {
4349  hcf_io io_port = ifbp->IFB_IOBase + HREG_DATA_1; //BAP data register
4350  int i; //prevent side effects from macro
4351  hcf_16 j;
4352  HCFASSERT( ((hcf_32)bufp & (HCF_ALIGN-1) ) == 0, (hcf_32)bufp );
4353 #if HCF_BIG_ENDIAN
4354  HCFASSERT( word_len == 0 || word_len == 2 || word_len == 4, word_len );
4355  HCFASSERT( word_len == 0 || ((hcf_32)bufp & 1 ) == 0, (hcf_32)bufp );
4356  HCFASSERT( word_len <= len, MERGE_2( word_len, len ) );
4357 
4358  if ( word_len ) { //if there is anything to convert
4359  //. convert and write the 1st hcf_16
4360  j = bufp[1] | bufp[0]<<8;
4361  OUT_PORT_WORD( io_port, j );
4362  //. update pointer and counter accordingly
4363  len -= 2;
4364  bufp += 2;
4365  if ( word_len > 1 ) { //. if there is to convert more than 1 word ( i.e 2 )
4366  //. . convert and write the 2nd hcf_16
4367  j = bufp[1] | bufp[0]<<8; /*bufp is already incremented by 2*/
4368  OUT_PORT_WORD( io_port, j );
4369  //. . update pointer and counter accordingly
4370  len -= 2;
4371  bufp += 2;
4372  }
4373  }
4374 #endif // HCF_BIG_ENDIAN
4375  i = len;
4376  if ( i && ifbp->IFB_CarryOut ) { //skip zero-length
4377  j = ((*bufp)<<8) + ( ifbp->IFB_CarryOut & 0xFF );
4378  OUT_PORT_WORD( io_port, j );
4379  bufp++; i--;
4380  ifbp->IFB_CarryOut = 0;
4381  }
4382 #if (HCF_IO) & HCF_IO_32BITS
4383  //skip zero-length I/O, single byte I/O and I/O not worthwhile (i.e. less than 6 bytes)for DW logic
4384  //if buffer length >= 6 and 32 bits I/O support
4385  if ( !(ifbp->IFB_CntlOpt & USE_16BIT) && i >= 6 ) {
4386  hcf_32 FAR *p4; //prevent side effects from macro
4387  if ( ( (hcf_32)bufp & 0x1 ) == 0 ) { //. if buffer at least word aligned
4388  if ( (hcf_32)bufp & 0x2 ) { //. . if buffer not double word aligned
4389  //. . . write a single word to get double word aligned
4390  j = *(wci_recordp)bufp; //just to help ease writing macros with embedded assembly
4391  OUT_PORT_WORD( io_port, j );
4392  //. . . adjust buffer length and pointer accordingly
4393  bufp += 2; i -= 2;
4394  }
4395  //. . write as many double word as possible
4396  p4 = (hcf_32 FAR *)bufp;
4397  j = (hcf_16)i/4;
4398  OUT_PORT_STRING_32( io_port, p4, j );
4399  //. . adjust buffer length and pointer accordingly
4400  bufp += i & ~0x0003;
4401  i &= 0x0003;
4402  }
4403  }
4404 #endif // HCF_IO_32BITS
4405  //if no 32-bit support OR byte aligned OR 1 word left
4406  if ( i ) {
4407  //. if odd number of bytes left
4408  if ( i & 0x0001 ) {
4409  //. . save left over byte (before bufp is corrupted) in carry, set carry flag
4410  ifbp->IFB_CarryOut = (hcf_16)bufp[i-1] | 0x0100; //note that i and bufp are always simultaneously modified, &bufp[i-1] is invariant
4411  }
4412  //. write as many word as possible in "alignment safe" way
4413  j = (hcf_16)i/2;
4414  OUT_PORT_STRING_8_16( io_port, bufp, j );
4415  }
4416 } // put_frag
4417 
4418 
4419 /************************************************************************************************************
4420  *
4421  *.SUBMODULE void put_frag_finalize( IFBP ifbp )
4422  *.PURPOSE cleanup after put_frag for trailing odd byte and MIC transfer to NIC.
4423  *
4424  *.ARGUMENTS
4425  * ifbp address of the Interface Block
4426  *
4427  *.RETURNS N.A.
4428  *
4429  *.DESCRIPTION
4430  * finalize the MIC calculation with the padding pattern, output the last byte (if applicable)
4431  * of the message and the MIC to the TxFS
4432  *
4433  *
4434  *.DIAGRAM
4435  *2: 1 byte of the last put_frag may be still in IFB_CarryOut ( the put_frag carry holder ), so ........
4436  * 1 - 3 bytes of the last put_frag may be still in IFB_tx_32 ( the MIC engine carry holder ), so ........
4437  * The call to the MIC calculation routine feeds these remaining bytes (if any) of put_frag and the
4438  * just as many bytes of the padding as needed to the MIC calculation engine. Note that the "unneeded" pad
4439  * bytes simply end up in the MIC engine carry holder and are never used.
4440  *8: write the remainder of the MIC and possible some garbage to NIC RAM
4441  * Note: i is always 4 (a loop-invariant of the while in point 2)
4442  *
4443  *.NOTICE
4444  *
4445  *.ENDDOC END DOCUMENTATION
4446  *
4447  ************************************************************************************************************/
4448 HCF_STATIC void
4450 {
4451 #if (HCF_TYPE) & HCF_TYPE_WPA
4452  if ( ifbp->IFB_MICTxCarry != 0xFFFF) { //if MIC calculation active
4453  CALC_TX_MIC( mic_pad, 8); //. feed (up to 8 bytes of) virtual padding to MIC engine
4454  //. write (possibly) trailing byte + (most of) MIC
4455  put_frag( ifbp, (wci_bufp)ifbp->IFB_MICTx, 8 BE_PAR(0) );
4456  }
4457 #endif // HCF_TYPE_WPA
4458  put_frag( ifbp, null_addr, 1 BE_PAR(0) ); //write (possibly) trailing data or MIC byte
4459 } // put_frag_finalize
4460 
4461 
4462 /************************************************************************************************************
4463  *
4464  *.SUBMODULE int put_info( IFBP ifbp, LTVP ltvp )
4465  *.PURPOSE support routine to handle the "basic" task of hcf_put_info to pass RIDs to the NIC.
4466  *
4467  *.ARGUMENTS
4468  * ifbp address of the Interface Block
4469  * ltvp address in NIC RAM where LVT-records are located
4470  *
4471  *.RETURNS
4472  * HCF_SUCCESS
4473  * >>put_frag
4474  * >>cmd_wait
4475  *
4476  *.DESCRIPTION
4477  *
4478  *
4479  *.DIAGRAM
4480  *20: do not write RIDs to NICs which have incompatible Firmware
4481  *24: If the RID does not exist, the L-field is set to zero.
4482  * Note that some RIDs can not be read, e.g. the pseudo RIDs for direct Hermes commands and CFG_DEFAULT_KEYS
4483  *28: If the RID is written successful, pass it to the NIC by means of an Access Write command
4484  *
4485  *.NOTICE
4486  * The mechanism to HCF_ASSERT on invalid typ-codes in the LTV record is based on the following strategy:
4487  * - some codes (e.g. CFG_REG_MB) are explicitly handled by the HCF which implies that these codes
4488  * are valid. These codes are already consumed by hcf_put_info.
4489  * - all other codes are passed to the Hermes. Before the put action is executed, hcf_get_info is called
4490  * with an LTV record with a value of 1 in the L-field and the intended put action type in the Typ-code
4491  * field. If the put action type is valid, it is also valid as a get action type code - except
4492  * for CFG_DEFAULT_KEYS and CFG_ADD_TKIP_DEFAULT_KEY - so the HCF_ASSERT logic of hcf_get_info should
4493  * not catch.
4494  *
4495  *.ENDDOC END DOCUMENTATION
4496  *
4497  ************************************************************************************************************/
4498 HCF_STATIC int
4499 put_info( IFBP ifbp, LTVP ltvp )
4500 {
4501 
4502  int rc = HCF_SUCCESS;
4503 
4504  HCFASSERT( ifbp->IFB_CardStat == 0, MERGE_2( ltvp->typ, ifbp->IFB_CardStat ) );
4505  HCFASSERT( CFG_RID_CFG_MIN <= ltvp->typ && ltvp->typ <= CFG_RID_CFG_MAX, ltvp->typ );
4506 
4507  if ( ifbp->IFB_CardStat == 0 && /* 20*/
4508  ( ( CFG_RID_CFG_MIN <= ltvp->typ && ltvp->typ <= CFG_RID_CFG_MAX ) ||
4509  ( CFG_RID_ENG_MIN <= ltvp->typ /* && ltvp->typ <= 0xFFFF */ ) ) ) {
4510 #if HCF_ASSERT //FCC8, FCB0, FCB4, FCB6, FCB7, FCB8, FCC0, FCC4, FCBC, FCBD, FCBE, FCBF
4511  {
4512  hcf_16 t = ltvp->typ;
4513  LTV_STRCT x = { 2, t, {0} }; /*24*/
4514  hcf_get_info( ifbp, (LTVP)&x );
4515  if ( x.len == 0 &&
4519  t != CFG_FCBC && t != CFG_FCBD && t != CFG_FCBE && t != CFG_FCBF &&
4521  )
4522  ) {
4523  HCFASSERT( DO_ASSERT, ltvp->typ );
4524  }
4525  }
4526 #endif // HCF_ASSERT
4527 
4528  rc = setup_bap( ifbp, ltvp->typ, 0, IO_OUT );
4529  put_frag( ifbp, (wci_bufp)ltvp, 2*ltvp->len + 2 BE_PAR(2) );
4530  /*28*/ if ( rc == HCF_SUCCESS ) {
4531  rc = cmd_exe( ifbp, HCMD_ACCESS + HCMD_ACCESS_WRITE, ltvp->typ );
4532  }
4533  }
4534  return rc;
4535 } // put_info
4536 
4537 
4538 /************************************************************************************************************
4539  *
4540  *.SUBMODULE int put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp )
4541  *.PURPOSE accumulates a ( series of) buffers into a single Info block into the MailBox.
4542  *
4543  *.ARGUMENTS
4544  * ifbp address of the Interface Block
4545  * ltvp address of structure specifying the "type" and the fragments of the information to be synthesized
4546  * as an LTV into the MailBox
4547  *
4548  *.RETURNS
4549  *
4550  *.DESCRIPTION
4551  * If the data does not fit (including no MailBox is available), the IFB_MBTally is incremented and an
4552  * error status is returned.
4553  * HCF_ASSERT does not catch.
4554  * Calling put_info_mb when their is no MailBox available, is considered a design error in the MSF.
4555  *
4556  * Note that there is always at least 1 word of unused space in the mail box.
4557  * As a consequence:
4558  * - no problem in pointer arithmetic (MB_RP == MB_WP means unambiguously mail box is completely empty
4559  * - There is always free space to write an L field with a value of zero after each MB_Info block. This
4560  * allows for an easy scan mechanism in the "get MB_Info block" logic.
4561  *
4562  *
4563  *.DIAGRAM
4564  *1: Calculate L field of the MBIB, i.e. 1 for the T-field + the cumulative length of the fragments.
4565  *2: The free space in the MailBox is calculated (2a: free part from Write Ptr to Read Ptr, 2b: free part
4566  * turns out to wrap around) . If this space suffices to store the number of words reflected by len (T-field
4567  * + Value-field) plus the additional MailBox Info L-field + a trailing 0 to act as the L-field of a trailing
4568  * dummy or empty LTV record, then a MailBox Info block is build in the MailBox consisting of
4569  * - the value len in the first word
4570  * - type in the second word
4571  * - a copy of the contents of the fragments in the second and higher word
4572  *
4573  *4: Since put_info_mb() can more or less directly be called from the MSF level, the I/F must be robust
4574  * against out-of-range variables. As failsafe coding, the MB update is skipped by changing tlen to 0 if
4575  * len == 0; This will indirectly cause an assert as result of the violation of the next if clause.
4576  *6: Check whether the free space in MailBox suffices (this covers the complete absence of the MailBox).
4577  * Note that len is unsigned, so even MSF I/F violation works out O.K.
4578  * The '2' in the expression "len+2" is used because 1 word is needed for L itself and 1 word is needed
4579  * for the zero-sentinel
4580  *8: update MailBox Info length report to MSF with "oldest" MB Info Block size. Be careful here, if you get
4581  * here before the MailBox is registered, you can't read from the buffer addressed by IFB_MBp (it is the
4582  * Null buffer) so don't move this code till the end of this routine but keep it where there is garuanteed
4583  * a buffer.
4584  *
4585  *.NOTICE
4586  * boundary testing depends on the fact that IFB_MBSize is guaranteed to be zero if no MailBox is present,
4587  * and to a lesser degree, that IFB_MBWp = IFB_MBRp = 0
4588  *
4589  *.ENDDOC END DOCUMENTATION
4590  *
4591  ************************************************************************************************************/
4592 
4593 HCF_STATIC int
4594 put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp )
4595 {
4596 
4597  int rc = HCF_SUCCESS;
4598  hcf_16 i; //work counter
4599  hcf_16 *dp; //destination pointer (in MailBox)
4600  wci_recordp sp; //source pointer
4601  hcf_16 len; //total length to copy to MailBox
4602  hcf_16 tlen; //free length/working length/offset in WMP frame
4603 
4604  if ( ifbp->IFB_MBp == NULL ) return rc; //;?not sufficient
4605  HCFASSERT( ifbp->IFB_MBp != NULL, 0 );
4606  HCFASSERT( ifbp->IFB_MBSize, 0 );
4607 
4608  len = 1; /* 1 */
4609  for ( i = 0; i < ltvp->frag_cnt; i++ ) {
4610  len += ltvp->frag_buf[i].frag_len;
4611  }
4612  if ( ifbp->IFB_MBRp > ifbp->IFB_MBWp ) {
4613  tlen = ifbp->IFB_MBRp - ifbp->IFB_MBWp; /* 2a*/
4614  } else {
4615  if ( ifbp->IFB_MBRp == ifbp->IFB_MBWp ) {
4616  ifbp->IFB_MBRp = ifbp->IFB_MBWp = 0; // optimize Wrapping
4617  }
4618  tlen = ifbp->IFB_MBSize - ifbp->IFB_MBWp; /* 2b*/
4619  if ( ( tlen <= len + 2 ) && ( len + 2 < ifbp->IFB_MBRp ) ) { //if trailing space is too small but
4620  // leading space is sufficiently large
4621  ifbp->IFB_MBp[ifbp->IFB_MBWp] = 0xFFFF; //flag dummy LTV to fill the trailing space
4622  ifbp->IFB_MBWp = 0; //reset WritePointer to begin of MailBox
4623  tlen = ifbp->IFB_MBRp; //get new available space size
4624  }
4625  }
4626  dp = &ifbp->IFB_MBp[ifbp->IFB_MBWp];
4627  if ( len == 0 ) {
4628  tlen = 0; //;? what is this good for
4629  }
4630  if ( len + 2 >= tlen ){ /* 6 */
4631  //Do Not ASSERT, this is a normal condition
4632  IF_TALLY( ifbp->IFB_HCF_Tallies.NoBufMB++ );
4633  rc = HCF_ERR_LEN;
4634  } else {
4635  *dp++ = len; //write Len (= size of T+V in words to MB_Info block
4636  *dp++ = ltvp->base_typ; //write Type to MB_Info block
4637  ifbp->IFB_MBWp += len + 1; //update WritePointer of MailBox
4638  for ( i = 0; i < ltvp->frag_cnt; i++ ) { // process each of the fragments
4639  sp = ltvp->frag_buf[i].frag_addr;
4640  len = ltvp->frag_buf[i].frag_len;
4641  while ( len-- ) *dp++ = *sp++;
4642  }
4643  ifbp->IFB_MBp[ifbp->IFB_MBWp] = 0; //to assure get_info for CFG_MB_INFO stops
4644  ifbp->IFB_MBInfoLen = ifbp->IFB_MBp[ifbp->IFB_MBRp]; /* 8 */
4645  }
4646  return rc;
4647 } // put_info_mb
4648 
4649 
4650 /************************************************************************************************************
4651  *
4652  *.SUBMODULE int setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type )
4653  *.PURPOSE set up data access to NIC RAM via BAP_1.
4654  *
4655  *.ARGUMENTS
4656  * ifbp address of I/F Block
4657  * fid FID/RID
4658  * offset !!even!! offset in FID/RID
4659  * type IO_IN, IO_OUT
4660  *
4661  *.RETURNS
4662  * HCF_SUCCESS O.K
4663  * HCF_ERR_NO_NIC card is removed
4664  * HCF_ERR_DEFUNCT_TIME_OUT Fatal malfunction detected
4665  * HCF_ERR_DEFUNCT_..... if and only if IFB_DefunctStat <> 0
4666  *
4667  *.DESCRIPTION
4668  *
4669  * A non-zero return status indicates:
4670  * - the NIC is considered nonoperational, e.g. due to a time-out of some Hermes activity in the past
4671  * - BAP_1 could not properly be initialized
4672  * - the card is removed before completion of the data transfer
4673  * In all other cases, a zero is returned.
4674  * BAP Initialization failure indicates an H/W error which is very likely to signal complete H/W failure.
4675  * Once a BAP Initialization failure has occurred all subsequent interactions with the Hermes will return a
4676  * "defunct" status till the Hermes is re-initialized by means of an hcf_connect.
4677  *
4678  * A BAP is a set of registers (Offset, Select and Data) offering read/write access to a particular FID or
4679  * RID. This access is based on a auto-increment feature.
4680  * There are two BAPs but these days the HCF uses only BAP_1 and leaves BAP_0 to the PCI Busmastering H/W.
4681  *
4682  * The BAP-mechanism is based on the Busy bit in the Offset register (see the Hermes definition). The waiting
4683  * for Busy must occur between writing the Offset register and accessing the Data register. The
4684  * implementation to wait for the Busy bit drop after each write to the Offset register, implies that the
4685  * requirement that the Busy bit is low before the Select register is written, is automatically met.
4686  * BAP-setup may be time consuming (e.g. 380 usec for large offsets occurs frequently). The wait for Busy bit
4687  * drop is protected by a loop counter, which is initialized with IFB_TickIni, which is calibrated in init.
4688  *
4689  * The NIC I/F is optimized for word transfer and can only handle word transfer at a word boundary in NIC
4690  * RAM. The intended solution for transfer of a single byte has multiple H/W flaws. There have been different
4691  * S/W Workaround strategies. RID access is hcf_16 based by "nature", so no byte access problems. For Tx/Rx
4692  * FID access, the byte logic became obsolete by absorbing it in the double word oriented nature of the MIC
4693  * feature.
4694  *
4695  *
4696  *.DIAGRAM
4697  *
4698  *2: the test on rc checks whether the HCF went into "defunct" mode ( e.g. BAP initialization or a call to
4699  * cmd_wait did ever fail).
4700  *4: the select register and offset register are set
4701  * the offset register is monitored till a successful condition (no busy bit) is detected or till the
4702  * (calibrated) protection counter expires
4703  * If the counter expires, this is reflected in IFB_DefunctStat, so all subsequent calls to setup_bap fail
4704  * immediately ( see 2)
4705  *6: initialization of the carry as used by pet/get_frag
4706  *8: HREG_OFFSET_ERR is ignored as error because:
4707  * a: the Hermes is robust against it
4708  * b: it is not known what causes it (probably a bug), hence no strategy can be specified which level is
4709  * to handle this error in which way. In the past, it could be induced by the MSF level, e.g. by calling
4710  * hcf_rcv_msg while there was no Rx-FID available. Since this is an MSF-error which is caught by ASSERT,
4711  * there is no run-time action required by the HCF.
4712  * Lumping the Offset error in with the Busy bit error, as has been done in the past turns out to be a
4713  * disaster or a life saver, just depending on what the cause of the error is. Since no prediction can be
4714  * done about the future, it is "felt" to be the best strategy to ignore this error. One day the code was
4715  * accompanied by the following comment:
4716  * // ignore HREG_OFFSET_ERR, someone, supposedly the MSF programmer ;) made a bug. Since we don't know
4717  * // what is going on, we might as well go on - under management pressure - by ignoring it
4718  *
4719  *.ENDDOC END DOCUMENTATION
4720  *
4721  ************************************************************************************************************/
4722 HCF_STATIC int
4723 setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type )
4724 {
4725  PROT_CNT_INI;
4726  int rc;
4727 
4728  HCFTRACE( ifbp, HCF_TRACE_STRIO );
4729  rc = ifbp->IFB_DefunctStat;
4730  if (rc == HCF_SUCCESS) { /*2*/
4731  OPW( HREG_SELECT_1, fid ); /*4*/
4732  OPW( HREG_OFFSET_1, offset );
4733  if ( type == IO_IN ) {
4734  ifbp->IFB_CarryIn = 0;
4735  }
4736  else ifbp->IFB_CarryOut = 0;
4738  HCFASSERT( !( IPW( HREG_OFFSET_1) & HREG_OFFSET_ERR ), MERGE_2( fid, offset ) ); /*8*/
4739  if ( prot_cnt == 0 ) {
4740  HCFASSERT( DO_ASSERT, MERGE_2( fid, offset ) );
4743  }
4744  }
4746  return rc;
4747 } // setup_bap
4748