Linux Kernel
3.7.1
|
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/crc32.h>
#include <linux/mii.h>
#include <linux/in.h>
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/udp.h>
#include <linux/dma-mapping.h>
#include <linux/gfp.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/skbuff.h>
#include <net/ip.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/uaccess.h>
#include <asm/sn/types.h>
#include <asm/sn/ioc3.h>
#include <asm/pci/bridge.h>
Go to the source code of this file.
Data Structures | |
struct | ioc3_private |
Macros | |
#define | IOC3_NAME "ioc3-eth" |
#define | IOC3_VERSION "2.6.3-4" |
#define | RX_BUFFS 64 |
#define | ETCSR_FD ((17<<ETCSR_IPGR2_SHIFT) | (11<<ETCSR_IPGR1_SHIFT) | 21) |
#define | ETCSR_HD ((21<<ETCSR_IPGR2_SHIFT) | (21<<ETCSR_IPGR1_SHIFT) | 21) |
#define | IOC3_CACHELINE 128UL |
#define | RX_OFFSET 10 |
#define | RX_BUF_ALLOC_SIZE (1664 + RX_OFFSET + IOC3_CACHELINE) |
#define | BARRIER() __asm__("sync" ::: "memory") |
#define | IOC3_SIZE 0x100000 |
#define | ioc3_r_mcr() be32_to_cpu(ioc3->mcr) |
#define | ioc3_w_mcr(v) do { ioc3->mcr = cpu_to_be32(v); } while (0) |
#define | ioc3_w_gpcr_s(v) do { ioc3->gpcr_s = cpu_to_be32(v); } while (0) |
#define | ioc3_r_emcr() be32_to_cpu(ioc3->emcr) |
#define | ioc3_w_emcr(v) do { ioc3->emcr = cpu_to_be32(v); } while (0) |
#define | ioc3_r_eisr() be32_to_cpu(ioc3->eisr) |
#define | ioc3_w_eisr(v) do { ioc3->eisr = cpu_to_be32(v); } while (0) |
#define | ioc3_r_eier() be32_to_cpu(ioc3->eier) |
#define | ioc3_w_eier(v) do { ioc3->eier = cpu_to_be32(v); } while (0) |
#define | ioc3_r_ercsr() be32_to_cpu(ioc3->ercsr) |
#define | ioc3_w_ercsr(v) do { ioc3->ercsr = cpu_to_be32(v); } while (0) |
#define | ioc3_r_erbr_h() be32_to_cpu(ioc3->erbr_h) |
#define | ioc3_w_erbr_h(v) do { ioc3->erbr_h = cpu_to_be32(v); } while (0) |
#define | ioc3_r_erbr_l() be32_to_cpu(ioc3->erbr_l) |
#define | ioc3_w_erbr_l(v) do { ioc3->erbr_l = cpu_to_be32(v); } while (0) |
#define | ioc3_r_erbar() be32_to_cpu(ioc3->erbar) |
#define | ioc3_w_erbar(v) do { ioc3->erbar = cpu_to_be32(v); } while (0) |
#define | ioc3_r_ercir() be32_to_cpu(ioc3->ercir) |
#define | ioc3_w_ercir(v) do { ioc3->ercir = cpu_to_be32(v); } while (0) |
#define | ioc3_r_erpir() be32_to_cpu(ioc3->erpir) |
#define | ioc3_w_erpir(v) do { ioc3->erpir = cpu_to_be32(v); } while (0) |
#define | ioc3_r_ertr() be32_to_cpu(ioc3->ertr) |
#define | ioc3_w_ertr(v) do { ioc3->ertr = cpu_to_be32(v); } while (0) |
#define | ioc3_r_etcsr() be32_to_cpu(ioc3->etcsr) |
#define | ioc3_w_etcsr(v) do { ioc3->etcsr = cpu_to_be32(v); } while (0) |
#define | ioc3_r_ersr() be32_to_cpu(ioc3->ersr) |
#define | ioc3_w_ersr(v) do { ioc3->ersr = cpu_to_be32(v); } while (0) |
#define | ioc3_r_etcdc() be32_to_cpu(ioc3->etcdc) |
#define | ioc3_w_etcdc(v) do { ioc3->etcdc = cpu_to_be32(v); } while (0) |
#define | ioc3_r_ebir() be32_to_cpu(ioc3->ebir) |
#define | ioc3_w_ebir(v) do { ioc3->ebir = cpu_to_be32(v); } while (0) |
#define | ioc3_r_etbr_h() be32_to_cpu(ioc3->etbr_h) |
#define | ioc3_w_etbr_h(v) do { ioc3->etbr_h = cpu_to_be32(v); } while (0) |
#define | ioc3_r_etbr_l() be32_to_cpu(ioc3->etbr_l) |
#define | ioc3_w_etbr_l(v) do { ioc3->etbr_l = cpu_to_be32(v); } while (0) |
#define | ioc3_r_etcir() be32_to_cpu(ioc3->etcir) |
#define | ioc3_w_etcir(v) do { ioc3->etcir = cpu_to_be32(v); } while (0) |
#define | ioc3_r_etpir() be32_to_cpu(ioc3->etpir) |
#define | ioc3_w_etpir(v) do { ioc3->etpir = cpu_to_be32(v); } while (0) |
#define | ioc3_r_emar_h() be32_to_cpu(ioc3->emar_h) |
#define | ioc3_w_emar_h(v) do { ioc3->emar_h = cpu_to_be32(v); } while (0) |
#define | ioc3_r_emar_l() be32_to_cpu(ioc3->emar_l) |
#define | ioc3_w_emar_l(v) do { ioc3->emar_l = cpu_to_be32(v); } while (0) |
#define | ioc3_r_ehar_h() be32_to_cpu(ioc3->ehar_h) |
#define | ioc3_w_ehar_h(v) do { ioc3->ehar_h = cpu_to_be32(v); } while (0) |
#define | ioc3_r_ehar_l() be32_to_cpu(ioc3->ehar_l) |
#define | ioc3_w_ehar_l(v) do { ioc3->ehar_l = cpu_to_be32(v); } while (0) |
#define | ioc3_r_micr() be32_to_cpu(ioc3->micr) |
#define | ioc3_w_micr(v) do { ioc3->micr = cpu_to_be32(v); } while (0) |
#define | ioc3_r_midr_r() be32_to_cpu(ioc3->midr_r) |
#define | ioc3_w_midr_r(v) do { ioc3->midr_r = cpu_to_be32(v); } while (0) |
#define | ioc3_r_midr_w() be32_to_cpu(ioc3->midr_w) |
#define | ioc3_w_midr_w(v) do { ioc3->midr_w = cpu_to_be32(v); } while (0) |
Functions | |
MODULE_DEVICE_TABLE (pci, ioc3_pci_tbl) | |
MODULE_AUTHOR ("Ralf Baechle <[email protected]>") | |
MODULE_DESCRIPTION ("SGI IOC3 Ethernet driver") | |
MODULE_LICENSE ("GPL") | |
module_init (ioc3_init_module) | |
module_exit (ioc3_cleanup_module) | |
Definition at line 158 of file ioc3-eth.c.
#define ETCSR_FD ((17<<ETCSR_IPGR2_SHIFT) | (11<<ETCSR_IPGR1_SHIFT) | 21) |
Definition at line 75 of file ioc3-eth.c.
#define ETCSR_HD ((21<<ETCSR_IPGR2_SHIFT) | (21<<ETCSR_IPGR1_SHIFT) | 21) |
Definition at line 76 of file ioc3-eth.c.
#define IOC3_CACHELINE 128UL |
Definition at line 118 of file ioc3-eth.c.
#define IOC3_NAME "ioc3-eth" |
Definition at line 30 of file ioc3-eth.c.
#define ioc3_r_ebir | ( | ) | be32_to_cpu(ioc3->ebir) |
Definition at line 200 of file ioc3-eth.c.
#define ioc3_r_ehar_h | ( | ) | be32_to_cpu(ioc3->ehar_h) |
Definition at line 214 of file ioc3-eth.c.
#define ioc3_r_ehar_l | ( | ) | be32_to_cpu(ioc3->ehar_l) |
Definition at line 216 of file ioc3-eth.c.
#define ioc3_r_eier | ( | ) | be32_to_cpu(ioc3->eier) |
Definition at line 178 of file ioc3-eth.c.
#define ioc3_r_eisr | ( | ) | be32_to_cpu(ioc3->eisr) |
Definition at line 176 of file ioc3-eth.c.
#define ioc3_r_emar_h | ( | ) | be32_to_cpu(ioc3->emar_h) |
Definition at line 210 of file ioc3-eth.c.
#define ioc3_r_emar_l | ( | ) | be32_to_cpu(ioc3->emar_l) |
Definition at line 212 of file ioc3-eth.c.
#define ioc3_r_emcr | ( | ) | be32_to_cpu(ioc3->emcr) |
Definition at line 174 of file ioc3-eth.c.
#define ioc3_r_erbar | ( | ) | be32_to_cpu(ioc3->erbar) |
Definition at line 186 of file ioc3-eth.c.
#define ioc3_r_erbr_h | ( | ) | be32_to_cpu(ioc3->erbr_h) |
Definition at line 182 of file ioc3-eth.c.
#define ioc3_r_erbr_l | ( | ) | be32_to_cpu(ioc3->erbr_l) |
Definition at line 184 of file ioc3-eth.c.
#define ioc3_r_ercir | ( | ) | be32_to_cpu(ioc3->ercir) |
Definition at line 188 of file ioc3-eth.c.
#define ioc3_r_ercsr | ( | ) | be32_to_cpu(ioc3->ercsr) |
Definition at line 180 of file ioc3-eth.c.
#define ioc3_r_erpir | ( | ) | be32_to_cpu(ioc3->erpir) |
Definition at line 190 of file ioc3-eth.c.
#define ioc3_r_ersr | ( | ) | be32_to_cpu(ioc3->ersr) |
Definition at line 196 of file ioc3-eth.c.
#define ioc3_r_ertr | ( | ) | be32_to_cpu(ioc3->ertr) |
Definition at line 192 of file ioc3-eth.c.
#define ioc3_r_etbr_h | ( | ) | be32_to_cpu(ioc3->etbr_h) |
Definition at line 202 of file ioc3-eth.c.
#define ioc3_r_etbr_l | ( | ) | be32_to_cpu(ioc3->etbr_l) |
Definition at line 204 of file ioc3-eth.c.
#define ioc3_r_etcdc | ( | ) | be32_to_cpu(ioc3->etcdc) |
Definition at line 198 of file ioc3-eth.c.
#define ioc3_r_etcir | ( | ) | be32_to_cpu(ioc3->etcir) |
Definition at line 206 of file ioc3-eth.c.
#define ioc3_r_etcsr | ( | ) | be32_to_cpu(ioc3->etcsr) |
Definition at line 194 of file ioc3-eth.c.
#define ioc3_r_etpir | ( | ) | be32_to_cpu(ioc3->etpir) |
Definition at line 208 of file ioc3-eth.c.
#define ioc3_r_mcr | ( | ) | be32_to_cpu(ioc3->mcr) |
Definition at line 171 of file ioc3-eth.c.
#define ioc3_r_micr | ( | ) | be32_to_cpu(ioc3->micr) |
Definition at line 218 of file ioc3-eth.c.
#define ioc3_r_midr_r | ( | ) | be32_to_cpu(ioc3->midr_r) |
Definition at line 220 of file ioc3-eth.c.
#define ioc3_r_midr_w | ( | ) | be32_to_cpu(ioc3->midr_w) |
Definition at line 222 of file ioc3-eth.c.
#define IOC3_SIZE 0x100000 |
Definition at line 162 of file ioc3-eth.c.
#define IOC3_VERSION "2.6.3-4" |
Definition at line 31 of file ioc3-eth.c.
#define ioc3_w_ebir | ( | v | ) | do { ioc3->ebir = cpu_to_be32(v); } while (0) |
Definition at line 201 of file ioc3-eth.c.
#define ioc3_w_ehar_h | ( | v | ) | do { ioc3->ehar_h = cpu_to_be32(v); } while (0) |
Definition at line 215 of file ioc3-eth.c.
#define ioc3_w_ehar_l | ( | v | ) | do { ioc3->ehar_l = cpu_to_be32(v); } while (0) |
Definition at line 217 of file ioc3-eth.c.
#define ioc3_w_eier | ( | v | ) | do { ioc3->eier = cpu_to_be32(v); } while (0) |
Definition at line 179 of file ioc3-eth.c.
#define ioc3_w_eisr | ( | v | ) | do { ioc3->eisr = cpu_to_be32(v); } while (0) |
Definition at line 177 of file ioc3-eth.c.
#define ioc3_w_emar_h | ( | v | ) | do { ioc3->emar_h = cpu_to_be32(v); } while (0) |
Definition at line 211 of file ioc3-eth.c.
#define ioc3_w_emar_l | ( | v | ) | do { ioc3->emar_l = cpu_to_be32(v); } while (0) |
Definition at line 213 of file ioc3-eth.c.
#define ioc3_w_emcr | ( | v | ) | do { ioc3->emcr = cpu_to_be32(v); } while (0) |
Definition at line 175 of file ioc3-eth.c.
#define ioc3_w_erbar | ( | v | ) | do { ioc3->erbar = cpu_to_be32(v); } while (0) |
Definition at line 187 of file ioc3-eth.c.
#define ioc3_w_erbr_h | ( | v | ) | do { ioc3->erbr_h = cpu_to_be32(v); } while (0) |
Definition at line 183 of file ioc3-eth.c.
#define ioc3_w_erbr_l | ( | v | ) | do { ioc3->erbr_l = cpu_to_be32(v); } while (0) |
Definition at line 185 of file ioc3-eth.c.
#define ioc3_w_ercir | ( | v | ) | do { ioc3->ercir = cpu_to_be32(v); } while (0) |
Definition at line 189 of file ioc3-eth.c.
#define ioc3_w_ercsr | ( | v | ) | do { ioc3->ercsr = cpu_to_be32(v); } while (0) |
Definition at line 181 of file ioc3-eth.c.
#define ioc3_w_erpir | ( | v | ) | do { ioc3->erpir = cpu_to_be32(v); } while (0) |
Definition at line 191 of file ioc3-eth.c.
#define ioc3_w_ersr | ( | v | ) | do { ioc3->ersr = cpu_to_be32(v); } while (0) |
Definition at line 197 of file ioc3-eth.c.
#define ioc3_w_ertr | ( | v | ) | do { ioc3->ertr = cpu_to_be32(v); } while (0) |
Definition at line 193 of file ioc3-eth.c.
#define ioc3_w_etbr_h | ( | v | ) | do { ioc3->etbr_h = cpu_to_be32(v); } while (0) |
Definition at line 203 of file ioc3-eth.c.
#define ioc3_w_etbr_l | ( | v | ) | do { ioc3->etbr_l = cpu_to_be32(v); } while (0) |
Definition at line 205 of file ioc3-eth.c.
#define ioc3_w_etcdc | ( | v | ) | do { ioc3->etcdc = cpu_to_be32(v); } while (0) |
Definition at line 199 of file ioc3-eth.c.
#define ioc3_w_etcir | ( | v | ) | do { ioc3->etcir = cpu_to_be32(v); } while (0) |
Definition at line 207 of file ioc3-eth.c.
#define ioc3_w_etcsr | ( | v | ) | do { ioc3->etcsr = cpu_to_be32(v); } while (0) |
Definition at line 195 of file ioc3-eth.c.
#define ioc3_w_etpir | ( | v | ) | do { ioc3->etpir = cpu_to_be32(v); } while (0) |
Definition at line 209 of file ioc3-eth.c.
#define ioc3_w_gpcr_s | ( | v | ) | do { ioc3->gpcr_s = cpu_to_be32(v); } while (0) |
Definition at line 173 of file ioc3-eth.c.
#define ioc3_w_mcr | ( | v | ) | do { ioc3->mcr = cpu_to_be32(v); } while (0) |
Definition at line 172 of file ioc3-eth.c.
#define ioc3_w_micr | ( | v | ) | do { ioc3->micr = cpu_to_be32(v); } while (0) |
Definition at line 219 of file ioc3-eth.c.
#define ioc3_w_midr_r | ( | v | ) | do { ioc3->midr_r = cpu_to_be32(v); } while (0) |
Definition at line 221 of file ioc3-eth.c.
#define ioc3_w_midr_w | ( | v | ) | do { ioc3->midr_w = cpu_to_be32(v); } while (0) |
Definition at line 223 of file ioc3-eth.c.
#define RX_BUF_ALLOC_SIZE (1664 + RX_OFFSET + IOC3_CACHELINE) |
Definition at line 155 of file ioc3-eth.c.
#define RX_BUFFS 64 |
Definition at line 73 of file ioc3-eth.c.
#define RX_OFFSET 10 |
Definition at line 154 of file ioc3-eth.c.
MODULE_AUTHOR | ( | "Ralf Baechle <[email protected]>" | ) |
MODULE_DESCRIPTION | ( | "SGI IOC3 Ethernet driver" | ) |
MODULE_DEVICE_TABLE | ( | pci | , |
ioc3_pci_tbl | |||
) |
module_exit | ( | ioc3_cleanup_module | ) |
module_init | ( | ioc3_init_module | ) |
MODULE_LICENSE | ( | "GPL" | ) |