27 u8 *pci_reset_offset = 0;
28 u8 *pci_online0_offset = 0;
29 u8 *pci_online1_offset = 0;
37 sreset =
readl((
void *)pci_reset_offset);
39 writel(sreset, (
void *)pci_reset_offset);
46 sreset =
readl((
void *)pci_reset_offset);
50 if (sreset & BE2_SET_RESET) {
52 " Soft Reset did not deassert\n");
56 writel(pconline0, (
void *)pci_online0_offset);
57 writel(pconline1, (
void *)pci_online1_offset);
60 writel(sreset, (
void *)pci_reset_offset);
63 while (sreset & BE2_SET_RESET) {
67 sreset =
readl((
void *)pci_reset_offset);
70 if (sreset & BE2_SET_RESET) {
72 " MPU Online Soft Reset did not deassert\n");
80 unsigned int num_loop;
89 status =
readl((
void *)mpu_sem);
91 if ((status & 0x80000000) || (status & 0x0000FFFF) == 0xC000)
97 if ((status & 0x80000000) || (!num_loop)) {
99 "BC_%d : Failed in be_chk_reset_complete"
100 "status = 0x%x\n", status);
119 unsigned int tag = 0;
121 if (phba->
ctrl.mcc_tag_available) {
122 tag = phba->
ctrl.mcc_tag[phba->
ctrl.mcc_alloc_index];
123 phba->
ctrl.mcc_tag[phba->
ctrl.mcc_alloc_index] = 0;
124 phba->
ctrl.mcc_numtag[
tag] = 0;
127 phba->
ctrl.mcc_tag_available--;
129 phba->
ctrl.mcc_alloc_index = 0;
131 phba->
ctrl.mcc_alloc_index++;
139 tag = tag & 0x000000FF;
156 static inline bool be_mcc_compl_is_new(
struct be_mcc_compl *compl)
158 if (compl->
flags != 0) {
166 static inline void be_mcc_compl_use(
struct be_mcc_compl *compl)
174 u16 compl_status, extd_status;
187 "BC_%d : error in cmd completion: status(compl/extd)=%d/%d\n",
188 compl_status, extd_status);
198 u16 compl_status, extd_status;
209 tag = (compl->
tag0 & 0x000000FF);
226 if (be_mcc_compl_is_new(compl)) {
227 queue_tail_inc(mcc_cq);
245 "BC_%d : Link Down on Physical Port %d\n",
250 be2iscsi_fail_session);
256 "BC_%d : Link UP on Physical Port %d\n",
262 "BC_%d : Unexpected Async Notification %d on"
263 "Physical Port %d\n",
287 spin_lock_bh(&phba->
ctrl.mcc_cq_lock);
288 while ((compl = be_mcc_compl_get(phba))) {
299 "BC_%d : Unsupported Async Event, flags"
300 " = 0x%08x\n", compl->
flags);
303 status = be_mcc_compl_process(ctrl, compl);
306 be_mcc_compl_use(compl);
311 beiscsi_cq_notify(phba, phba->
ctrl.mcc_obj.cq.id,
true, num);
313 spin_unlock_bh(&phba->
ctrl.mcc_cq_lock);
318 static int be_mcc_wait_compl(
struct beiscsi_hba *phba)
330 if (i == mcc_timeout) {
333 "BC_%d : mccq poll timed out\n");
344 return be_mcc_wait_compl(phba);
347 static int be_mbox_db_ready_wait(
struct be_ctrl_info *ctrl)
349 #define long_delay 2000
359 if (cnt > 12000000) {
363 "BC_%d : mbox_db poll timed out\n");
370 mdelay(long_delay / 1000);
393 status = be_mbox_db_ready_wait(ctrl);
397 "BC_%d : be_mbox_db_ready_wait failed\n");
404 val |= (
u32) (mbox_mem->
dma >> 4) << 2;
407 status = be_mbox_db_ready_wait(ctrl);
411 "BC_%d : be_mbox_db_ready_wait failed\n");
415 if (be_mcc_compl_is_new(compl)) {
416 status = be_mcc_compl_process(ctrl, &mbox->
compl);
417 be_mcc_compl_use(compl);
421 "BC_%d : After be_mcc_compl_process\n");
428 "BC_%d : Invalid Mailbox Completion\n");
439 static int be_mbox_notify_wait(
struct beiscsi_hba *phba)
455 status = be_mbox_db_ready_wait(ctrl);
461 val |= (
u32)(mbox_mem->
dma >> 4) << 2;
464 status = be_mbox_db_ready_wait(ctrl);
469 if (be_mcc_compl_is_new(compl)) {
470 status = be_mcc_compl_process(ctrl, &mbox->
compl);
471 be_mcc_compl_use(compl);
477 "BC_%d : invalid mailbox completion\n");
485 bool embedded,
u8 sge_cnt)
512 for (i = 0; i < buf_pages; i++) {
521 #define MAX_INTR_RATE 651042
522 const u32 round = 10;
529 if (interrupt_rate == 0)
533 multiplier /= interrupt_rate;
534 multiplier = (multiplier + round / 2) / round;
535 multiplier =
min(multiplier, (
u32) 1023);
552 wrb = queue_head_node(mccq);
553 memset(wrb, 0,
sizeof(*wrb));
554 wrb->
tag0 = (mccq->
head & 0x000000FF) << 16;
555 queue_head_inc(mccq);
571 memset(wrb, 0,
sizeof(*wrb));
585 __ilog2_u32(eq->
len / 256));
587 eq_delay_to_mult(eq_delay));
609 memset(wrb, 0,
sizeof(*wrb));
611 endian_check = (
u8 *) wrb;
612 *endian_check++ = 0xFF;
613 *endian_check++ = 0x12;
614 *endian_check++ = 0x34;
615 *endian_check++ = 0xFF;
616 *endian_check++ = 0xFF;
617 *endian_check++ = 0x56;
618 *endian_check++ = 0x78;
619 *endian_check++ = 0xFF;
625 "BC_%d : be_cmd_fw_initialize Failed\n");
633 bool sol_evts,
bool no_delay,
int coalesce_wm)
644 memset(wrb, 0,
sizeof(*wrb));
656 __ilog2_u32(cq->
len / 256));
674 "BC_%d : In be_cmd_cq_create, status=ox%08x\n",
682 static u32 be_encoded_q_len(
int q_len)
684 u32 len_encoded = fls(q_len);
685 if (len_encoded == 16)
701 spin_lock(&phba->
ctrl.mbox_lock);
704 memset(wrb, 0,
sizeof(*wrb));
705 req = embedded_payload(wrb);
719 be_encoded_q_len(mccq->
len));
726 status = be_mbox_notify_wait(phba);
732 spin_unlock(&phba->
ctrl.mbox_lock);
747 "BC_%d : In beiscsi_cmd_q_destroy "
748 "queue_type : %d\n", queue_type);
751 memset(wrb, 0,
sizeof(*wrb));
754 switch (queue_type) {
806 memset(wrb, 0,
sizeof(*wrb));
820 be_encoded_q_len(length /
sizeof(
struct phys_addr)));
851 memset(wrb, 0,
sizeof(*wrb));
877 unsigned int curr_pages;
878 u32 internal_page_offset = 0;
881 if (num_pages == 0xff)
886 memset(wrb, 0,
sizeof(*wrb));
901 if (temp_num_pages == 0xff)
907 "BC_%d : FW CMD to map iscsi frags failed.\n");
911 }
while (num_pages > 0);
928 req = embedded_payload(wrb);
932 status = be_mbox_notify_wait(phba);
951 unsigned int tag = 0;
964 req = embedded_payload(wrb);