#include "AArch64Disassembler.h"#include "AArch64ExternalSymbolizer.h"#include "AArch64Subtarget.h"#include "MCTargetDesc/AArch64AddressingModes.h"#include "Utils/AArch64BaseInfo.h"#include "llvm/MC/MCFixedLenDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/MemoryObject.h"#include "llvm/Support/TargetRegistry.h"#include "AArch64GenDisassemblerTables.inc"#include "AArch64GenInstrInfo.inc"
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Define Documentation
| #define DEBUG_TYPE "aarch64-disassembler" |
Definition at line 27 of file AArch64Disassembler.cpp.
| #define Fail llvm::MCDisassembler::Fail |
Definition at line 193 of file AArch64Disassembler.cpp.
Referenced by DecodeAddSubERegInstruction(), DecodeAdrInstruction(), DecodeBaseAddSubImm(), DecodeDDDDRegisterClass(), DecodeDDDRegisterClass(), DecodeDDRegisterClass(), DecodeExclusiveLdStInstruction(), DecodeFPR128_loRegisterClass(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), DecodeLogicalImmInstruction(), DecodeMoveImmInstruction(), DecodeMRSSystemRegister(), DecodeMSRSystemRegister(), DecodePairLdStInstruction(), DecodeQQQQRegisterClass(), DecodeQQQRegisterClass(), DecodeQQRegisterClass(), DecodeSignedLdStInstruction(), DecodeSystemPStateInstruction(), DecodeThreeAddrSRegInstruction(), DecodeUnsignedLdStInstruction(), and DecodeVectorRegisterClass().
Definition at line 194 of file AArch64Disassembler.cpp.
Referenced by DecodeExclusiveLdStInstruction(), DecodePairLdStInstruction(), and DecodeSignedLdStInstruction().
| #define Success llvm::MCDisassembler::Success |
Definition at line 192 of file AArch64Disassembler.cpp.
Referenced by DecodeAddSubERegInstruction(), DecodeAdrInstruction(), DecodeBaseAddSubImm(), DecodeDDDDRegisterClass(), DecodeDDDRegisterClass(), DecodeDDRegisterClass(), DecodeExclusiveLdStInstruction(), DecodeFixedPointScaleImm32(), DecodeFixedPointScaleImm64(), DecodeFMOVLaneInstruction(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), DecodeLogicalImmInstruction(), DecodeMemExtend(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodeMoveImmInstruction(), DecodeMRSSystemRegister(), DecodeMSRSystemRegister(), DecodePairLdStInstruction(), DecodePCRelLabel19(), DecodeQQQQRegisterClass(), DecodeQQQRegisterClass(), DecodeQQRegisterClass(), DecodeSignedLdStInstruction(), DecodeSystemPStateInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), DecodeUnconditionalBranch(), DecodeUnsignedLdStInstruction(), DecodeVecShiftLImm(), DecodeVecShiftRImm(), DecodeVectorRegisterClass(), getCompressedFragment(), and LowerCMP_SWAP().
Typedef Documentation
Definition at line 30 of file AArch64Disassembler.cpp.
Function Documentation
| static bool Check | ( | DecodeStatus & | Out, |
| DecodeStatus | In | ||
| ) | [static] |
Definition at line 174 of file AArch64Disassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::tgtok::In, llvm_unreachable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by llvm::RuntimeDyldImpl::computeSectionStubBufSize(), llvm::RuntimeDyldImpl::computeTotalAllocSize(), llvm::RuntimeDyldImpl::emitSection(), llvm::RuntimeDyldImpl::loadObject(), and llvm::RuntimeDyldELF::processRelocationRef().
| static MCDisassembler* createAArch64Disassembler | ( | const Target & | T, |
| const MCSubtargetInfo & | STI, | ||
| MCContext & | Ctx | ||
| ) | [static] |
Definition at line 196 of file AArch64Disassembler.cpp.
Referenced by LLVMInitializeAArch64Disassembler().
| static MCSymbolizer* createAArch64ExternalSymbolizer | ( | StringRef | TT, |
| LLVMOpInfoCallback | GetOpInfo, | ||
| LLVMSymbolLookupCallback | SymbolLookUp, | ||
| void * | DisInfo, | ||
| MCContext * | Ctx, | ||
| MCRelocationInfo * | RelInfo | ||
| ) | [static] |
Definition at line 226 of file AArch64Disassembler.cpp.
Referenced by LLVMInitializeAArch64Disassembler().
| static DecodeStatus DecodeAddSubERegInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1298 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), and Success.
| static DecodeStatus DecodeAdrInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1443 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeGPR64RegisterClass(), Fail, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
| static DecodeStatus DecodeBaseAddSubImm | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1462 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
| static DecodeStatus DecodeDDDDRegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 577 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), DDDDDecoderTable, Fail, Register, and Success.
| static DecodeStatus DecodeDDDRegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 554 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), DDDDecoderTable, Fail, Register, and Success.
| static DecodeStatus DecodeDDRegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 531 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), DDDecoderTable, Fail, Register, and Success.
| static DecodeStatus DecodeExclusiveLdStInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1094 of file AArch64Disassembler.cpp.
References DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), SoftFail, and Success.
| static DecodeStatus DecodeFixedPointScaleImm32 | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 587 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and Success.
| static DecodeStatus DecodeFixedPointScaleImm64 | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 596 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and Success.
| static DecodeStatus DecodeFMOVLaneInstruction | ( | llvm::MCInst & | Inst, |
| unsigned | Insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 660 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeFPR128RegisterClass(), DecodeGPR64RegisterClass(), and Success.
| static DecodeStatus DecodeFPR128_loRegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 273 of file AArch64Disassembler.cpp.
References DecodeFPR128RegisterClass(), and Fail.
| static DecodeStatus DecodeFPR128RegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 262 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, FPR128DecoderTable, Register, and Success.
Referenced by DecodeFMOVLaneInstruction(), DecodeFPR128_loRegisterClass(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
| static DecodeStatus DecodeFPR16RegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 333 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, FPR16DecoderTable, Register, and Success.
Referenced by DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
| static DecodeStatus DecodeFPR32RegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 312 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, FPR32DecoderTable, Register, and Success.
Referenced by DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
| static DecodeStatus DecodeFPR64RegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 291 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, FPR64DecoderTable, Register, and Success.
Referenced by DecodeModImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
| static DecodeStatus DecodeFPR8RegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 354 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, FPR8DecoderTable, Register, and Success.
Referenced by DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
| static DecodeStatus DecodeGPR32RegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 408 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, GPR32DecoderTable, Register, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeBaseAddSubImm(), DecodeExclusiveLdStInstruction(), DecodeLogicalImmInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().
| static DecodeStatus DecodeGPR32spRegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 419 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, GPR32DecoderTable, Register, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeBaseAddSubImm(), and DecodeLogicalImmInstruction().
| static DecodeStatus DecodeGPR64RegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 375 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, GPR64DecoderTable, Register, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAdrInstruction(), DecodeBaseAddSubImm(), DecodeExclusiveLdStInstruction(), DecodeFMOVLaneInstruction(), DecodeLogicalImmInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().
| static DecodeStatus DecodeGPR64spRegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 386 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, GPR64DecoderTable, Register, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeBaseAddSubImm(), DecodeExclusiveLdStInstruction(), DecodeLogicalImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
| static DecodeStatus DecodeLogicalImmInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1355 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
| static DecodeStatus DecodeMemExtend | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 619 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and Success.
| static DecodeStatus DecodeModImmInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1386 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeFPR64RegisterClass(), DecodeVectorRegisterClass(), llvm::MCInst::getOpcode(), and Success.
| static DecodeStatus DecodeModImmTiedInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1425 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeVectorRegisterClass(), and Success.
| static DecodeStatus DecodeMoveImmInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 815 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), Fail, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), and Success.
| static DecodeStatus DecodeMRSSystemRegister | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 626 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), and Success.
| static DecodeStatus DecodeMSRSystemRegister | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 643 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), and Success.
| static DecodeStatus DecodePairLdStInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1169 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeFPR128RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), SoftFail, and Success.
| static DecodeStatus DecodePCRelLabel19 | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 603 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), llvm::MCInst::getOpcode(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
| static DecodeStatus DecodeQQQQRegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 510 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, QQQQDecoderTable, Register, and Success.
| static DecodeStatus DecodeQQQRegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 487 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, QQQDecoderTable, Register, and Success.
| static DecodeStatus DecodeQQRegisterClass | ( | llvm::MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 464 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, QQDecoderTable, Register, and Success.
| static DecodeStatus DecodeSignedLdStInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 909 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), SoftFail, and Success.
| static DecodeStatus DecodeSystemPStateInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1515 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), Fail, Success, and llvm::AArch64NamedImmMapper::toString().
| static DecodeStatus DecodeTestAndBranch | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1533 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
| static DecodeStatus DecodeThreeAddrSRegInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 753 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), Fail, llvm::MCInst::getOpcode(), and Success.
| static DecodeStatus DecodeUnconditionalBranch | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 1498 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
| static DecodeStatus DecodeUnsignedLdStInstruction | ( | llvm::MCInst & | Inst, |
| uint32_t | insn, | ||
| uint64_t | Address, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 848 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
| static DecodeStatus DecodeVecShiftL16Imm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 743 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
| static DecodeStatus DecodeVecShiftL32Imm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 738 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
| static DecodeStatus DecodeVecShiftL64Imm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 733 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
| static DecodeStatus DecodeVecShiftL8Imm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 748 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
| static DecodeStatus DecodeVecShiftLImm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| unsigned | Add | ||
| ) | [static] |
Definition at line 689 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and Success.
Referenced by DecodeVecShiftL16Imm(), DecodeVecShiftL32Imm(), DecodeVecShiftL64Imm(), and DecodeVecShiftL8Imm().
| static DecodeStatus DecodeVecShiftR16Imm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 717 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
| static DecodeStatus DecodeVecShiftR16ImmNarrow | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 722 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
| static DecodeStatus DecodeVecShiftR32Imm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 706 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
| static DecodeStatus DecodeVecShiftR32ImmNarrow | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 711 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
| static DecodeStatus DecodeVecShiftR64Imm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 695 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
| static DecodeStatus DecodeVecShiftR64ImmNarrow | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 700 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
| static DecodeStatus DecodeVecShiftR8Imm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 728 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
| static DecodeStatus DecodeVecShiftRImm | ( | llvm::MCInst & | Inst, |
| unsigned | Imm, | ||
| unsigned | Add | ||
| ) | [static] |
Definition at line 683 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateImm(), and Success.
Referenced by DecodeVecShiftR16Imm(), DecodeVecShiftR16ImmNarrow(), DecodeVecShiftR32Imm(), DecodeVecShiftR32ImmNarrow(), DecodeVecShiftR64Imm(), DecodeVecShiftR64ImmNarrow(), and DecodeVecShiftR8Imm().
| static DecodeStatus DecodeVectorRegisterClass | ( | MCInst & | Inst, |
| unsigned | RegNo, | ||
| uint64_t | Addr, | ||
| const void * | Decoder | ||
| ) | [static] |
Definition at line 442 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::CreateReg(), Fail, Register, Success, and VectorDecoderTable.
Referenced by DecodeModImmInstruction(), and DecodeModImmTiedInstruction().
| void LLVMInitializeAArch64Disassembler | ( | ) |
Definition at line 236 of file AArch64Disassembler.cpp.
References createAArch64Disassembler(), createAArch64ExternalSymbolizer(), llvm::TargetRegistry::RegisterMCDisassembler(), llvm::TargetRegistry::RegisterMCSymbolizer(), llvm::TheAArch64beTarget, llvm::TheAArch64leTarget, and llvm::TheARM64Target.
Variable Documentation
const unsigned DDDDDecoderTable[] [static] |
{
AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5,
AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8,
AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11,
AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14,
AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17,
AArch64::D15_D16_D17_D18, AArch64::D16_D17_D18_D19, AArch64::D17_D18_D19_D20,
AArch64::D18_D19_D20_D21, AArch64::D19_D20_D21_D22, AArch64::D20_D21_D22_D23,
AArch64::D21_D22_D23_D24, AArch64::D22_D23_D24_D25, AArch64::D23_D24_D25_D26,
AArch64::D24_D25_D26_D27, AArch64::D25_D26_D27_D28, AArch64::D26_D27_D28_D29,
AArch64::D27_D28_D29_D30, AArch64::D28_D29_D30_D31, AArch64::D29_D30_D31_D0,
AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2
}
Definition at line 563 of file AArch64Disassembler.cpp.
Referenced by DecodeDDDDRegisterClass().
const unsigned DDDDecoderTable[] [static] |
{
AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4,
AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7,
AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10,
AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13,
AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16,
AArch64::D15_D16_D17, AArch64::D16_D17_D18, AArch64::D17_D18_D19,
AArch64::D18_D19_D20, AArch64::D19_D20_D21, AArch64::D20_D21_D22,
AArch64::D21_D22_D23, AArch64::D22_D23_D24, AArch64::D23_D24_D25,
AArch64::D24_D25_D26, AArch64::D25_D26_D27, AArch64::D26_D27_D28,
AArch64::D27_D28_D29, AArch64::D28_D29_D30, AArch64::D29_D30_D31,
AArch64::D30_D31_D0, AArch64::D31_D0_D1
}
Definition at line 540 of file AArch64Disassembler.cpp.
Referenced by DecodeDDDRegisterClass().
const unsigned DDDecoderTable[] [static] |
{
AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4,
AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8,
AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12,
AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, AArch64::D15_D16,
AArch64::D16_D17, AArch64::D17_D18, AArch64::D18_D19, AArch64::D19_D20,
AArch64::D20_D21, AArch64::D21_D22, AArch64::D22_D23, AArch64::D23_D24,
AArch64::D24_D25, AArch64::D25_D26, AArch64::D26_D27, AArch64::D27_D28,
AArch64::D28_D29, AArch64::D29_D30, AArch64::D30_D31, AArch64::D31_D0
}
Definition at line 520 of file AArch64Disassembler.cpp.
Referenced by DecodeDDRegisterClass().
const unsigned FPR128DecoderTable[] [static] |
{
AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4,
AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9,
AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14,
AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29,
AArch64::Q30, AArch64::Q31
}
Definition at line 252 of file AArch64Disassembler.cpp.
Referenced by DecodeFPR128RegisterClass().
const unsigned FPR16DecoderTable[] [static] |
{
AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4,
AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9,
AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14,
AArch64::H15, AArch64::H16, AArch64::H17, AArch64::H18, AArch64::H19,
AArch64::H20, AArch64::H21, AArch64::H22, AArch64::H23, AArch64::H24,
AArch64::H25, AArch64::H26, AArch64::H27, AArch64::H28, AArch64::H29,
AArch64::H30, AArch64::H31
}
Definition at line 323 of file AArch64Disassembler.cpp.
Referenced by DecodeFPR16RegisterClass().
const unsigned FPR32DecoderTable[] [static] |
{
AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4,
AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9,
AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14,
AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19,
AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24,
AArch64::S25, AArch64::S26, AArch64::S27, AArch64::S28, AArch64::S29,
AArch64::S30, AArch64::S31
}
Definition at line 302 of file AArch64Disassembler.cpp.
Referenced by DecodeFPR32RegisterClass().
const unsigned FPR64DecoderTable[] [static] |
{
AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4,
AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9,
AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14,
AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19,
AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24,
AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29,
AArch64::D30, AArch64::D31
}
Definition at line 281 of file AArch64Disassembler.cpp.
Referenced by DecodeFPR64RegisterClass().
const unsigned FPR8DecoderTable[] [static] |
{
AArch64::B0, AArch64::B1, AArch64::B2, AArch64::B3, AArch64::B4,
AArch64::B5, AArch64::B6, AArch64::B7, AArch64::B8, AArch64::B9,
AArch64::B10, AArch64::B11, AArch64::B12, AArch64::B13, AArch64::B14,
AArch64::B15, AArch64::B16, AArch64::B17, AArch64::B18, AArch64::B19,
AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24,
AArch64::B25, AArch64::B26, AArch64::B27, AArch64::B28, AArch64::B29,
AArch64::B30, AArch64::B31
}
Definition at line 344 of file AArch64Disassembler.cpp.
Referenced by DecodeFPR8RegisterClass().
const unsigned GPR32DecoderTable[] [static] |
{
AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4,
AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9,
AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14,
AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19,
AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24,
AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29,
AArch64::W30, AArch64::WZR
}
Definition at line 398 of file AArch64Disassembler.cpp.
Referenced by DecodeGPR32RegisterClass(), and DecodeGPR32spRegisterClass().
const unsigned GPR64DecoderTable[] [static] |
{
AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4,
AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9,
AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14,
AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19,
AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24,
AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP,
AArch64::LR, AArch64::XZR
}
Definition at line 365 of file AArch64Disassembler.cpp.
Referenced by DecodeGPR64RegisterClass(), and DecodeGPR64spRegisterClass().
const unsigned QQDecoderTable[] [static] |
{
AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4,
AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8,
AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12,
AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q15_Q16,
AArch64::Q16_Q17, AArch64::Q17_Q18, AArch64::Q18_Q19, AArch64::Q19_Q20,
AArch64::Q20_Q21, AArch64::Q21_Q22, AArch64::Q22_Q23, AArch64::Q23_Q24,
AArch64::Q24_Q25, AArch64::Q25_Q26, AArch64::Q26_Q27, AArch64::Q27_Q28,
AArch64::Q28_Q29, AArch64::Q29_Q30, AArch64::Q30_Q31, AArch64::Q31_Q0
}
Definition at line 453 of file AArch64Disassembler.cpp.
Referenced by DecodeQQRegisterClass().
const unsigned QQQDecoderTable[] [static] |
{
AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4,
AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7,
AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10,
AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13,
AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16,
AArch64::Q15_Q16_Q17, AArch64::Q16_Q17_Q18, AArch64::Q17_Q18_Q19,
AArch64::Q18_Q19_Q20, AArch64::Q19_Q20_Q21, AArch64::Q20_Q21_Q22,
AArch64::Q21_Q22_Q23, AArch64::Q22_Q23_Q24, AArch64::Q23_Q24_Q25,
AArch64::Q24_Q25_Q26, AArch64::Q25_Q26_Q27, AArch64::Q26_Q27_Q28,
AArch64::Q27_Q28_Q29, AArch64::Q28_Q29_Q30, AArch64::Q29_Q30_Q31,
AArch64::Q30_Q31_Q0, AArch64::Q31_Q0_Q1
}
Definition at line 473 of file AArch64Disassembler.cpp.
Referenced by DecodeQQQRegisterClass().
const unsigned QQQQDecoderTable[] [static] |
{
AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5,
AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8,
AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11,
AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14,
AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17,
AArch64::Q15_Q16_Q17_Q18, AArch64::Q16_Q17_Q18_Q19, AArch64::Q17_Q18_Q19_Q20,
AArch64::Q18_Q19_Q20_Q21, AArch64::Q19_Q20_Q21_Q22, AArch64::Q20_Q21_Q22_Q23,
AArch64::Q21_Q22_Q23_Q24, AArch64::Q22_Q23_Q24_Q25, AArch64::Q23_Q24_Q25_Q26,
AArch64::Q24_Q25_Q26_Q27, AArch64::Q25_Q26_Q27_Q28, AArch64::Q26_Q27_Q28_Q29,
AArch64::Q27_Q28_Q29_Q30, AArch64::Q28_Q29_Q30_Q31, AArch64::Q29_Q30_Q31_Q0,
AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2
}
Definition at line 496 of file AArch64Disassembler.cpp.
Referenced by DecodeQQQQRegisterClass().
const unsigned VectorDecoderTable[] [static] |
{
AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4,
AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9,
AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14,
AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29,
AArch64::Q30, AArch64::Q31
}
Definition at line 432 of file AArch64Disassembler.cpp.
Referenced by DecodeVectorRegisterClass().
1.7.6.1