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atarilance.c File Reference
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/module.h>
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/skbuff.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/bitops.h>
#include <asm/setup.h>
#include <asm/irq.h>
#include <asm/atarihw.h>
#include <asm/atariints.h>
#include <asm/io.h>

Go to the source code of this file.

Data Structures

struct  lance_rx_head
 
struct  lance_tx_head
 
struct  ringdesc
 
struct  lance_init_block
 
struct  lance_memory
 
struct  lance_ioreg
 
struct  lance_private
 
struct  lance_addr
 

Macros

#define LANCE_DEBUG   1
 
#define DPRINTK(n, a)
 
#define PROBE_PRINT(a)
 
#define TX_LOG_RING_SIZE   3
 
#define RX_LOG_RING_SIZE   5
 
#define TX_RING_SIZE   (1 << TX_LOG_RING_SIZE)
 
#define TX_RING_LEN_BITS   (TX_LOG_RING_SIZE << 5)
 
#define TX_RING_MOD_MASK   (TX_RING_SIZE - 1)
 
#define RX_RING_SIZE   (1 << RX_LOG_RING_SIZE)
 
#define RX_RING_LEN_BITS   (RX_LOG_RING_SIZE << 5)
 
#define RX_RING_MOD_MASK   (RX_RING_SIZE - 1)
 
#define TX_TIMEOUT   (HZ/5)
 
#define RIEBL_RSVD_START   0xee70
 
#define RIEBL_RSVD_END   0xeec0
 
#define RIEBL_MAGIC   0x09051990
 
#define RIEBL_MAGIC_ADDR   ((unsigned long *)(((char *)MEM) + 0xee8a))
 
#define RIEBL_HWADDR_ADDR   ((unsigned char *)(((char *)MEM) + 0xee8e))
 
#define RIEBL_IVEC_ADDR   ((unsigned short *)(((char *)MEM) + 0xfffe))
 
#define MEM   lp->mem
 
#define DREG   IO->data
 
#define AREG   IO->addr
 
#define REGA(a)   (*( AREG = (a), &DREG ))
 
#define PKT_BUF_SZ   1544
 
#define PKTBUF_ADDR(head)   (((unsigned char *)(MEM)) + (head)->base)
 
#define N_LANCE_ADDR   ARRAY_SIZE(lance_addr_list)
 
#define TMD1_ENP   0x01 /* end of packet */
 
#define TMD1_STP   0x02 /* start of packet */
 
#define TMD1_DEF   0x04 /* deferred */
 
#define TMD1_ONE   0x08 /* one retry needed */
 
#define TMD1_MORE   0x10 /* more than one retry needed */
 
#define TMD1_ERR   0x40 /* error summary */
 
#define TMD1_OWN   0x80 /* ownership (set: chip owns) */
 
#define TMD1_OWN_CHIP   TMD1_OWN
 
#define TMD1_OWN_HOST   0
 
#define TMD3_TDR   0x03FF /* Time Domain Reflectometry counter */
 
#define TMD3_RTRY   0x0400 /* failed after 16 retries */
 
#define TMD3_LCAR   0x0800 /* carrier lost */
 
#define TMD3_LCOL   0x1000 /* late collision */
 
#define TMD3_UFLO   0x4000 /* underflow (late memory) */
 
#define TMD3_BUFF   0x8000 /* buffering error (no ENP) */
 
#define RMD1_ENP   0x01 /* end of packet */
 
#define RMD1_STP   0x02 /* start of packet */
 
#define RMD1_BUFF   0x04 /* buffer error */
 
#define RMD1_CRC   0x08 /* CRC error */
 
#define RMD1_OFLO   0x10 /* overflow */
 
#define RMD1_FRAM   0x20 /* framing error */
 
#define RMD1_ERR   0x40 /* error summary */
 
#define RMD1_OWN   0x80 /* ownership (set: ship owns) */
 
#define RMD1_OWN_CHIP   RMD1_OWN
 
#define RMD1_OWN_HOST   0
 
#define CSR0   0 /* mode/status */
 
#define CSR1   1 /* init block addr (low) */
 
#define CSR2   2 /* init block addr (high) */
 
#define CSR3   3 /* misc */
 
#define CSR8   8 /* address filter */
 
#define CSR15   15 /* promiscuous mode */
 
#define CSR0_INIT   0x0001 /* initialize (RS) */
 
#define CSR0_STRT   0x0002 /* start (RS) */
 
#define CSR0_STOP   0x0004 /* stop (RS) */
 
#define CSR0_TDMD   0x0008 /* transmit demand (RS) */
 
#define CSR0_TXON   0x0010 /* transmitter on (R) */
 
#define CSR0_RXON   0x0020 /* receiver on (R) */
 
#define CSR0_INEA   0x0040 /* interrupt enable (RW) */
 
#define CSR0_INTR   0x0080 /* interrupt active (R) */
 
#define CSR0_IDON   0x0100 /* initialization done (RC) */
 
#define CSR0_TINT   0x0200 /* transmitter interrupt (RC) */
 
#define CSR0_RINT   0x0400 /* receiver interrupt (RC) */
 
#define CSR0_MERR   0x0800 /* memory error (RC) */
 
#define CSR0_MISS   0x1000 /* missed frame (RC) */
 
#define CSR0_CERR   0x2000 /* carrier error (no heartbeat :-) (RC) */
 
#define CSR0_BABL   0x4000 /* babble: tx-ed too many bits (RC) */
 
#define CSR0_ERR   0x8000 /* error (RC) */
 
#define CSR3_BCON   0x0001 /* byte control */
 
#define CSR3_ACON   0x0002 /* ALE control */
 
#define CSR3_BSWP   0x0004 /* byte swap (1=big endian) */
 
#define CHECK_OFFSET(o)
 

Enumerations

enum  lance_type { OLD_RIEBL, NEW_RIEBL, PAM_CARD }
 

Functions

 module_param (lance_debug, int, 0)
 
 MODULE_PARM_DESC (lance_debug,"atarilance debug level (0-3)")
 
 MODULE_LICENSE ("GPL")
 
struct net_device *__init atarilance_probe (int unit)
 

Macro Definition Documentation

#define AREG   IO->addr

Definition at line 235 of file atarilance.c.

#define CHECK_OFFSET (   o)
Value:
do { \
if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \
: (o) < RIEBL_RSVD_END) \
(o) = RIEBL_RSVD_END; \
} \
} while(0)
#define CSR0   0 /* mode/status */

Definition at line 303 of file atarilance.c.

#define CSR0_BABL   0x4000 /* babble: tx-ed too many bits (RC) */

Definition at line 326 of file atarilance.c.

#define CSR0_CERR   0x2000 /* carrier error (no heartbeat :-) (RC) */

Definition at line 325 of file atarilance.c.

#define CSR0_ERR   0x8000 /* error (RC) */

Definition at line 327 of file atarilance.c.

#define CSR0_IDON   0x0100 /* initialization done (RC) */

Definition at line 320 of file atarilance.c.

#define CSR0_INEA   0x0040 /* interrupt enable (RW) */

Definition at line 318 of file atarilance.c.

#define CSR0_INIT   0x0001 /* initialize (RS) */

Definition at line 312 of file atarilance.c.

#define CSR0_INTR   0x0080 /* interrupt active (R) */

Definition at line 319 of file atarilance.c.

#define CSR0_MERR   0x0800 /* memory error (RC) */

Definition at line 323 of file atarilance.c.

#define CSR0_MISS   0x1000 /* missed frame (RC) */

Definition at line 324 of file atarilance.c.

#define CSR0_RINT   0x0400 /* receiver interrupt (RC) */

Definition at line 322 of file atarilance.c.

#define CSR0_RXON   0x0020 /* receiver on (R) */

Definition at line 317 of file atarilance.c.

#define CSR0_STOP   0x0004 /* stop (RS) */

Definition at line 314 of file atarilance.c.

#define CSR0_STRT   0x0002 /* start (RS) */

Definition at line 313 of file atarilance.c.

#define CSR0_TDMD   0x0008 /* transmit demand (RS) */

Definition at line 315 of file atarilance.c.

#define CSR0_TINT   0x0200 /* transmitter interrupt (RC) */

Definition at line 321 of file atarilance.c.

#define CSR0_TXON   0x0010 /* transmitter on (R) */

Definition at line 316 of file atarilance.c.

#define CSR1   1 /* init block addr (low) */

Definition at line 304 of file atarilance.c.

#define CSR15   15 /* promiscuous mode */

Definition at line 308 of file atarilance.c.

#define CSR2   2 /* init block addr (high) */

Definition at line 305 of file atarilance.c.

#define CSR3   3 /* misc */

Definition at line 306 of file atarilance.c.

#define CSR3_ACON   0x0002 /* ALE control */

Definition at line 331 of file atarilance.c.

#define CSR3_BCON   0x0001 /* byte control */

Definition at line 330 of file atarilance.c.

#define CSR3_BSWP   0x0004 /* byte swap (1=big endian) */

Definition at line 332 of file atarilance.c.

#define CSR8   8 /* address filter */

Definition at line 307 of file atarilance.c.

#define DPRINTK (   n,
  a 
)
Value:
do { \
if (lance_debug >= n) \
printk a; \
} while( 0 )

Definition at line 87 of file atarilance.c.

#define DREG   IO->data

Definition at line 234 of file atarilance.c.

#define LANCE_DEBUG   1

Definition at line 73 of file atarilance.c.

#define MEM   lp->mem

Definition at line 233 of file atarilance.c.

#define N_LANCE_ADDR   ARRAY_SIZE(lance_addr_list)

Definition at line 264 of file atarilance.c.

#define PKT_BUF_SZ   1544

Definition at line 239 of file atarilance.c.

#define PKTBUF_ADDR (   head)    (((unsigned char *)(MEM)) + (head)->base)

Definition at line 241 of file atarilance.c.

#define PROBE_PRINT (   a)

Definition at line 96 of file atarilance.c.

#define REGA (   a)    (*( AREG = (a), &DREG ))

Definition at line 236 of file atarilance.c.

#define RIEBL_HWADDR_ADDR   ((unsigned char *)(((char *)MEM) + 0xee8e))

Definition at line 176 of file atarilance.c.

#define RIEBL_IVEC_ADDR   ((unsigned short *)(((char *)MEM) + 0xfffe))

Definition at line 177 of file atarilance.c.

#define RIEBL_MAGIC   0x09051990

Definition at line 174 of file atarilance.c.

#define RIEBL_MAGIC_ADDR   ((unsigned long *)(((char *)MEM) + 0xee8a))

Definition at line 175 of file atarilance.c.

#define RIEBL_RSVD_END   0xeec0

Definition at line 173 of file atarilance.c.

#define RIEBL_RSVD_START   0xee70

Definition at line 172 of file atarilance.c.

#define RMD1_BUFF   0x04 /* buffer error */

Definition at line 292 of file atarilance.c.

#define RMD1_CRC   0x08 /* CRC error */

Definition at line 293 of file atarilance.c.

#define RMD1_ENP   0x01 /* end of packet */

Definition at line 290 of file atarilance.c.

#define RMD1_ERR   0x40 /* error summary */

Definition at line 296 of file atarilance.c.

#define RMD1_FRAM   0x20 /* framing error */

Definition at line 295 of file atarilance.c.

#define RMD1_OFLO   0x10 /* overflow */

Definition at line 294 of file atarilance.c.

#define RMD1_OWN   0x80 /* ownership (set: ship owns) */

Definition at line 297 of file atarilance.c.

#define RMD1_OWN_CHIP   RMD1_OWN

Definition at line 299 of file atarilance.c.

#define RMD1_OWN_HOST   0

Definition at line 300 of file atarilance.c.

#define RMD1_STP   0x02 /* start of packet */

Definition at line 291 of file atarilance.c.

#define RX_LOG_RING_SIZE   5

Definition at line 107 of file atarilance.c.

#define RX_RING_LEN_BITS   (RX_LOG_RING_SIZE << 5)

Definition at line 116 of file atarilance.c.

#define RX_RING_MOD_MASK   (RX_RING_SIZE - 1)

Definition at line 117 of file atarilance.c.

#define RX_RING_SIZE   (1 << RX_LOG_RING_SIZE)

Definition at line 115 of file atarilance.c.

#define TMD1_DEF   0x04 /* deferred */

Definition at line 272 of file atarilance.c.

#define TMD1_ENP   0x01 /* end of packet */

Definition at line 270 of file atarilance.c.

#define TMD1_ERR   0x40 /* error summary */

Definition at line 275 of file atarilance.c.

#define TMD1_MORE   0x10 /* more than one retry needed */

Definition at line 274 of file atarilance.c.

#define TMD1_ONE   0x08 /* one retry needed */

Definition at line 273 of file atarilance.c.

#define TMD1_OWN   0x80 /* ownership (set: chip owns) */

Definition at line 276 of file atarilance.c.

#define TMD1_OWN_CHIP   TMD1_OWN

Definition at line 278 of file atarilance.c.

#define TMD1_OWN_HOST   0

Definition at line 279 of file atarilance.c.

#define TMD1_STP   0x02 /* start of packet */

Definition at line 271 of file atarilance.c.

#define TMD3_BUFF   0x8000 /* buffering error (no ENP) */

Definition at line 287 of file atarilance.c.

#define TMD3_LCAR   0x0800 /* carrier lost */

Definition at line 284 of file atarilance.c.

#define TMD3_LCOL   0x1000 /* late collision */

Definition at line 285 of file atarilance.c.

#define TMD3_RTRY   0x0400 /* failed after 16 retries */

Definition at line 283 of file atarilance.c.

#define TMD3_TDR   0x03FF /* Time Domain Reflectometry counter */

Definition at line 282 of file atarilance.c.

#define TMD3_UFLO   0x4000 /* underflow (late memory) */

Definition at line 286 of file atarilance.c.

#define TX_LOG_RING_SIZE   3

Definition at line 106 of file atarilance.c.

#define TX_RING_LEN_BITS   (TX_LOG_RING_SIZE << 5)

Definition at line 112 of file atarilance.c.

#define TX_RING_MOD_MASK   (TX_RING_SIZE - 1)

Definition at line 113 of file atarilance.c.

#define TX_RING_SIZE   (1 << TX_LOG_RING_SIZE)

Definition at line 111 of file atarilance.c.

#define TX_TIMEOUT   (HZ/5)

Definition at line 119 of file atarilance.c.

Enumeration Type Documentation

enum lance_type
Enumerator:
OLD_RIEBL 
NEW_RIEBL 
PAM_CARD 

Definition at line 204 of file atarilance.c.

Function Documentation

struct net_device* __init atarilance_probe ( int  unit)
read

Definition at line 369 of file atarilance.c.

MODULE_LICENSE ( "GPL"  )
module_param ( lance_debug  ,
int  ,
 
)
MODULE_PARM_DESC ( lance_debug  ,
"atarilance debug level (0-3)"   
)