21 #define ehci_dbg(ehci, fmt, args...) \
22 dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
23 #define ehci_err(ehci, fmt, args...) \
24 dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
25 #define ehci_info(ehci, fmt, args...) \
26 dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
27 #define ehci_warn(ehci, fmt, args...) \
28 dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
31 # define ehci_vdbg ehci_dbg
33 static inline void ehci_vdbg(
struct ehci_hcd *ehci, ...) {}
42 static void dbg_hcs_params (
struct ehci_hcd *ehci,
char *
label)
47 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
54 HCS_PPC (params) ?
"" :
" !ppc",
65 byte =
readb (&ehci->
caps->portroute[(i>>1)]);
67 ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
76 static inline void dbg_hcs_params (
struct ehci_hcd *ehci,
char *label) {}
86 static void dbg_hcc_params (
struct ehci_hcd *ehci,
char *label)
88 u32 params = ehci_readl(ehci, &ehci->
caps->hcc_params);
92 "%s hcc_params %04x caching frame %s%s%s\n",
99 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
110 " 32 periodic list" :
"");
115 static inline void dbg_hcc_params (
struct ehci_hcd *ehci,
char *label) {}
124 ehci_dbg(ehci,
"%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
125 hc32_to_cpup(ehci, &qtd->
hw_next),
128 hc32_to_cpup(ehci, &qtd->
hw_buf [0]));
130 ehci_dbg(ehci,
" p1=%08x p2=%08x p3=%08x p4=%08x\n",
131 hc32_to_cpup(ehci, &qtd->
hw_buf[1]),
132 hc32_to_cpup(ehci, &qtd->
hw_buf[2]),
133 hc32_to_cpup(ehci, &qtd->
hw_buf[3]),
134 hc32_to_cpup(ehci, &qtd->
hw_buf[4]));
142 ehci_dbg (ehci,
"%s qh %p n%08x info %x %x qtd %x\n", label,
150 ehci_dbg (ehci,
"%s [%d] itd %p, next %08x, urb %p\n",
154 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
164 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
172 ehci_dbg (ehci,
" index: %d %d %d %d %d %d %d %d\n",
181 ehci_dbg (ehci,
"%s [%d] sitd %p, next %08x, urb %p\n",
185 " addr %08x sched %04x result %08x buf %08x %08x\n",
194 dbg_status_buf (
char *buf,
unsigned len,
const char *label,
u32 status)
197 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
198 label, label [0] ?
" " :
"", status,
200 (status &
STS_ASS) ?
" Async" :
"",
201 (status &
STS_PSS) ?
" Periodic" :
"",
204 (status &
STS_IAA) ?
" IAA" :
"",
206 (status &
STS_FLR) ?
" FLR" :
"",
207 (status &
STS_PCD) ?
" PCD" :
"",
208 (status &
STS_ERR) ?
" ERR" :
"",
209 (status &
STS_INT) ?
" INT" :
""
214 dbg_intr_buf (
char *buf,
unsigned len,
const char *label,
u32 enable)
217 "%s%sintrenable %02x%s%s%s%s%s%s%s",
218 label, label [0] ?
" " :
"", enable,
219 (enable & STS_PPCE_MASK) ?
" PPCE" :
"",
220 (enable & STS_IAA) ?
" IAA" :
"",
221 (enable & STS_FATAL) ?
" FATAL" :
"",
222 (enable & STS_FLR) ?
" FLR" :
"",
223 (enable & STS_PCD) ?
" PCD" :
"",
224 (enable &
STS_ERR) ?
" ERR" :
"",
225 (enable &
STS_INT) ?
" INT" :
""
229 static const char *
const fls_strings [] =
230 {
"1024",
"512",
"256",
"??" };
233 dbg_command_buf (
char *buf,
unsigned len,
const char *label,
u32 command)
236 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
238 label, label [0] ?
" " :
"", command,
239 (command &
CMD_HIRD) ?
" HIRD" :
"",
241 (command &
CMD_FSP) ?
" FSP" :
"",
242 (command &
CMD_ASPE) ?
" ASPE" :
"",
243 (command &
CMD_PSPE) ?
" PSPE" :
"",
244 (command &
CMD_PARK) ?
" park" :
"(park)",
246 (command >> 16) & 0x3f,
248 (command &
CMD_IAAD) ?
" IAAD" :
"",
249 (command &
CMD_ASE) ?
" Async" :
"",
250 (command &
CMD_PSE) ?
" Periodic" :
"",
251 fls_strings [(command >> 2) & 0x3],
253 (command &
CMD_RUN) ?
"RUN" :
"HALT"
258 dbg_port_buf (
char *buf,
unsigned len,
const char *label,
int port,
u32 status)
263 switch (status & (3 << 10)) {
264 case 0 << 10: sig =
"se0";
break;
265 case 1 << 10: sig =
"k";
break;
266 case 2 << 10: sig =
"j";
break;
267 default: sig =
"?";
break;
271 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
272 "sig=%s%s%s%s%s%s%s%s%s%s%s",
273 label, label [0] ?
" " :
"", port, status,
291 (status &
PORT_OC) ?
" OC" :
"",
293 (status &
PORT_PE) ?
" PE" :
"",
304 dbg_status_buf (
char *buf,
unsigned len,
const char *label,
u32 status)
308 dbg_command_buf (
char *buf,
unsigned len,
const char *label,
u32 command)
312 dbg_intr_buf (
char *buf,
unsigned len,
const char *label,
u32 enable)
316 dbg_port_buf (
char *buf,
unsigned len,
const char *label,
int port,
u32 status)
322 #define dbg_status(ehci, label, status) { \
324 dbg_status_buf (_buf, sizeof _buf, label, status); \
325 ehci_dbg (ehci, "%s\n", _buf); \
328 #define dbg_cmd(ehci, label, command) { \
330 dbg_command_buf (_buf, sizeof _buf, label, command); \
331 ehci_dbg (ehci, "%s\n", _buf); \
334 #define dbg_port(ehci, label, port, status) { \
336 dbg_port_buf (_buf, sizeof _buf, label, port, status); \
337 ehci_dbg (ehci, "%s\n", _buf); \
342 #ifdef STUB_DEBUG_FILES
351 static int debug_async_open(
struct inode *,
struct file *);
352 static int debug_periodic_open(
struct inode *,
struct file *);
353 static int debug_registers_open(
struct inode *,
struct file *);
354 static int debug_async_open(
struct inode *,
struct file *);
355 static ssize_t debug_lpm_read(
struct file *
file,
char __user *user_buf,
356 size_t count, loff_t *ppos);
358 size_t count, loff_t *ppos);
362 static int debug_close(
struct inode *,
struct file *);
366 .open = debug_async_open,
368 .release = debug_close,
373 .open = debug_periodic_open,
375 .release = debug_close,
380 .open = debug_registers_open,
382 .release = debug_close,
388 .read = debug_lpm_read,
389 .write = debug_lpm_write,
390 .release = debug_lpm_close,
394 static struct dentry *ehci_debug_root;
405 #define speed_char(info1) ({ char tmp; \
406 switch (info1 & (3 << 12)) { \
407 case QH_FULL_SPEED: tmp = 'f'; break; \
408 case QH_LOW_SPEED: tmp = 'l'; break; \
409 case QH_HIGH_SPEED: tmp = 'h'; break; \
410 default: tmp = '?'; break; \
427 static void qh_lines (
439 unsigned size = *sizep;
448 mark = token_mark(ehci, hw->
hw_token);
451 == ehci->
async->hw->hw_alt_next)
457 scratch = hc32_to_cpup(ehci, &hw->
hw_info1);
458 hw_curr = (mark ==
'*') ? hc32_to_cpup(ehci, &hw->
hw_current) : 0;
460 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
461 qh, scratch & 0x007f,
463 (scratch >> 8) & 0x000f,
464 scratch, hc32_to_cpup(ehci, &hw->
hw_info2),
465 hc32_to_cpup(ehci, &hw->
hw_token), mark,
468 (hc32_to_cpup(ehci, &hw->
hw_alt_next) >> 1) & 0x0f);
475 scratch = hc32_to_cpup(ehci, &td->
hw_token);
488 "\n\t%p%c%s len=%d %08x urb %p",
489 td, mark, ({
char *
tmp;
490 switch ((scratch>>8)&0x03) {
491 case 0: tmp =
"out";
break;
492 case 1: tmp =
"in";
break;
493 case 2: tmp =
"setup";
break;
494 default: tmp =
"?";
break;
496 (scratch >> 16) & 0x7fff,
527 hcd = bus_to_hcd(buf->
bus);
528 ehci = hcd_to_ehci (hcd);
539 for (qh = ehci->
async->qh_next.qh; size > 0 && qh; qh = qh->
qh_next.
qh)
540 qh_lines (ehci, qh, &next, &size);
542 temp =
scnprintf(next, size,
"\nunlink =\n");
548 qh_lines (ehci, qh, &next, &size);
550 spin_unlock_irqrestore (&ehci->
lock, flags);
555 #define DBG_SCHED_LIMIT 64
571 hcd = bus_to_hcd(buf->
bus);
572 ehci = hcd_to_ehci (hcd);
590 temp =
scnprintf (next, size,
"%4d: ", i);
600 temp =
scnprintf (next, size,
" qh%d-%04x/%p",
610 for (temp = 0; temp < seen_count; temp++) {
611 if (seen [temp].
ptr != p.
ptr)
613 if (p.
qh->qh_next.ptr) {
622 if (temp == seen_count) {
623 u32 scratch = hc32_to_cpup(ehci,
637 case 0: type =
"out";
continue;
638 case 1: type =
"in";
continue;
647 (scratch >> 8) & 0x000f, type,
648 p.
qh->usecs, p.
qh->c_usecs,
650 0x7ff & (scratch >> 16));
653 seen [seen_count++].qh = p.
qh;
661 " fstn-%8x/%p", p.
fstn->hw_prev,
664 p = p.
fstn->fstn_next;
675 p.
sitd->stream->interval,
676 hc32_to_cpup(ehci, &p.
sitd->hw_uframe)
680 p = p.
sitd->sitd_next;
691 spin_unlock_irqrestore (&ehci->
lock, flags);
696 #undef DBG_SCHED_LIMIT
698 static const char *rh_state_string(
struct ehci_hcd *ehci)
719 char *
next, scratch [80];
720 static char fmt [] =
"%*s\n";
721 static char label [] =
"";
723 hcd = bus_to_hcd(buf->
bus);
724 ehci = hcd_to_ehci (hcd);
730 if (!HCD_HW_ACCESSIBLE(hcd)) {
732 "bus %s, device %s\n"
734 "SUSPENDED (no register access)\n",
735 hcd->self.controller->bus->name,
736 dev_name(hcd->self.controller),
744 "bus %s, device %s\n"
746 "EHCI %x.%02x, rh state %s\n",
747 hcd->self.controller->bus->name,
748 dev_name(hcd->self.controller),
750 i >> 8, i & 0x0ff, rh_state_string(ehci));
759 unsigned count = 256/4;
763 &ehci->
caps->hcc_params));
764 while (offset && count--) {
765 pci_read_config_dword (pdev, offset, &cap);
766 switch (cap & 0xff) {
769 "ownership %08x%s%s\n", cap,
770 (cap & (1 << 24)) ?
" linux" :
"",
771 (cap & (1 << 16)) ?
" firmware" :
"");
776 pci_read_config_dword (pdev, offset, &cap2);
778 "SMI sts/enable 0x%08x\n", cap2);
788 temp = (cap >> 8) & 0xff;
794 i = ehci_readl(ehci, &ehci->
caps->hcs_params);
795 temp =
scnprintf (next, size,
"structural params 0x%08x\n", i);
799 i = ehci_readl(ehci, &ehci->
caps->hcc_params);
800 temp =
scnprintf (next, size,
"capability params 0x%08x\n", i);
805 temp = dbg_status_buf (scratch,
sizeof scratch, label,
806 ehci_readl(ehci, &ehci->
regs->status));
807 temp =
scnprintf (next, size, fmt, temp, scratch);
811 temp = dbg_command_buf (scratch,
sizeof scratch, label,
812 ehci_readl(ehci, &ehci->
regs->command));
813 temp =
scnprintf (next, size, fmt, temp, scratch);
817 temp = dbg_intr_buf (scratch,
sizeof scratch, label,
818 ehci_readl(ehci, &ehci->
regs->intr_enable));
819 temp =
scnprintf (next, size, fmt, temp, scratch);
823 temp =
scnprintf (next, size,
"uframe %04x\n",
824 ehci_read_frame_index(ehci));
829 temp = dbg_port_buf (scratch,
sizeof scratch, label, i,
831 &ehci->
regs->port_status[i - 1]));
832 temp =
scnprintf (next, size, fmt, temp, scratch);
837 " debug control %08x\n",
839 &ehci->
debug->control));
846 temp =
scnprintf(next, size,
"async unlink qh %p\n",
854 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
855 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
856 ehci->stats.lost_iaa);
860 temp =
scnprintf (next, size,
"complete %ld unlink %ld\n",
861 ehci->stats.complete, ehci->stats.unlink);
867 spin_unlock_irqrestore (&ehci->
lock, flags);
913 size_t len, loff_t *offset)
919 if (buf->
count == 0) {
920 ret = fill_buffer(buf);
936 static int debug_close(
struct inode *
inode,
struct file *file)
947 static int debug_async_open(
struct inode *inode,
struct file *file)
954 static int debug_periodic_open(
struct inode *inode,
struct file *file)
957 buf = alloc_buffer(inode->
i_private, fill_periodic_buffer);
966 static int debug_registers_open(
struct inode *inode,
struct file *file)
969 fill_registers_buffer);
974 static int debug_lpm_close(
struct inode *inode,
struct file *file)
979 static ssize_t debug_lpm_read(
struct file *file,
char __user *user_buf,
980 size_t count, loff_t *ppos)
986 static ssize_t debug_lpm_write(
struct file *file,
const char __user *user_buf,
987 size_t count, loff_t *ppos)
999 ehci = hcd_to_ehci(hcd);
1001 len =
min(count,
sizeof(buf) - 1);
1005 if (len > 0 && buf[len - 1] ==
'\n')
1006 buf[len - 1] =
'\0';
1008 if (
strncmp(buf,
"enable", 5) == 0) {
1011 params = ehci_readl(ehci, &ehci->
caps->hcs_params);
1013 ehci_dbg(ehci,
"ERR: LPM on bad port %lu\n", port);
1016 portsc = &ehci->
regs->port_status[port-1];
1017 temp = ehci_readl(ehci, portsc);
1019 ehci_dbg(ehci,
"LPM: no device attached\n");
1023 ehci_writel(ehci, temp, portsc);
1025 }
else if (
strncmp(buf,
"hird=", 5) == 0) {
1031 ehci_writel(ehci, ehci->
command, &ehci->
regs->command);
1032 }
else if (
strncmp(buf,
"disable", 7) == 0) {
1035 params = ehci_readl(ehci, &ehci->
caps->hcs_params);
1037 ehci_dbg(ehci,
"ERR: LPM off bad port %lu\n", port);
1040 portsc = &ehci->
regs->port_status[port-1];
1041 temp = ehci_readl(ehci, portsc);
1043 ehci_dbg(ehci,
"ERR: no device attached\n");
1047 ehci_writel(ehci, temp, portsc);
1056 struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
1059 if (!ehci->debug_dir)
1067 &debug_periodic_fops))
1071 &debug_registers_fops))