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qeth_core_main.c
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1 /*
2  * Copyright IBM Corp. 2007, 2009
3  * Author(s): Utz Bacher <[email protected]>,
4  * Frank Pavlic <[email protected]>,
5  * Thomas Spatzier <[email protected]>,
6  * Frank Blaschka <[email protected]>
7  */
8 
9 #define KMSG_COMPONENT "qeth"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11 
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/string.h>
15 #include <linux/errno.h>
16 #include <linux/kernel.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
21 #include <linux/slab.h>
22 #include <net/iucv/af_iucv.h>
23 
24 #include <asm/ebcdic.h>
25 #include <asm/io.h>
26 #include <asm/sysinfo.h>
27 #include <asm/compat.h>
28 
29 #include "qeth_core.h"
30 
32  /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33  /* N P A M L V H */
34  [QETH_DBF_SETUP] = {"qeth_setup",
35  8, 1, 8, 5, &debug_hex_ascii_view, NULL},
36  [QETH_DBF_MSG] = {"qeth_msg",
37  8, 1, 128, 3, &debug_sprintf_view, NULL},
38  [QETH_DBF_CTRL] = {"qeth_control",
40 };
41 EXPORT_SYMBOL_GPL(qeth_dbf);
42 
46 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
47 static struct kmem_cache *qeth_qdio_outbuf_cache;
48 
49 static struct device *qeth_core_root_dev;
50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
51 static struct lock_class_key qdio_out_skb_queue_key;
52 static struct mutex qeth_mod_mutex;
53 
54 static void qeth_send_control_data_cb(struct qeth_channel *,
55  struct qeth_cmd_buffer *);
56 static int qeth_issue_next_read(struct qeth_card *);
57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59 static void qeth_free_buffer_pool(struct qeth_card *);
60 static int qeth_qdio_establish(struct qeth_card *);
61 static void qeth_free_qdio_buffers(struct qeth_card *);
62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63  struct qeth_qdio_out_buffer *buf,
65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67  struct qeth_qdio_out_buffer *buf,
68  enum qeth_qdio_buffer_states newbufstate);
69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
70 
71 static inline const char *qeth_get_cardname(struct qeth_card *card)
72 {
73  if (card->info.guestlan) {
74  switch (card->info.type) {
75  case QETH_CARD_TYPE_OSD:
76  return " Guest LAN QDIO";
77  case QETH_CARD_TYPE_IQD:
78  return " Guest LAN Hiper";
79  case QETH_CARD_TYPE_OSM:
80  return " Guest LAN QDIO - OSM";
81  case QETH_CARD_TYPE_OSX:
82  return " Guest LAN QDIO - OSX";
83  default:
84  return " unknown";
85  }
86  } else {
87  switch (card->info.type) {
88  case QETH_CARD_TYPE_OSD:
89  return " OSD Express";
90  case QETH_CARD_TYPE_IQD:
91  return " HiperSockets";
92  case QETH_CARD_TYPE_OSN:
93  return " OSN QDIO";
94  case QETH_CARD_TYPE_OSM:
95  return " OSM QDIO";
96  case QETH_CARD_TYPE_OSX:
97  return " OSX QDIO";
98  default:
99  return " unknown";
100  }
101  }
102  return " n/a";
103 }
104 
105 /* max length to be returned: 14 */
106 const char *qeth_get_cardname_short(struct qeth_card *card)
107 {
108  if (card->info.guestlan) {
109  switch (card->info.type) {
110  case QETH_CARD_TYPE_OSD:
111  return "GuestLAN QDIO";
112  case QETH_CARD_TYPE_IQD:
113  return "GuestLAN Hiper";
114  case QETH_CARD_TYPE_OSM:
115  return "GuestLAN OSM";
116  case QETH_CARD_TYPE_OSX:
117  return "GuestLAN OSX";
118  default:
119  return "unknown";
120  }
121  } else {
122  switch (card->info.type) {
123  case QETH_CARD_TYPE_OSD:
124  switch (card->info.link_type) {
126  return "OSD_100";
127  case QETH_LINK_TYPE_HSTR:
128  return "HSTR";
130  return "OSD_1000";
132  return "OSD_10GIG";
134  return "OSD_FE_LANE";
136  return "OSD_TR_LANE";
138  return "OSD_GbE_LANE";
139  case QETH_LINK_TYPE_LANE:
140  return "OSD_ATM_LANE";
141  default:
142  return "OSD_Express";
143  }
144  case QETH_CARD_TYPE_IQD:
145  return "HiperSockets";
146  case QETH_CARD_TYPE_OSN:
147  return "OSN";
148  case QETH_CARD_TYPE_OSM:
149  return "OSM_1000";
150  case QETH_CARD_TYPE_OSX:
151  return "OSX_10GIG";
152  default:
153  return "unknown";
154  }
155  }
156  return "n/a";
157 }
158 
159 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
160  int clear_start_mask)
161 {
162  unsigned long flags;
163 
164  spin_lock_irqsave(&card->thread_mask_lock, flags);
166  if (clear_start_mask)
167  card->thread_start_mask &= threads;
168  spin_unlock_irqrestore(&card->thread_mask_lock, flags);
169  wake_up(&card->wait_q);
170 }
172 
173 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
174 {
175  unsigned long flags;
176  int rc = 0;
177 
178  spin_lock_irqsave(&card->thread_mask_lock, flags);
179  rc = (card->thread_running_mask & threads);
180  spin_unlock_irqrestore(&card->thread_mask_lock, flags);
181  return rc;
182 }
184 
185 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
186 {
187  return wait_event_interruptible(card->wait_q,
188  qeth_threads_running(card, threads) == 0);
189 }
191 
193 {
194  struct qeth_buffer_pool_entry *pool_entry, *tmp;
195 
196  QETH_CARD_TEXT(card, 5, "clwrklst");
197  list_for_each_entry_safe(pool_entry, tmp,
198  &card->qdio.in_buf_pool.entry_list, list){
199  list_del(&pool_entry->list);
200  }
201 }
203 
204 static int qeth_alloc_buffer_pool(struct qeth_card *card)
205 {
206  struct qeth_buffer_pool_entry *pool_entry;
207  void *ptr;
208  int i, j;
209 
210  QETH_CARD_TEXT(card, 5, "alocpool");
211  for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
212  pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
213  if (!pool_entry) {
214  qeth_free_buffer_pool(card);
215  return -ENOMEM;
216  }
217  for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
218  ptr = (void *) __get_free_page(GFP_KERNEL);
219  if (!ptr) {
220  while (j > 0)
221  free_page((unsigned long)
222  pool_entry->elements[--j]);
223  kfree(pool_entry);
224  qeth_free_buffer_pool(card);
225  return -ENOMEM;
226  }
227  pool_entry->elements[j] = ptr;
228  }
229  list_add(&pool_entry->init_list,
230  &card->qdio.init_pool.entry_list);
231  }
232  return 0;
233 }
234 
235 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
236 {
237  QETH_CARD_TEXT(card, 2, "realcbp");
238 
239  if ((card->state != CARD_STATE_DOWN) &&
240  (card->state != CARD_STATE_RECOVER))
241  return -EPERM;
242 
243  /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
245  qeth_free_buffer_pool(card);
246  card->qdio.in_buf_pool.buf_count = bufcnt;
247  card->qdio.init_pool.buf_count = bufcnt;
248  return qeth_alloc_buffer_pool(card);
249 }
251 
252 static inline int qeth_cq_init(struct qeth_card *card)
253 {
254  int rc;
255 
256  if (card->options.cq == QETH_CQ_ENABLED) {
257  QETH_DBF_TEXT(SETUP, 2, "cqinit");
258  memset(card->qdio.c_q->qdio_bufs, 0,
259  QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
260  card->qdio.c_q->next_buf_to_init = 127;
262  card->qdio.no_in_queues - 1, 0,
263  127);
264  if (rc) {
265  QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
266  goto out;
267  }
268  }
269  rc = 0;
270 out:
271  return rc;
272 }
273 
274 static inline int qeth_alloc_cq(struct qeth_card *card)
275 {
276  int rc;
277 
278  if (card->options.cq == QETH_CQ_ENABLED) {
279  int i;
280  struct qdio_outbuf_state *outbuf_states;
281 
282  QETH_DBF_TEXT(SETUP, 2, "cqon");
283  card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
284  GFP_KERNEL);
285  if (!card->qdio.c_q) {
286  rc = -1;
287  goto kmsg_out;
288  }
289  QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
290 
291  for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
292  card->qdio.c_q->bufs[i].buffer =
293  &card->qdio.c_q->qdio_bufs[i];
294  }
295 
296  card->qdio.no_in_queues = 2;
297 
298  card->qdio.out_bufstates = (struct qdio_outbuf_state *)
299  kzalloc(card->qdio.no_out_queues *
300  QDIO_MAX_BUFFERS_PER_Q *
301  sizeof(struct qdio_outbuf_state), GFP_KERNEL);
302  outbuf_states = card->qdio.out_bufstates;
303  if (outbuf_states == NULL) {
304  rc = -1;
305  goto free_cq_out;
306  }
307  for (i = 0; i < card->qdio.no_out_queues; ++i) {
308  card->qdio.out_qs[i]->bufstates = outbuf_states;
309  outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
310  }
311  } else {
312  QETH_DBF_TEXT(SETUP, 2, "nocq");
313  card->qdio.c_q = NULL;
314  card->qdio.no_in_queues = 1;
315  }
316  QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
317  rc = 0;
318 out:
319  return rc;
320 free_cq_out:
321  kfree(card->qdio.c_q);
322  card->qdio.c_q = NULL;
323 kmsg_out:
324  dev_err(&card->gdev->dev, "Failed to create completion queue\n");
325  goto out;
326 }
327 
328 static inline void qeth_free_cq(struct qeth_card *card)
329 {
330  if (card->qdio.c_q) {
331  --card->qdio.no_in_queues;
332  kfree(card->qdio.c_q);
333  card->qdio.c_q = NULL;
334  }
335  kfree(card->qdio.out_bufstates);
336  card->qdio.out_bufstates = NULL;
337 }
338 
339 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
340  int delayed) {
341  enum iucv_tx_notify n;
342 
343  switch (sbalf15) {
344  case 0:
345  n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
346  break;
347  case 4:
348  case 16:
349  case 17:
350  case 18:
351  n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
353  break;
354  default:
355  n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
357  break;
358  }
359 
360  return n;
361 }
362 
363 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
364  int bidx, int forced_cleanup)
365 {
366  if (q->card->options.cq != QETH_CQ_ENABLED)
367  return;
368 
369  if (q->bufs[bidx]->next_pending != NULL) {
370  struct qeth_qdio_out_buffer *head = q->bufs[bidx];
371  struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
372 
373  while (c) {
374  if (forced_cleanup ||
375  atomic_read(&c->state) ==
377  struct qeth_qdio_out_buffer *f = c;
378  QETH_CARD_TEXT(f->q->card, 5, "fp");
379  QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
380  /* release here to avoid interleaving between
381  outbound tasklet and inbound tasklet
382  regarding notifications and lifecycle */
383  qeth_release_skbs(c);
384 
385  c = f->next_pending;
386  BUG_ON(head->next_pending != f);
387  head->next_pending = c;
388  kmem_cache_free(qeth_qdio_outbuf_cache, f);
389  } else {
390  head = c;
391  c = c->next_pending;
392  }
393 
394  }
395  }
396  if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
398  /* for recovery situations */
399  q->bufs[bidx]->aob = q->bufstates[bidx].aob;
400  qeth_init_qdio_out_buf(q, bidx);
401  QETH_CARD_TEXT(q->card, 2, "clprecov");
402  }
403 }
404 
405 
406 static inline void qeth_qdio_handle_aob(struct qeth_card *card,
407  unsigned long phys_aob_addr) {
408  struct qaob *aob;
411 
412  aob = (struct qaob *) phys_to_virt(phys_aob_addr);
413  QETH_CARD_TEXT(card, 5, "haob");
414  QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
415  buffer = (struct qeth_qdio_out_buffer *) aob->user1;
416  QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
417 
418  BUG_ON(buffer == NULL);
419 
422  notification = TX_NOTIFY_OK;
423  } else {
426  notification = TX_NOTIFY_DELAYED_OK;
427  }
428 
429  if (aob->aorc != 0) {
430  QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
431  notification = qeth_compute_cq_notification(aob->aorc, 1);
432  }
433  qeth_notify_skbs(buffer->q, buffer, notification);
434 
435  buffer->aob = NULL;
436  qeth_clear_output_buffer(buffer->q, buffer,
438 
439  /* from here on: do not touch buffer anymore */
440  qdio_release_aob(aob);
441 }
442 
443 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
444 {
445  return card->options.cq == QETH_CQ_ENABLED &&
446  card->qdio.c_q != NULL &&
447  queue != 0 &&
448  queue == card->qdio.no_in_queues - 1;
449 }
450 
451 
452 static int qeth_issue_next_read(struct qeth_card *card)
453 {
454  int rc;
455  struct qeth_cmd_buffer *iob;
456 
457  QETH_CARD_TEXT(card, 5, "issnxrd");
458  if (card->read.state != CH_STATE_UP)
459  return -EIO;
460  iob = qeth_get_buffer(&card->read);
461  if (!iob) {
462  dev_warn(&card->gdev->dev, "The qeth device driver "
463  "failed to recover an error on the device\n");
464  QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
465  "available\n", dev_name(&card->gdev->dev));
466  return -ENOMEM;
467  }
468  qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
469  QETH_CARD_TEXT(card, 6, "noirqpnd");
470  rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
471  (addr_t) iob, 0, 0);
472  if (rc) {
473  QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
474  "rc=%i\n", dev_name(&card->gdev->dev), rc);
475  atomic_set(&card->read.irq_pending, 0);
476  card->read_or_write_problem = 1;
478  wake_up(&card->wait_q);
479  }
480  return rc;
481 }
482 
483 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
484 {
485  struct qeth_reply *reply;
486 
487  reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
488  if (reply) {
489  atomic_set(&reply->refcnt, 1);
490  atomic_set(&reply->received, 0);
491  reply->card = card;
492  }
493  return reply;
494 }
495 
496 static void qeth_get_reply(struct qeth_reply *reply)
497 {
498  WARN_ON(atomic_read(&reply->refcnt) <= 0);
499  atomic_inc(&reply->refcnt);
500 }
501 
502 static void qeth_put_reply(struct qeth_reply *reply)
503 {
504  WARN_ON(atomic_read(&reply->refcnt) <= 0);
505  if (atomic_dec_and_test(&reply->refcnt))
506  kfree(reply);
507 }
508 
509 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
510  struct qeth_card *card)
511 {
512  char *ipa_name;
513  int com = cmd->hdr.command;
514  ipa_name = qeth_get_ipa_cmd_name(com);
515  if (rc)
516  QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
517  "x%X \"%s\"\n",
518  ipa_name, com, dev_name(&card->gdev->dev),
519  QETH_CARD_IFNAME(card), rc,
520  qeth_get_ipa_msg(rc));
521  else
522  QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
523  ipa_name, com, dev_name(&card->gdev->dev),
524  QETH_CARD_IFNAME(card));
525 }
526 
527 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
528  struct qeth_cmd_buffer *iob)
529 {
530  struct qeth_ipa_cmd *cmd = NULL;
531 
532  QETH_CARD_TEXT(card, 5, "chkipad");
533  if (IS_IPA(iob->data)) {
534  cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
535  if (IS_IPA_REPLY(cmd)) {
536  if (cmd->hdr.command != IPA_CMD_SETCCID &&
537  cmd->hdr.command != IPA_CMD_DELCCID &&
538  cmd->hdr.command != IPA_CMD_MODCCID &&
539  cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
540  qeth_issue_ipa_msg(cmd,
541  cmd->hdr.return_code, card);
542  return cmd;
543  } else {
544  switch (cmd->hdr.command) {
545  case IPA_CMD_STOPLAN:
546  dev_warn(&card->gdev->dev,
547  "The link for interface %s on CHPID"
548  " 0x%X failed\n",
549  QETH_CARD_IFNAME(card),
550  card->info.chpid);
551  card->lan_online = 0;
552  if (card->dev && netif_carrier_ok(card->dev))
553  netif_carrier_off(card->dev);
554  return NULL;
555  case IPA_CMD_STARTLAN:
556  dev_info(&card->gdev->dev,
557  "The link for %s on CHPID 0x%X has"
558  " been restored\n",
559  QETH_CARD_IFNAME(card),
560  card->info.chpid);
561  netif_carrier_on(card->dev);
562  card->lan_online = 1;
563  if (card->info.hwtrap)
564  card->info.hwtrap = 2;
566  return NULL;
567  case IPA_CMD_MODCCID:
568  return cmd;
570  QETH_CARD_TEXT(card, 3, "irla");
571  break;
573  QETH_CARD_TEXT(card, 3, "urla");
574  break;
575  default:
576  QETH_DBF_MESSAGE(2, "Received data is IPA "
577  "but not a reply!\n");
578  break;
579  }
580  }
581  }
582  return cmd;
583 }
584 
586 {
587  struct qeth_reply *reply, *r;
588  unsigned long flags;
589 
590  QETH_CARD_TEXT(card, 4, "clipalst");
591 
592  spin_lock_irqsave(&card->lock, flags);
593  list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
594  qeth_get_reply(reply);
595  reply->rc = -EIO;
596  atomic_inc(&reply->received);
597  list_del_init(&reply->list);
598  wake_up(&reply->wait_q);
599  qeth_put_reply(reply);
600  }
601  spin_unlock_irqrestore(&card->lock, flags);
602  atomic_set(&card->write.irq_pending, 0);
603 }
605 
606 static int qeth_check_idx_response(struct qeth_card *card,
607  unsigned char *buffer)
608 {
609  if (!buffer)
610  return 0;
611 
612  QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
613  if ((buffer[2] & 0xc0) == 0xc0) {
614  QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
615  "with cause code 0x%02x%s\n",
616  buffer[4],
617  ((buffer[4] == 0x22) ?
618  " -- try another portname" : ""));
619  QETH_CARD_TEXT(card, 2, "ckidxres");
620  QETH_CARD_TEXT(card, 2, " idxterm");
621  QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
622  if (buffer[4] == 0xf6) {
623  dev_err(&card->gdev->dev,
624  "The qeth device is not configured "
625  "for the OSI layer required by z/VM\n");
626  return -EPERM;
627  }
628  return -EIO;
629  }
630  return 0;
631 }
632 
633 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
634  __u32 len)
635 {
636  struct qeth_card *card;
637 
638  card = CARD_FROM_CDEV(channel->ccwdev);
639  QETH_CARD_TEXT(card, 4, "setupccw");
640  if (channel == &card->read)
641  memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
642  else
643  memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
644  channel->ccw.count = len;
645  channel->ccw.cda = (__u32) __pa(iob);
646 }
647 
648 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
649 {
650  __u8 index;
651 
652  QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
653  index = channel->io_buf_no;
654  do {
655  if (channel->iob[index].state == BUF_STATE_FREE) {
656  channel->iob[index].state = BUF_STATE_LOCKED;
657  channel->io_buf_no = (channel->io_buf_no + 1) %
659  memset(channel->iob[index].data, 0, QETH_BUFSIZE);
660  return channel->iob + index;
661  }
662  index = (index + 1) % QETH_CMD_BUFFER_NO;
663  } while (index != channel->io_buf_no);
664 
665  return NULL;
666 }
667 
668 void qeth_release_buffer(struct qeth_channel *channel,
669  struct qeth_cmd_buffer *iob)
670 {
671  unsigned long flags;
672 
673  QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
674  spin_lock_irqsave(&channel->iob_lock, flags);
675  memset(iob->data, 0, QETH_BUFSIZE);
676  iob->state = BUF_STATE_FREE;
677  iob->callback = qeth_send_control_data_cb;
678  iob->rc = 0;
679  spin_unlock_irqrestore(&channel->iob_lock, flags);
680  wake_up(&channel->wait_q);
681 }
683 
684 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
685 {
686  struct qeth_cmd_buffer *buffer = NULL;
687  unsigned long flags;
688 
689  spin_lock_irqsave(&channel->iob_lock, flags);
690  buffer = __qeth_get_buffer(channel);
691  spin_unlock_irqrestore(&channel->iob_lock, flags);
692  return buffer;
693 }
694 
696 {
697  struct qeth_cmd_buffer *buffer;
698  wait_event(channel->wait_q,
699  ((buffer = qeth_get_buffer(channel)) != NULL));
700  return buffer;
701 }
703 
705 {
706  int cnt;
707 
708  for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
709  qeth_release_buffer(channel, &channel->iob[cnt]);
710  channel->buf_no = 0;
711  channel->io_buf_no = 0;
712 }
714 
715 static void qeth_send_control_data_cb(struct qeth_channel *channel,
716  struct qeth_cmd_buffer *iob)
717 {
718  struct qeth_card *card;
719  struct qeth_reply *reply, *r;
720  struct qeth_ipa_cmd *cmd;
721  unsigned long flags;
722  int keep_reply;
723  int rc = 0;
724 
725  card = CARD_FROM_CDEV(channel->ccwdev);
726  QETH_CARD_TEXT(card, 4, "sndctlcb");
727  rc = qeth_check_idx_response(card, iob->data);
728  switch (rc) {
729  case 0:
730  break;
731  case -EIO:
734  /* fall through */
735  default:
736  goto out;
737  }
738 
739  cmd = qeth_check_ipa_data(card, iob);
740  if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
741  goto out;
742  /*in case of OSN : check if cmd is set */
743  if (card->info.type == QETH_CARD_TYPE_OSN &&
744  cmd &&
745  cmd->hdr.command != IPA_CMD_STARTLAN &&
746  card->osn_info.assist_cb != NULL) {
747  card->osn_info.assist_cb(card->dev, cmd);
748  goto out;
749  }
750 
751  spin_lock_irqsave(&card->lock, flags);
752  list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
753  if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
754  ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
755  qeth_get_reply(reply);
756  list_del_init(&reply->list);
757  spin_unlock_irqrestore(&card->lock, flags);
758  keep_reply = 0;
759  if (reply->callback != NULL) {
760  if (cmd) {
761  reply->offset = (__u16)((char *)cmd -
762  (char *)iob->data);
763  keep_reply = reply->callback(card,
764  reply,
765  (unsigned long)cmd);
766  } else
767  keep_reply = reply->callback(card,
768  reply,
769  (unsigned long)iob);
770  }
771  if (cmd)
772  reply->rc = (u16) cmd->hdr.return_code;
773  else if (iob->rc)
774  reply->rc = iob->rc;
775  if (keep_reply) {
776  spin_lock_irqsave(&card->lock, flags);
777  list_add_tail(&reply->list,
778  &card->cmd_waiter_list);
779  spin_unlock_irqrestore(&card->lock, flags);
780  } else {
781  atomic_inc(&reply->received);
782  wake_up(&reply->wait_q);
783  }
784  qeth_put_reply(reply);
785  goto out;
786  }
787  }
788  spin_unlock_irqrestore(&card->lock, flags);
789 out:
790  memcpy(&card->seqno.pdu_hdr_ack,
793  qeth_release_buffer(channel, iob);
794 }
795 
796 static int qeth_setup_channel(struct qeth_channel *channel)
797 {
798  int cnt;
799 
800  QETH_DBF_TEXT(SETUP, 2, "setupch");
801  for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
802  channel->iob[cnt].data =
803  kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
804  if (channel->iob[cnt].data == NULL)
805  break;
806  channel->iob[cnt].state = BUF_STATE_FREE;
807  channel->iob[cnt].channel = channel;
808  channel->iob[cnt].callback = qeth_send_control_data_cb;
809  channel->iob[cnt].rc = 0;
810  }
811  if (cnt < QETH_CMD_BUFFER_NO) {
812  while (cnt-- > 0)
813  kfree(channel->iob[cnt].data);
814  return -ENOMEM;
815  }
816  channel->buf_no = 0;
817  channel->io_buf_no = 0;
818  atomic_set(&channel->irq_pending, 0);
819  spin_lock_init(&channel->iob_lock);
820 
821  init_waitqueue_head(&channel->wait_q);
822  return 0;
823 }
824 
825 static int qeth_set_thread_start_bit(struct qeth_card *card,
826  unsigned long thread)
827 {
828  unsigned long flags;
829 
830  spin_lock_irqsave(&card->thread_mask_lock, flags);
831  if (!(card->thread_allowed_mask & thread) ||
832  (card->thread_start_mask & thread)) {
833  spin_unlock_irqrestore(&card->thread_mask_lock, flags);
834  return -EPERM;
835  }
836  card->thread_start_mask |= thread;
837  spin_unlock_irqrestore(&card->thread_mask_lock, flags);
838  return 0;
839 }
840 
841 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
842 {
843  unsigned long flags;
844 
845  spin_lock_irqsave(&card->thread_mask_lock, flags);
846  card->thread_start_mask &= ~thread;
847  spin_unlock_irqrestore(&card->thread_mask_lock, flags);
848  wake_up(&card->wait_q);
849 }
851 
852 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
853 {
854  unsigned long flags;
855 
856  spin_lock_irqsave(&card->thread_mask_lock, flags);
857  card->thread_running_mask &= ~thread;
858  spin_unlock_irqrestore(&card->thread_mask_lock, flags);
859  wake_up(&card->wait_q);
860 }
862 
863 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
864 {
865  unsigned long flags;
866  int rc = 0;
867 
868  spin_lock_irqsave(&card->thread_mask_lock, flags);
869  if (card->thread_start_mask & thread) {
870  if ((card->thread_allowed_mask & thread) &&
871  !(card->thread_running_mask & thread)) {
872  rc = 1;
873  card->thread_start_mask &= ~thread;
874  card->thread_running_mask |= thread;
875  } else
876  rc = -EPERM;
877  }
878  spin_unlock_irqrestore(&card->thread_mask_lock, flags);
879  return rc;
880 }
881 
882 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
883 {
884  int rc = 0;
885 
886  wait_event(card->wait_q,
887  (rc = __qeth_do_run_thread(card, thread)) >= 0);
888  return rc;
889 }
891 
893 {
894  QETH_CARD_TEXT(card, 2, "startrec");
895  if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
897 }
899 
900 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
901 {
902  int dstat, cstat;
903  char *sense;
904  struct qeth_card *card;
905 
906  sense = (char *) irb->ecw;
907  cstat = irb->scsw.cmd.cstat;
908  dstat = irb->scsw.cmd.dstat;
909  card = CARD_FROM_CDEV(cdev);
910 
914  QETH_CARD_TEXT(card, 2, "CGENCHK");
915  dev_warn(&cdev->dev, "The qeth device driver "
916  "failed to recover an error on the device\n");
917  QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
918  dev_name(&cdev->dev), dstat, cstat);
919  print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
920  16, 1, irb, 64, 1);
921  return 1;
922  }
923 
924  if (dstat & DEV_STAT_UNIT_CHECK) {
925  if (sense[SENSE_RESETTING_EVENT_BYTE] &
927  QETH_CARD_TEXT(card, 2, "REVIND");
928  return 1;
929  }
930  if (sense[SENSE_COMMAND_REJECT_BYTE] &
932  QETH_CARD_TEXT(card, 2, "CMDREJi");
933  return 1;
934  }
935  if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
936  QETH_CARD_TEXT(card, 2, "AFFE");
937  return 1;
938  }
939  if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
940  QETH_CARD_TEXT(card, 2, "ZEROSEN");
941  return 0;
942  }
943  QETH_CARD_TEXT(card, 2, "DGENCHK");
944  return 1;
945  }
946  return 0;
947 }
948 
949 static long __qeth_check_irb_error(struct ccw_device *cdev,
950  unsigned long intparm, struct irb *irb)
951 {
952  struct qeth_card *card;
953 
954  card = CARD_FROM_CDEV(cdev);
955 
956  if (!IS_ERR(irb))
957  return 0;
958 
959  switch (PTR_ERR(irb)) {
960  case -EIO:
961  QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
962  dev_name(&cdev->dev));
963  QETH_CARD_TEXT(card, 2, "ckirberr");
964  QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
965  break;
966  case -ETIMEDOUT:
967  dev_warn(&cdev->dev, "A hardware operation timed out"
968  " on the device\n");
969  QETH_CARD_TEXT(card, 2, "ckirberr");
970  QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
971  if (intparm == QETH_RCD_PARM) {
972  if (card && (card->data.ccwdev == cdev)) {
973  card->data.state = CH_STATE_DOWN;
974  wake_up(&card->wait_q);
975  }
976  }
977  break;
978  default:
979  QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
980  dev_name(&cdev->dev), PTR_ERR(irb));
981  QETH_CARD_TEXT(card, 2, "ckirberr");
982  QETH_CARD_TEXT(card, 2, " rc???");
983  }
984  return PTR_ERR(irb);
985 }
986 
987 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
988  struct irb *irb)
989 {
990  int rc;
991  int cstat, dstat;
992  struct qeth_cmd_buffer *buffer;
993  struct qeth_channel *channel;
994  struct qeth_card *card;
995  struct qeth_cmd_buffer *iob;
996  __u8 index;
997 
998  if (__qeth_check_irb_error(cdev, intparm, irb))
999  return;
1000  cstat = irb->scsw.cmd.cstat;
1001  dstat = irb->scsw.cmd.dstat;
1002 
1003  card = CARD_FROM_CDEV(cdev);
1004  if (!card)
1005  return;
1006 
1007  QETH_CARD_TEXT(card, 5, "irq");
1008 
1009  if (card->read.ccwdev == cdev) {
1010  channel = &card->read;
1011  QETH_CARD_TEXT(card, 5, "read");
1012  } else if (card->write.ccwdev == cdev) {
1013  channel = &card->write;
1014  QETH_CARD_TEXT(card, 5, "write");
1015  } else {
1016  channel = &card->data;
1017  QETH_CARD_TEXT(card, 5, "data");
1018  }
1019  atomic_set(&channel->irq_pending, 0);
1020 
1021  if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1022  channel->state = CH_STATE_STOPPED;
1023 
1024  if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1025  channel->state = CH_STATE_HALTED;
1026 
1027  /*let's wake up immediately on data channel*/
1028  if ((channel == &card->data) && (intparm != 0) &&
1029  (intparm != QETH_RCD_PARM))
1030  goto out;
1031 
1032  if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1033  QETH_CARD_TEXT(card, 6, "clrchpar");
1034  /* we don't have to handle this further */
1035  intparm = 0;
1036  }
1037  if (intparm == QETH_HALT_CHANNEL_PARM) {
1038  QETH_CARD_TEXT(card, 6, "hltchpar");
1039  /* we don't have to handle this further */
1040  intparm = 0;
1041  }
1042  if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1043  (dstat & DEV_STAT_UNIT_CHECK) ||
1044  (cstat)) {
1045  if (irb->esw.esw0.erw.cons) {
1046  dev_warn(&channel->ccwdev->dev,
1047  "The qeth device driver failed to recover "
1048  "an error on the device\n");
1049  QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1050  "0x%X dstat 0x%X\n",
1051  dev_name(&channel->ccwdev->dev), cstat, dstat);
1052  print_hex_dump(KERN_WARNING, "qeth: irb ",
1053  DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1054  print_hex_dump(KERN_WARNING, "qeth: sense data ",
1055  DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1056  }
1057  if (intparm == QETH_RCD_PARM) {
1058  channel->state = CH_STATE_DOWN;
1059  goto out;
1060  }
1061  rc = qeth_get_problem(cdev, irb);
1062  if (rc) {
1063  qeth_clear_ipacmd_list(card);
1064  qeth_schedule_recovery(card);
1065  goto out;
1066  }
1067  }
1068 
1069  if (intparm == QETH_RCD_PARM) {
1070  channel->state = CH_STATE_RCD_DONE;
1071  goto out;
1072  }
1073  if (intparm) {
1074  buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1075  buffer->state = BUF_STATE_PROCESSED;
1076  }
1077  if (channel == &card->data)
1078  return;
1079  if (channel == &card->read &&
1080  channel->state == CH_STATE_UP)
1081  qeth_issue_next_read(card);
1082 
1083  iob = channel->iob;
1084  index = channel->buf_no;
1085  while (iob[index].state == BUF_STATE_PROCESSED) {
1086  if (iob[index].callback != NULL)
1087  iob[index].callback(channel, iob + index);
1088 
1089  index = (index + 1) % QETH_CMD_BUFFER_NO;
1090  }
1091  channel->buf_no = index;
1092 out:
1093  wake_up(&card->wait_q);
1094  return;
1095 }
1096 
1097 static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1098  struct qeth_qdio_out_buffer *buf,
1099  enum iucv_tx_notify notification)
1100 {
1101  struct sk_buff *skb;
1102 
1103  if (skb_queue_empty(&buf->skb_list))
1104  goto out;
1105  skb = skb_peek(&buf->skb_list);
1106  while (skb) {
1107  QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1108  QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1109  if (skb->protocol == ETH_P_AF_IUCV) {
1110  if (skb->sk) {
1111  struct iucv_sock *iucv = iucv_sk(skb->sk);
1112  iucv->sk_txnotify(skb, notification);
1113  }
1114  }
1115  if (skb_queue_is_last(&buf->skb_list, skb))
1116  skb = NULL;
1117  else
1118  skb = skb_queue_next(&buf->skb_list, skb);
1119  }
1120 out:
1121  return;
1122 }
1123 
1124 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1125 {
1126  struct sk_buff *skb;
1127  struct iucv_sock *iucv;
1128  int notify_general_error = 0;
1129 
1130  if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1131  notify_general_error = 1;
1132 
1133  /* release may never happen from within CQ tasklet scope */
1135 
1136  skb = skb_dequeue(&buf->skb_list);
1137  while (skb) {
1138  QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1139  QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1140  if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1141  if (skb->sk) {
1142  iucv = iucv_sk(skb->sk);
1143  iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1144  }
1145  }
1146  atomic_dec(&skb->users);
1147  dev_kfree_skb_any(skb);
1148  skb = skb_dequeue(&buf->skb_list);
1149  }
1150 }
1151 
1152 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1153  struct qeth_qdio_out_buffer *buf,
1154  enum qeth_qdio_buffer_states newbufstate)
1155 {
1156  int i;
1157 
1158  /* is PCI flag set on buffer? */
1159  if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1161 
1162  if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1163  qeth_release_skbs(buf);
1164  }
1165  for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1166  if (buf->buffer->element[i].addr && buf->is_header[i])
1167  kmem_cache_free(qeth_core_header_cache,
1168  buf->buffer->element[i].addr);
1169  buf->is_header[i] = 0;
1170  buf->buffer->element[i].length = 0;
1171  buf->buffer->element[i].addr = NULL;
1172  buf->buffer->element[i].eflags = 0;
1173  buf->buffer->element[i].sflags = 0;
1174  }
1175  buf->buffer->element[15].eflags = 0;
1176  buf->buffer->element[15].sflags = 0;
1177  buf->next_element_to_fill = 0;
1178  atomic_set(&buf->state, newbufstate);
1179 }
1180 
1181 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1182 {
1183  int j;
1184 
1185  for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1186  if (!q->bufs[j])
1187  continue;
1188  qeth_cleanup_handled_pending(q, j, 1);
1189  qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1190  if (free) {
1191  kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1192  q->bufs[j] = NULL;
1193  }
1194  }
1195 }
1196 
1198 {
1199  int i;
1200 
1201  QETH_CARD_TEXT(card, 2, "clearqdbf");
1202  /* clear outbound buffers to free skbs */
1203  for (i = 0; i < card->qdio.no_out_queues; ++i) {
1204  if (card->qdio.out_qs[i]) {
1205  qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1206  }
1207  }
1208 }
1210 
1211 static void qeth_free_buffer_pool(struct qeth_card *card)
1212 {
1213  struct qeth_buffer_pool_entry *pool_entry, *tmp;
1214  int i = 0;
1215  list_for_each_entry_safe(pool_entry, tmp,
1216  &card->qdio.init_pool.entry_list, init_list){
1217  for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1218  free_page((unsigned long)pool_entry->elements[i]);
1219  list_del(&pool_entry->init_list);
1220  kfree(pool_entry);
1221  }
1222 }
1223 
1224 static void qeth_free_qdio_buffers(struct qeth_card *card)
1225 {
1226  int i, j;
1227 
1228  if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1230  return;
1231 
1232  qeth_free_cq(card);
1234  for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1235  dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
1236  kfree(card->qdio.in_q);
1237  card->qdio.in_q = NULL;
1238  /* inbound buffer pool */
1239  qeth_free_buffer_pool(card);
1240  /* free outbound qdio_qs */
1241  if (card->qdio.out_qs) {
1242  for (i = 0; i < card->qdio.no_out_queues; ++i) {
1243  qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
1244  kfree(card->qdio.out_qs[i]);
1245  }
1246  kfree(card->qdio.out_qs);
1247  card->qdio.out_qs = NULL;
1248  }
1249 }
1250 
1251 static void qeth_clean_channel(struct qeth_channel *channel)
1252 {
1253  int cnt;
1254 
1255  QETH_DBF_TEXT(SETUP, 2, "freech");
1256  for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1257  kfree(channel->iob[cnt].data);
1258 }
1259 
1260 static void qeth_set_single_write_queues(struct qeth_card *card)
1261 {
1262  if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1263  (card->qdio.no_out_queues == 4))
1264  qeth_free_qdio_buffers(card);
1265 
1266  card->qdio.no_out_queues = 1;
1267  if (card->qdio.default_out_queue != 0)
1268  dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1269 
1270  card->qdio.default_out_queue = 0;
1271 }
1272 
1273 static void qeth_set_multiple_write_queues(struct qeth_card *card)
1274 {
1275  if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1276  (card->qdio.no_out_queues == 1)) {
1277  qeth_free_qdio_buffers(card);
1278  card->qdio.default_out_queue = 2;
1279  }
1280  card->qdio.no_out_queues = 4;
1281 }
1282 
1283 static void qeth_update_from_chp_desc(struct qeth_card *card)
1284 {
1285  struct ccw_device *ccwdev;
1286  struct channelPath_dsc {
1287  u8 flags;
1288  u8 lsn;
1289  u8 desc;
1290  u8 chpid;
1291  u8 swla;
1292  u8 zeroes;
1293  u8 chla;
1294  u8 chpp;
1295  } *chp_dsc;
1296 
1297  QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1298 
1299  ccwdev = card->data.ccwdev;
1300  chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1301  if (!chp_dsc)
1302  goto out;
1303 
1304  card->info.func_level = 0x4100 + chp_dsc->desc;
1305  if (card->info.type == QETH_CARD_TYPE_IQD)
1306  goto out;
1307 
1308  /* CHPP field bit 6 == 1 -> single queue */
1309  if ((chp_dsc->chpp & 0x02) == 0x02)
1310  qeth_set_single_write_queues(card);
1311  else
1312  qeth_set_multiple_write_queues(card);
1313 out:
1314  kfree(chp_dsc);
1315  QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1316  QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1317 }
1318 
1319 static void qeth_init_qdio_info(struct qeth_card *card)
1320 {
1321  QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1322  atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1323  /* inbound */
1324  card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1325  if (card->info.type == QETH_CARD_TYPE_IQD)
1326  card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1327  else
1328  card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1329  card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1330  INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1331  INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1332 }
1333 
1334 static void qeth_set_intial_options(struct qeth_card *card)
1335 {
1336  card->options.route4.type = NO_ROUTER;
1337  card->options.route6.type = NO_ROUTER;
1338  card->options.fake_broadcast = 0;
1339  card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1340  card->options.performance_stats = 0;
1341  card->options.rx_sg_cb = QETH_RX_SG_CB;
1342  card->options.isolation = ISOLATION_MODE_NONE;
1343  card->options.cq = QETH_CQ_DISABLED;
1344 }
1345 
1346 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1347 {
1348  unsigned long flags;
1349  int rc = 0;
1350 
1351  spin_lock_irqsave(&card->thread_mask_lock, flags);
1352  QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1353  (u8) card->thread_start_mask,
1354  (u8) card->thread_allowed_mask,
1355  (u8) card->thread_running_mask);
1356  rc = (card->thread_start_mask & thread);
1357  spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1358  return rc;
1359 }
1360 
1361 static void qeth_start_kernel_thread(struct work_struct *work)
1362 {
1363  struct task_struct *ts;
1364  struct qeth_card *card = container_of(work, struct qeth_card,
1366  QETH_CARD_TEXT(card , 2, "strthrd");
1367 
1368  if (card->read.state != CH_STATE_UP &&
1369  card->write.state != CH_STATE_UP)
1370  return;
1371  if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1372  ts = kthread_run(card->discipline->recover, (void *)card,
1373  "qeth_recover");
1374  if (IS_ERR(ts)) {
1378  }
1379  }
1380 }
1381 
1382 static int qeth_setup_card(struct qeth_card *card)
1383 {
1384 
1385  QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1386  QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1387 
1388  card->read.state = CH_STATE_DOWN;
1389  card->write.state = CH_STATE_DOWN;
1390  card->data.state = CH_STATE_DOWN;
1391  card->state = CARD_STATE_DOWN;
1392  card->lan_online = 0;
1393  card->read_or_write_problem = 0;
1394  card->dev = NULL;
1395  spin_lock_init(&card->vlanlock);
1396  spin_lock_init(&card->mclock);
1397  spin_lock_init(&card->lock);
1398  spin_lock_init(&card->ip_lock);
1400  mutex_init(&card->conf_mutex);
1401  mutex_init(&card->discipline_mutex);
1402  card->thread_start_mask = 0;
1403  card->thread_allowed_mask = 0;
1404  card->thread_running_mask = 0;
1405  INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1406  INIT_LIST_HEAD(&card->ip_list);
1407  INIT_LIST_HEAD(card->ip_tbd_list);
1408  INIT_LIST_HEAD(&card->cmd_waiter_list);
1409  init_waitqueue_head(&card->wait_q);
1410  /* initial options */
1411  qeth_set_intial_options(card);
1412  /* IP address takeover */
1413  INIT_LIST_HEAD(&card->ipato.entries);
1414  card->ipato.enabled = 0;
1415  card->ipato.invert4 = 0;
1416  card->ipato.invert6 = 0;
1417  /* init QDIO stuff */
1418  qeth_init_qdio_info(card);
1420  return 0;
1421 }
1422 
1423 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1424 {
1425  struct qeth_card *card = container_of(slr, struct qeth_card,
1427  if (card->info.mcl_level[0])
1428  seq_printf(m, "qeth: %s firmware level %s\n",
1429  CARD_BUS_ID(card), card->info.mcl_level);
1430 }
1431 
1432 static struct qeth_card *qeth_alloc_card(void)
1433 {
1434  struct qeth_card *card;
1435 
1436  QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1437  card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1438  if (!card)
1439  goto out;
1440  QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1441  card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
1442  if (!card->ip_tbd_list) {
1443  QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1444  goto out_card;
1445  }
1446  if (qeth_setup_channel(&card->read))
1447  goto out_ip;
1448  if (qeth_setup_channel(&card->write))
1449  goto out_channel;
1450  card->options.layer2 = -1;
1451  card->qeth_service_level.seq_print = qeth_core_sl_print;
1453  return card;
1454 
1455 out_channel:
1456  qeth_clean_channel(&card->read);
1457 out_ip:
1458  kfree(card->ip_tbd_list);
1459 out_card:
1460  kfree(card);
1461 out:
1462  return NULL;
1463 }
1464 
1465 static int qeth_determine_card_type(struct qeth_card *card)
1466 {
1467  int i = 0;
1468 
1469  QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1470 
1471  card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1472  card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1473  while (known_devices[i][QETH_DEV_MODEL_IND]) {
1474  if ((CARD_RDEV(card)->id.dev_type ==
1475  known_devices[i][QETH_DEV_TYPE_IND]) &&
1476  (CARD_RDEV(card)->id.dev_model ==
1477  known_devices[i][QETH_DEV_MODEL_IND])) {
1478  card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1479  card->qdio.no_out_queues =
1480  known_devices[i][QETH_QUEUE_NO_IND];
1481  card->qdio.no_in_queues = 1;
1482  card->info.is_multicast_different =
1483  known_devices[i][QETH_MULTICAST_IND];
1484  qeth_update_from_chp_desc(card);
1485  return 0;
1486  }
1487  i++;
1488  }
1489  card->info.type = QETH_CARD_TYPE_UNKNOWN;
1490  dev_err(&card->gdev->dev, "The adapter hardware is of an "
1491  "unknown type\n");
1492  return -ENOENT;
1493 }
1494 
1495 static int qeth_clear_channel(struct qeth_channel *channel)
1496 {
1497  unsigned long flags;
1498  struct qeth_card *card;
1499  int rc;
1500 
1501  card = CARD_FROM_CDEV(channel->ccwdev);
1502  QETH_CARD_TEXT(card, 3, "clearch");
1503  spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1505  spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1506 
1507  if (rc)
1508  return rc;
1510  channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1511  if (rc == -ERESTARTSYS)
1512  return rc;
1513  if (channel->state != CH_STATE_STOPPED)
1514  return -ETIME;
1515  channel->state = CH_STATE_DOWN;
1516  return 0;
1517 }
1518 
1519 static int qeth_halt_channel(struct qeth_channel *channel)
1520 {
1521  unsigned long flags;
1522  struct qeth_card *card;
1523  int rc;
1524 
1525  card = CARD_FROM_CDEV(channel->ccwdev);
1526  QETH_CARD_TEXT(card, 3, "haltch");
1527  spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1529  spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1530 
1531  if (rc)
1532  return rc;
1534  channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1535  if (rc == -ERESTARTSYS)
1536  return rc;
1537  if (channel->state != CH_STATE_HALTED)
1538  return -ETIME;
1539  return 0;
1540 }
1541 
1542 static int qeth_halt_channels(struct qeth_card *card)
1543 {
1544  int rc1 = 0, rc2 = 0, rc3 = 0;
1545 
1546  QETH_CARD_TEXT(card, 3, "haltchs");
1547  rc1 = qeth_halt_channel(&card->read);
1548  rc2 = qeth_halt_channel(&card->write);
1549  rc3 = qeth_halt_channel(&card->data);
1550  if (rc1)
1551  return rc1;
1552  if (rc2)
1553  return rc2;
1554  return rc3;
1555 }
1556 
1557 static int qeth_clear_channels(struct qeth_card *card)
1558 {
1559  int rc1 = 0, rc2 = 0, rc3 = 0;
1560 
1561  QETH_CARD_TEXT(card, 3, "clearchs");
1562  rc1 = qeth_clear_channel(&card->read);
1563  rc2 = qeth_clear_channel(&card->write);
1564  rc3 = qeth_clear_channel(&card->data);
1565  if (rc1)
1566  return rc1;
1567  if (rc2)
1568  return rc2;
1569  return rc3;
1570 }
1571 
1572 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1573 {
1574  int rc = 0;
1575 
1576  QETH_CARD_TEXT(card, 3, "clhacrd");
1577 
1578  if (halt)
1579  rc = qeth_halt_channels(card);
1580  if (rc)
1581  return rc;
1582  return qeth_clear_channels(card);
1583 }
1584 
1585 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1586 {
1587  int rc = 0;
1588 
1589  QETH_CARD_TEXT(card, 3, "qdioclr");
1590  switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1591  QETH_QDIO_CLEANING)) {
1592  case QETH_QDIO_ESTABLISHED:
1593  if (card->info.type == QETH_CARD_TYPE_IQD)
1594  rc = qdio_shutdown(CARD_DDEV(card),
1596  else
1597  rc = qdio_shutdown(CARD_DDEV(card),
1599  if (rc)
1600  QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1601  qdio_free(CARD_DDEV(card));
1602  atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1603  break;
1604  case QETH_QDIO_CLEANING:
1605  return rc;
1606  default:
1607  break;
1608  }
1609  rc = qeth_clear_halt_card(card, use_halt);
1610  if (rc)
1611  QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1612  card->state = CARD_STATE_DOWN;
1613  return rc;
1614 }
1616 
1617 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1618  int *length)
1619 {
1620  struct ciw *ciw;
1621  char *rcd_buf;
1622  int ret;
1623  struct qeth_channel *channel = &card->data;
1624  unsigned long flags;
1625 
1626  /*
1627  * scan for RCD command in extended SenseID data
1628  */
1629  ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1630  if (!ciw || ciw->cmd == 0)
1631  return -EOPNOTSUPP;
1632  rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1633  if (!rcd_buf)
1634  return -ENOMEM;
1635 
1636  channel->ccw.cmd_code = ciw->cmd;
1637  channel->ccw.cda = (__u32) __pa(rcd_buf);
1638  channel->ccw.count = ciw->count;
1639  channel->ccw.flags = CCW_FLAG_SLI;
1640  channel->state = CH_STATE_RCD;
1641  spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1642  ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1645  spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1646  if (!ret)
1647  wait_event(card->wait_q,
1648  (channel->state == CH_STATE_RCD_DONE ||
1649  channel->state == CH_STATE_DOWN));
1650  if (channel->state == CH_STATE_DOWN)
1651  ret = -EIO;
1652  else
1653  channel->state = CH_STATE_DOWN;
1654  if (ret) {
1655  kfree(rcd_buf);
1656  *buffer = NULL;
1657  *length = 0;
1658  } else {
1659  *length = ciw->count;
1660  *buffer = rcd_buf;
1661  }
1662  return ret;
1663 }
1664 
1665 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1666 {
1667  QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1668  card->info.chpid = prcd[30];
1669  card->info.unit_addr2 = prcd[31];
1670  card->info.cula = prcd[63];
1671  card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1672  (prcd[0x11] == _ascebc['M']));
1673 }
1674 
1675 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1676 {
1677  QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1678 
1679  if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1680  (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
1681  card->info.blkt.time_total = 250;
1682  card->info.blkt.inter_packet = 5;
1683  card->info.blkt.inter_packet_jumbo = 15;
1684  } else {
1685  card->info.blkt.time_total = 0;
1686  card->info.blkt.inter_packet = 0;
1687  card->info.blkt.inter_packet_jumbo = 0;
1688  }
1689 }
1690 
1691 static void qeth_init_tokens(struct qeth_card *card)
1692 {
1693  card->token.issuer_rm_w = 0x00010103UL;
1694  card->token.cm_filter_w = 0x00010108UL;
1695  card->token.cm_connection_w = 0x0001010aUL;
1696  card->token.ulp_filter_w = 0x0001010bUL;
1697  card->token.ulp_connection_w = 0x0001010dUL;
1698 }
1699 
1700 static void qeth_init_func_level(struct qeth_card *card)
1701 {
1702  switch (card->info.type) {
1703  case QETH_CARD_TYPE_IQD:
1704  card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1705  break;
1706  case QETH_CARD_TYPE_OSD:
1707  case QETH_CARD_TYPE_OSN:
1708  card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1709  break;
1710  default:
1711  break;
1712  }
1713 }
1714 
1715 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1716  void (*idx_reply_cb)(struct qeth_channel *,
1717  struct qeth_cmd_buffer *))
1718 {
1719  struct qeth_cmd_buffer *iob;
1720  unsigned long flags;
1721  int rc;
1722  struct qeth_card *card;
1723 
1724  QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1725  card = CARD_FROM_CDEV(channel->ccwdev);
1726  iob = qeth_get_buffer(channel);
1727  iob->callback = idx_reply_cb;
1728  memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1729  channel->ccw.count = QETH_BUFSIZE;
1730  channel->ccw.cda = (__u32) __pa(iob->data);
1731 
1732  wait_event(card->wait_q,
1733  atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1734  QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1735  spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1736  rc = ccw_device_start(channel->ccwdev,
1737  &channel->ccw, (addr_t) iob, 0, 0);
1738  spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1739 
1740  if (rc) {
1741  QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1742  QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1743  atomic_set(&channel->irq_pending, 0);
1744  wake_up(&card->wait_q);
1745  return rc;
1746  }
1748  channel->state == CH_STATE_UP, QETH_TIMEOUT);
1749  if (rc == -ERESTARTSYS)
1750  return rc;
1751  if (channel->state != CH_STATE_UP) {
1752  rc = -ETIME;
1753  QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1754  qeth_clear_cmd_buffers(channel);
1755  } else
1756  rc = 0;
1757  return rc;
1758 }
1759 
1760 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1761  void (*idx_reply_cb)(struct qeth_channel *,
1762  struct qeth_cmd_buffer *))
1763 {
1764  struct qeth_card *card;
1765  struct qeth_cmd_buffer *iob;
1766  unsigned long flags;
1767  __u16 temp;
1768  __u8 tmp;
1769  int rc;
1770  struct ccw_dev_id temp_devid;
1771 
1772  card = CARD_FROM_CDEV(channel->ccwdev);
1773 
1774  QETH_DBF_TEXT(SETUP, 2, "idxactch");
1775 
1776  iob = qeth_get_buffer(channel);
1777  iob->callback = idx_reply_cb;
1778  memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1779  channel->ccw.count = IDX_ACTIVATE_SIZE;
1780  channel->ccw.cda = (__u32) __pa(iob->data);
1781  if (channel == &card->write) {
1784  &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1785  card->seqno.trans_hdr++;
1786  } else {
1789  &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1790  }
1791  tmp = ((__u8)card->info.portno) | 0x80;
1792  memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1794  &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1796  &card->info.func_level, sizeof(__u16));
1797  ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1798  memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1799  temp = (card->info.cula << 8) + card->info.unit_addr2;
1801 
1802  wait_event(card->wait_q,
1803  atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1804  QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1805  spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1806  rc = ccw_device_start(channel->ccwdev,
1807  &channel->ccw, (addr_t) iob, 0, 0);
1808  spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1809 
1810  if (rc) {
1811  QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1812  rc);
1813  QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1814  atomic_set(&channel->irq_pending, 0);
1815  wake_up(&card->wait_q);
1816  return rc;
1817  }
1818  rc = wait_event_interruptible_timeout(card->wait_q,
1819  channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1820  if (rc == -ERESTARTSYS)
1821  return rc;
1822  if (channel->state != CH_STATE_ACTIVATING) {
1823  dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1824  " failed to recover an error on the device\n");
1825  QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1826  dev_name(&channel->ccwdev->dev));
1827  QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1828  qeth_clear_cmd_buffers(channel);
1829  return -ETIME;
1830  }
1831  return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1832 }
1833 
1834 static int qeth_peer_func_level(int level)
1835 {
1836  if ((level & 0xff) == 8)
1837  return (level & 0xff) + 0x400;
1838  if (((level >> 8) & 3) == 1)
1839  return (level & 0xff) + 0x200;
1840  return level;
1841 }
1842 
1843 static void qeth_idx_write_cb(struct qeth_channel *channel,
1844  struct qeth_cmd_buffer *iob)
1845 {
1846  struct qeth_card *card;
1847  __u16 temp;
1848 
1849  QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1850 
1851  if (channel->state == CH_STATE_DOWN) {
1852  channel->state = CH_STATE_ACTIVATING;
1853  goto out;
1854  }
1855  card = CARD_FROM_CDEV(channel->ccwdev);
1856 
1857  if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1859  dev_err(&card->write.ccwdev->dev,
1860  "The adapter is used exclusively by another "
1861  "host\n");
1862  else
1863  QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1864  " negative reply\n",
1865  dev_name(&card->write.ccwdev->dev));
1866  goto out;
1867  }
1868  memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1869  if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1870  QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1871  "function level mismatch (sent: 0x%x, received: "
1872  "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1873  card->info.func_level, temp);
1874  goto out;
1875  }
1876  channel->state = CH_STATE_UP;
1877 out:
1878  qeth_release_buffer(channel, iob);
1879 }
1880 
1881 static void qeth_idx_read_cb(struct qeth_channel *channel,
1882  struct qeth_cmd_buffer *iob)
1883 {
1884  struct qeth_card *card;
1885  __u16 temp;
1886 
1887  QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1888  if (channel->state == CH_STATE_DOWN) {
1889  channel->state = CH_STATE_ACTIVATING;
1890  goto out;
1891  }
1892 
1893  card = CARD_FROM_CDEV(channel->ccwdev);
1894  if (qeth_check_idx_response(card, iob->data))
1895  goto out;
1896 
1897  if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1898  switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1899  case QETH_IDX_ACT_ERR_EXCL:
1900  dev_err(&card->write.ccwdev->dev,
1901  "The adapter is used exclusively by another "
1902  "host\n");
1903  break;
1904  case QETH_IDX_ACT_ERR_AUTH:
1906  dev_err(&card->read.ccwdev->dev,
1907  "Setting the device online failed because of "
1908  "insufficient authorization\n");
1909  break;
1910  default:
1911  QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1912  " negative reply\n",
1913  dev_name(&card->read.ccwdev->dev));
1914  }
1915  QETH_CARD_TEXT_(card, 2, "idxread%c",
1917  goto out;
1918  }
1919 
1924  if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1925  (card->info.type == QETH_CARD_TYPE_OSD))
1926  card->info.portname_required = 1;
1927 
1928  memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1929  if (temp != qeth_peer_func_level(card->info.func_level)) {
1930  QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1931  "level mismatch (sent: 0x%x, received: 0x%x)\n",
1932  dev_name(&card->read.ccwdev->dev),
1933  card->info.func_level, temp);
1934  goto out;
1935  }
1936  memcpy(&card->token.issuer_rm_r,
1939  memcpy(&card->info.mcl_level[0],
1941  channel->state = CH_STATE_UP;
1942 out:
1943  qeth_release_buffer(channel, iob);
1944 }
1945 
1946 void qeth_prepare_control_data(struct qeth_card *card, int len,
1947  struct qeth_cmd_buffer *iob)
1948 {
1949  qeth_setup_ccw(&card->write, iob->data, len);
1951 
1953  &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1954  card->seqno.trans_hdr++;
1956  &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1957  card->seqno.pdu_hdr++;
1959  &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1961 }
1963 
1964 int qeth_send_control_data(struct qeth_card *card, int len,
1965  struct qeth_cmd_buffer *iob,
1966  int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1967  unsigned long),
1968  void *reply_param)
1969 {
1970  int rc;
1971  unsigned long flags;
1972  struct qeth_reply *reply = NULL;
1973  unsigned long timeout, event_timeout;
1974  struct qeth_ipa_cmd *cmd;
1975 
1976  QETH_CARD_TEXT(card, 2, "sendctl");
1977 
1978  if (card->read_or_write_problem) {
1979  qeth_release_buffer(iob->channel, iob);
1980  return -EIO;
1981  }
1982  reply = qeth_alloc_reply(card);
1983  if (!reply) {
1984  return -ENOMEM;
1985  }
1986  reply->callback = reply_cb;
1987  reply->param = reply_param;
1988  if (card->state == CARD_STATE_DOWN)
1989  reply->seqno = QETH_IDX_COMMAND_SEQNO;
1990  else
1991  reply->seqno = card->seqno.ipa++;
1992  init_waitqueue_head(&reply->wait_q);
1993  spin_lock_irqsave(&card->lock, flags);
1994  list_add_tail(&reply->list, &card->cmd_waiter_list);
1995  spin_unlock_irqrestore(&card->lock, flags);
1997 
1998  while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1999  qeth_prepare_control_data(card, len, iob);
2000 
2001  if (IS_IPA(iob->data))
2002  event_timeout = QETH_IPA_TIMEOUT;
2003  else
2004  event_timeout = QETH_TIMEOUT;
2005  timeout = jiffies + event_timeout;
2006 
2007  QETH_CARD_TEXT(card, 6, "noirqpnd");
2008  spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2009  rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2010  (addr_t) iob, 0, 0);
2011  spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2012  if (rc) {
2013  QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2014  "ccw_device_start rc = %i\n",
2015  dev_name(&card->write.ccwdev->dev), rc);
2016  QETH_CARD_TEXT_(card, 2, " err%d", rc);
2017  spin_lock_irqsave(&card->lock, flags);
2018  list_del_init(&reply->list);
2019  qeth_put_reply(reply);
2020  spin_unlock_irqrestore(&card->lock, flags);
2021  qeth_release_buffer(iob->channel, iob);
2022  atomic_set(&card->write.irq_pending, 0);
2023  wake_up(&card->wait_q);
2024  return rc;
2025  }
2026 
2027  /* we have only one long running ipassist, since we can ensure
2028  process context of this command we can sleep */
2029  cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2030  if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2031  (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2032  if (!wait_event_timeout(reply->wait_q,
2033  atomic_read(&reply->received), event_timeout))
2034  goto time_err;
2035  } else {
2036  while (!atomic_read(&reply->received)) {
2037  if (time_after(jiffies, timeout))
2038  goto time_err;
2039  cpu_relax();
2040  }
2041  }
2042 
2043  if (reply->rc == -EIO)
2044  goto error;
2045  rc = reply->rc;
2046  qeth_put_reply(reply);
2047  return rc;
2048 
2049 time_err:
2050  reply->rc = -ETIME;
2051  spin_lock_irqsave(&reply->card->lock, flags);
2052  list_del_init(&reply->list);
2053  spin_unlock_irqrestore(&reply->card->lock, flags);
2054  atomic_inc(&reply->received);
2055 error:
2056  atomic_set(&card->write.irq_pending, 0);
2057  qeth_release_buffer(iob->channel, iob);
2058  card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2059  rc = reply->rc;
2060  qeth_put_reply(reply);
2061  return rc;
2062 }
2064 
2065 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2066  unsigned long data)
2067 {
2068  struct qeth_cmd_buffer *iob;
2069 
2070  QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2071 
2072  iob = (struct qeth_cmd_buffer *) data;
2073  memcpy(&card->token.cm_filter_r,
2076  QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2077  return 0;
2078 }
2079 
2080 static int qeth_cm_enable(struct qeth_card *card)
2081 {
2082  int rc;
2083  struct qeth_cmd_buffer *iob;
2084 
2085  QETH_DBF_TEXT(SETUP, 2, "cmenable");
2086 
2087  iob = qeth_wait_for_buffer(&card->write);
2090  &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2092  &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2093 
2094  rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2095  qeth_cm_enable_cb, NULL);
2096  return rc;
2097 }
2098 
2099 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2100  unsigned long data)
2101 {
2102 
2103  struct qeth_cmd_buffer *iob;
2104 
2105  QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2106 
2107  iob = (struct qeth_cmd_buffer *) data;
2108  memcpy(&card->token.cm_connection_r,
2111  QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2112  return 0;
2113 }
2114 
2115 static int qeth_cm_setup(struct qeth_card *card)
2116 {
2117  int rc;
2118  struct qeth_cmd_buffer *iob;
2119 
2120  QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2121 
2122  iob = qeth_wait_for_buffer(&card->write);
2125  &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2127  &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2129  &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2130  rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2131  qeth_cm_setup_cb, NULL);
2132  return rc;
2133 
2134 }
2135 
2136 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2137 {
2138  switch (card->info.type) {
2140  return 1500;
2141  case QETH_CARD_TYPE_IQD:
2142  return card->info.max_mtu;
2143  case QETH_CARD_TYPE_OSD:
2144  switch (card->info.link_type) {
2145  case QETH_LINK_TYPE_HSTR:
2147  return 2000;
2148  default:
2149  return 1492;
2150  }
2151  case QETH_CARD_TYPE_OSM:
2152  case QETH_CARD_TYPE_OSX:
2153  return 1492;
2154  default:
2155  return 1500;
2156  }
2157 }
2158 
2159 static inline int qeth_get_mtu_outof_framesize(int framesize)
2160 {
2161  switch (framesize) {
2162  case 0x4000:
2163  return 8192;
2164  case 0x6000:
2165  return 16384;
2166  case 0xa000:
2167  return 32768;
2168  case 0xffff:
2169  return 57344;
2170  default:
2171  return 0;
2172  }
2173 }
2174 
2175 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2176 {
2177  switch (card->info.type) {
2178  case QETH_CARD_TYPE_OSD:
2179  case QETH_CARD_TYPE_OSM:
2180  case QETH_CARD_TYPE_OSX:
2181  case QETH_CARD_TYPE_IQD:
2182  return ((mtu >= 576) &&
2183  (mtu <= card->info.max_mtu));
2184  case QETH_CARD_TYPE_OSN:
2186  default:
2187  return 1;
2188  }
2189 }
2190 
2191 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2192  unsigned long data)
2193 {
2194 
2195  __u16 mtu, framesize;
2196  __u16 len;
2197  __u8 link_type;
2198  struct qeth_cmd_buffer *iob;
2199 
2200  QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2201 
2202  iob = (struct qeth_cmd_buffer *) data;
2203  memcpy(&card->token.ulp_filter_r,
2206  if (card->info.type == QETH_CARD_TYPE_IQD) {
2207  memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2208  mtu = qeth_get_mtu_outof_framesize(framesize);
2209  if (!mtu) {
2210  iob->rc = -EINVAL;
2211  QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2212  return 0;
2213  }
2214  if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2215  /* frame size has changed */
2216  if (card->dev &&
2217  ((card->dev->mtu == card->info.initial_mtu) ||
2218  (card->dev->mtu > mtu)))
2219  card->dev->mtu = mtu;
2220  qeth_free_qdio_buffers(card);
2221  }
2222  card->info.initial_mtu = mtu;
2223  card->info.max_mtu = mtu;
2224  card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2225  } else {
2226  card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
2227  card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2228  iob->data);
2229  card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2230  }
2231 
2234  memcpy(&link_type,
2236  card->info.link_type = link_type;
2237  } else
2238  card->info.link_type = 0;
2239  QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2240  QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2241  return 0;
2242 }
2243 
2244 static int qeth_ulp_enable(struct qeth_card *card)
2245 {
2246  int rc;
2247  char prot_type;
2248  struct qeth_cmd_buffer *iob;
2249 
2250  /*FIXME: trace view callbacks*/
2251  QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2252 
2253  iob = qeth_wait_for_buffer(&card->write);
2255 
2256  *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2257  (__u8) card->info.portno;
2258  if (card->options.layer2)
2259  if (card->info.type == QETH_CARD_TYPE_OSN)
2260  prot_type = QETH_PROT_OSN2;
2261  else
2262  prot_type = QETH_PROT_LAYER2;
2263  else
2264  prot_type = QETH_PROT_TCPIP;
2265 
2266  memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2268  &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2270  &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2272  card->info.portname, 9);
2273  rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2274  qeth_ulp_enable_cb, NULL);
2275  return rc;
2276 
2277 }
2278 
2279 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2280  unsigned long data)
2281 {
2282  struct qeth_cmd_buffer *iob;
2283  int rc = 0;
2284 
2285  QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2286 
2287  iob = (struct qeth_cmd_buffer *) data;
2288  memcpy(&card->token.ulp_connection_r,
2292  3)) {
2293  QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2294  dev_err(&card->gdev->dev, "A connection could not be "
2295  "established because of an OLM limit\n");
2296  iob->rc = -EMLINK;
2297  }
2298  QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2299  return rc;
2300 }
2301 
2302 static int qeth_ulp_setup(struct qeth_card *card)
2303 {
2304  int rc;
2305  __u16 temp;
2306  struct qeth_cmd_buffer *iob;
2307  struct ccw_dev_id dev_id;
2308 
2309  QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2310 
2311  iob = qeth_wait_for_buffer(&card->write);
2313 
2315  &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2317  &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2319  &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2320 
2322  memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2323  temp = (card->info.cula << 8) + card->info.unit_addr2;
2325  rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2326  qeth_ulp_setup_cb, NULL);
2327  return rc;
2328 }
2329 
2330 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2331 {
2332  int rc;
2333  struct qeth_qdio_out_buffer *newbuf;
2334 
2335  rc = 0;
2336  newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2337  if (!newbuf) {
2338  rc = -ENOMEM;
2339  goto out;
2340  }
2341  newbuf->buffer = &q->qdio_bufs[bidx];
2342  skb_queue_head_init(&newbuf->skb_list);
2343  lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2344  newbuf->q = q;
2345  newbuf->aob = NULL;
2346  newbuf->next_pending = q->bufs[bidx];
2348  q->bufs[bidx] = newbuf;
2349  if (q->bufstates) {
2350  q->bufstates[bidx].user = newbuf;
2351  QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2352  QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2353  QETH_CARD_TEXT_(q->card, 2, "%lx",
2354  (long) newbuf->next_pending);
2355  }
2356 out:
2357  return rc;
2358 }
2359 
2360 
2361 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2362 {
2363  int i, j;
2364 
2365  QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2366 
2367  if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2369  return 0;
2370 
2371  card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
2372  GFP_KERNEL);
2373  if (!card->qdio.in_q)
2374  goto out_nomem;
2375  QETH_DBF_TEXT(SETUP, 2, "inq");
2376  QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2377  memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2378  /* give inbound qeth_qdio_buffers their qdio_buffers */
2379  for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
2380  card->qdio.in_q->bufs[i].buffer =
2381  &card->qdio.in_q->qdio_bufs[i];
2382  card->qdio.in_q->bufs[i].rx_skb = NULL;
2383  }
2384  /* inbound buffer pool */
2385  if (qeth_alloc_buffer_pool(card))
2386  goto out_freeinq;
2387 
2388  /* outbound */
2389  card->qdio.out_qs =
2390  kzalloc(card->qdio.no_out_queues *
2391  sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2392  if (!card->qdio.out_qs)
2393  goto out_freepool;
2394  for (i = 0; i < card->qdio.no_out_queues; ++i) {
2395  card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
2396  GFP_KERNEL);
2397  if (!card->qdio.out_qs[i])
2398  goto out_freeoutq;
2399  QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2400  QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2401  card->qdio.out_qs[i]->queue_no = i;
2402  /* give outbound qeth_qdio_buffers their qdio_buffers */
2403  for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2404  BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2405  if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2406  goto out_freeoutqbufs;
2407  }
2408  }
2409 
2410  /* completion */
2411  if (qeth_alloc_cq(card))
2412  goto out_freeoutq;
2413 
2414  return 0;
2415 
2416 out_freeoutqbufs:
2417  while (j > 0) {
2418  --j;
2419  kmem_cache_free(qeth_qdio_outbuf_cache,
2420  card->qdio.out_qs[i]->bufs[j]);
2421  card->qdio.out_qs[i]->bufs[j] = NULL;
2422  }
2423 out_freeoutq:
2424  while (i > 0) {
2425  kfree(card->qdio.out_qs[--i]);
2426  qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2427  }
2428  kfree(card->qdio.out_qs);
2429  card->qdio.out_qs = NULL;
2430 out_freepool:
2431  qeth_free_buffer_pool(card);
2432 out_freeinq:
2433  kfree(card->qdio.in_q);
2434  card->qdio.in_q = NULL;
2435 out_nomem:
2436  atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2437  return -ENOMEM;
2438 }
2439 
2440 static void qeth_create_qib_param_field(struct qeth_card *card,
2441  char *param_field)
2442 {
2443 
2444  param_field[0] = _ascebc['P'];
2445  param_field[1] = _ascebc['C'];
2446  param_field[2] = _ascebc['I'];
2447  param_field[3] = _ascebc['T'];
2448  *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2449  *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2450  *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2451 }
2452 
2453 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2454  char *param_field)
2455 {
2456  param_field[16] = _ascebc['B'];
2457  param_field[17] = _ascebc['L'];
2458  param_field[18] = _ascebc['K'];
2459  param_field[19] = _ascebc['T'];
2460  *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2461  *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2462  *((unsigned int *) (&param_field[28])) =
2463  card->info.blkt.inter_packet_jumbo;
2464 }
2465 
2466 static int qeth_qdio_activate(struct qeth_card *card)
2467 {
2468  QETH_DBF_TEXT(SETUP, 3, "qdioact");
2469  return qdio_activate(CARD_DDEV(card));
2470 }
2471 
2472 static int qeth_dm_act(struct qeth_card *card)
2473 {
2474  int rc;
2475  struct qeth_cmd_buffer *iob;
2476 
2477  QETH_DBF_TEXT(SETUP, 2, "dmact");
2478 
2479  iob = qeth_wait_for_buffer(&card->write);
2480  memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2481 
2483  &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2485  &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2486  rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2487  return rc;
2488 }
2489 
2490 static int qeth_mpc_initialize(struct qeth_card *card)
2491 {
2492  int rc;
2493 
2494  QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2495 
2496  rc = qeth_issue_next_read(card);
2497  if (rc) {
2498  QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2499  return rc;
2500  }
2501  rc = qeth_cm_enable(card);
2502  if (rc) {
2503  QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2504  goto out_qdio;
2505  }
2506  rc = qeth_cm_setup(card);
2507  if (rc) {
2508  QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2509  goto out_qdio;
2510  }
2511  rc = qeth_ulp_enable(card);
2512  if (rc) {
2513  QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2514  goto out_qdio;
2515  }
2516  rc = qeth_ulp_setup(card);
2517  if (rc) {
2518  QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2519  goto out_qdio;
2520  }
2521  rc = qeth_alloc_qdio_buffers(card);
2522  if (rc) {
2523  QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2524  goto out_qdio;
2525  }
2526  rc = qeth_qdio_establish(card);
2527  if (rc) {
2528  QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2529  qeth_free_qdio_buffers(card);
2530  goto out_qdio;
2531  }
2532  rc = qeth_qdio_activate(card);
2533  if (rc) {
2534  QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2535  goto out_qdio;
2536  }
2537  rc = qeth_dm_act(card);
2538  if (rc) {
2539  QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2540  goto out_qdio;
2541  }
2542 
2543  return 0;
2544 out_qdio:
2545  qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2546  return rc;
2547 }
2548 
2549 static void qeth_print_status_with_portname(struct qeth_card *card)
2550 {
2551  char dbf_text[15];
2552  int i;
2553 
2554  sprintf(dbf_text, "%s", card->info.portname + 1);
2555  for (i = 0; i < 8; i++)
2556  dbf_text[i] =
2557  (char) _ebcasc[(__u8) dbf_text[i]];
2558  dbf_text[8] = 0;
2559  dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2560  "with link type %s (portname: %s)\n",
2561  qeth_get_cardname(card),
2562  (card->info.mcl_level[0]) ? " (level: " : "",
2563  (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2564  (card->info.mcl_level[0]) ? ")" : "",
2566  dbf_text);
2567 
2568 }
2569 
2570 static void qeth_print_status_no_portname(struct qeth_card *card)
2571 {
2572  if (card->info.portname[0])
2573  dev_info(&card->gdev->dev, "Device is a%s "
2574  "card%s%s%s\nwith link type %s "
2575  "(no portname needed by interface).\n",
2576  qeth_get_cardname(card),
2577  (card->info.mcl_level[0]) ? " (level: " : "",
2578  (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2579  (card->info.mcl_level[0]) ? ")" : "",
2580  qeth_get_cardname_short(card));
2581  else
2582  dev_info(&card->gdev->dev, "Device is a%s "
2583  "card%s%s%s\nwith link type %s.\n",
2584  qeth_get_cardname(card),
2585  (card->info.mcl_level[0]) ? " (level: " : "",
2586  (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2587  (card->info.mcl_level[0]) ? ")" : "",
2588  qeth_get_cardname_short(card));
2589 }
2590 
2592 {
2593  switch (card->info.type) {
2594  case QETH_CARD_TYPE_OSD:
2595  case QETH_CARD_TYPE_OSM:
2596  case QETH_CARD_TYPE_OSX:
2597  /* VM will use a non-zero first character
2598  * to indicate a HiperSockets like reporting
2599  * of the level OSA sets the first character to zero
2600  * */
2601  if (!card->info.mcl_level[0]) {
2602  sprintf(card->info.mcl_level, "%02x%02x",
2603  card->info.mcl_level[2],
2604  card->info.mcl_level[3]);
2605 
2606  card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2607  break;
2608  }
2609  /* fallthrough */
2610  case QETH_CARD_TYPE_IQD:
2611  if ((card->info.guestlan) ||
2612  (card->info.mcl_level[0] & 0x80)) {
2613  card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2614  card->info.mcl_level[0]];
2615  card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2616  card->info.mcl_level[1]];
2617  card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2618  card->info.mcl_level[2]];
2619  card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2620  card->info.mcl_level[3]];
2621  card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2622  }
2623  break;
2624  default:
2625  memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2626  }
2627  if (card->info.portname_required)
2628  qeth_print_status_with_portname(card);
2629  else
2630  qeth_print_status_no_portname(card);
2631 }
2633 
2634 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2635 {
2636  struct qeth_buffer_pool_entry *entry;
2637 
2638  QETH_CARD_TEXT(card, 5, "inwrklst");
2639 
2640  list_for_each_entry(entry,
2641  &card->qdio.init_pool.entry_list, init_list) {
2642  qeth_put_buffer_pool_entry(card, entry);
2643  }
2644 }
2645 
2646 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2647  struct qeth_card *card)
2648 {
2649  struct list_head *plh;
2650  struct qeth_buffer_pool_entry *entry;
2651  int i, free;
2652  struct page *page;
2653 
2654  if (list_empty(&card->qdio.in_buf_pool.entry_list))
2655  return NULL;
2656 
2657  list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2658  entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2659  free = 1;
2660  for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2661  if (page_count(virt_to_page(entry->elements[i])) > 1) {
2662  free = 0;
2663  break;
2664  }
2665  }
2666  if (free) {
2667  list_del_init(&entry->list);
2668  return entry;
2669  }
2670  }
2671 
2672  /* no free buffer in pool so take first one and swap pages */
2673  entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2674  struct qeth_buffer_pool_entry, list);
2675  for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2676  if (page_count(virt_to_page(entry->elements[i])) > 1) {
2677  page = alloc_page(GFP_ATOMIC);
2678  if (!page) {
2679  return NULL;
2680  } else {
2681  free_page((unsigned long)entry->elements[i]);
2682  entry->elements[i] = page_address(page);
2683  if (card->options.performance_stats)
2684  card->perf_stats.sg_alloc_page_rx++;
2685  }
2686  }
2687  }
2688  list_del_init(&entry->list);
2689  return entry;
2690 }
2691 
2692 static int qeth_init_input_buffer(struct qeth_card *card,
2693  struct qeth_qdio_buffer *buf)
2694 {
2695  struct qeth_buffer_pool_entry *pool_entry;
2696  int i;
2697 
2698  if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2699  buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2700  if (!buf->rx_skb)
2701  return 1;
2702  }
2703 
2704  pool_entry = qeth_find_free_buffer_pool_entry(card);
2705  if (!pool_entry)
2706  return 1;
2707 
2708  /*
2709  * since the buffer is accessed only from the input_tasklet
2710  * there shouldn't be a need to synchronize; also, since we use
2711  * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2712  * buffers
2713  */
2714 
2715  buf->pool_entry = pool_entry;
2716  for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2717  buf->buffer->element[i].length = PAGE_SIZE;
2718  buf->buffer->element[i].addr = pool_entry->elements[i];
2719  if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2720  buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2721  else
2722  buf->buffer->element[i].eflags = 0;
2723  buf->buffer->element[i].sflags = 0;
2724  }
2725  return 0;
2726 }
2727 
2729 {
2730  int i, j;
2731  int rc;
2732 
2733  QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2734 
2735  /* inbound queue */
2736  memset(card->qdio.in_q->qdio_bufs, 0,
2737  QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2738  qeth_initialize_working_pool_list(card);
2739  /*give only as many buffers to hardware as we have buffer pool entries*/
2740  for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2741  qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2742  card->qdio.in_q->next_buf_to_init =
2743  card->qdio.in_buf_pool.buf_count - 1;
2744  rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2745  card->qdio.in_buf_pool.buf_count - 1);
2746  if (rc) {
2747  QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2748  return rc;
2749  }
2750 
2751  /* completion */
2752  rc = qeth_cq_init(card);
2753  if (rc) {
2754  return rc;
2755  }
2756 
2757  /* outbound queue */
2758  for (i = 0; i < card->qdio.no_out_queues; ++i) {
2759  memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2760  QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2761  for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2762  qeth_clear_output_buffer(card->qdio.out_qs[i],
2763  card->qdio.out_qs[i]->bufs[j],
2765  }
2766  card->qdio.out_qs[i]->card = card;
2767  card->qdio.out_qs[i]->next_buf_to_fill = 0;
2768  card->qdio.out_qs[i]->do_pack = 0;
2769  atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2770  atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2771  atomic_set(&card->qdio.out_qs[i]->state,
2773  }
2774  return 0;
2775 }
2777 
2778 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2779 {
2780  switch (link_type) {
2781  case QETH_LINK_TYPE_HSTR:
2782  return 2;
2783  default:
2784  return 1;
2785  }
2786 }
2787 
2788 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2789  struct qeth_ipa_cmd *cmd, __u8 command,
2790  enum qeth_prot_versions prot)
2791 {
2792  memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2793  cmd->hdr.command = command;
2794  cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2795  cmd->hdr.seqno = card->seqno.ipa;
2796  cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2797  cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2798  if (card->options.layer2)
2799  cmd->hdr.prim_version_no = 2;
2800  else
2801  cmd->hdr.prim_version_no = 1;
2802  cmd->hdr.param_count = 1;
2803  cmd->hdr.prot_version = prot;
2804  cmd->hdr.ipa_supported = 0;
2805  cmd->hdr.ipa_enabled = 0;
2806 }
2807 
2809  enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2810 {
2811  struct qeth_cmd_buffer *iob;
2812  struct qeth_ipa_cmd *cmd;
2813 
2814  iob = qeth_wait_for_buffer(&card->write);
2815  cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2816  qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2817 
2818  return iob;
2819 }
2821 
2822 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2823  char prot_type)
2824 {
2826  memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2828  &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2829 }
2831 
2832 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2833  int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2834  unsigned long),
2835  void *reply_param)
2836 {
2837  int rc;
2838  char prot_type;
2839 
2840  QETH_CARD_TEXT(card, 4, "sendipa");
2841 
2842  if (card->options.layer2)
2843  if (card->info.type == QETH_CARD_TYPE_OSN)
2844  prot_type = QETH_PROT_OSN2;
2845  else
2846  prot_type = QETH_PROT_LAYER2;
2847  else
2848  prot_type = QETH_PROT_TCPIP;
2849  qeth_prepare_ipa_cmd(card, iob, prot_type);
2851  iob, reply_cb, reply_param);
2852  if (rc == -ETIME) {
2853  qeth_clear_ipacmd_list(card);
2854  qeth_schedule_recovery(card);
2855  }
2856  return rc;
2857 }
2859 
2861 {
2862  int rc;
2863  struct qeth_cmd_buffer *iob;
2864 
2865  QETH_DBF_TEXT(SETUP, 2, "strtlan");
2866 
2867  iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2868  rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2869  return rc;
2870 }
2872 
2874  struct qeth_reply *reply, unsigned long data)
2875 {
2876  struct qeth_ipa_cmd *cmd;
2877 
2878  QETH_CARD_TEXT(card, 4, "defadpcb");
2879 
2880  cmd = (struct qeth_ipa_cmd *) data;
2881  if (cmd->hdr.return_code == 0)
2882  cmd->hdr.return_code =
2883  cmd->data.setadapterparms.hdr.return_code;
2884  return 0;
2885 }
2887 
2888 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2889  struct qeth_reply *reply, unsigned long data)
2890 {
2891  struct qeth_ipa_cmd *cmd;
2892 
2893  QETH_CARD_TEXT(card, 3, "quyadpcb");
2894 
2895  cmd = (struct qeth_ipa_cmd *) data;
2896  if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2897  card->info.link_type =
2898  cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2899  QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2900  }
2901  card->options.adp.supported_funcs =
2902  cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2903  return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2904 }
2905 
2907  __u32 command, __u32 cmdlen)
2908 {
2909  struct qeth_cmd_buffer *iob;
2910  struct qeth_ipa_cmd *cmd;
2911 
2913  QETH_PROT_IPV4);
2914  cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2915  cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2916  cmd->data.setadapterparms.hdr.command_code = command;
2917  cmd->data.setadapterparms.hdr.used_total = 1;
2918  cmd->data.setadapterparms.hdr.seq_no = 1;
2919 
2920  return iob;
2921 }
2923 
2925 {
2926  int rc;
2927  struct qeth_cmd_buffer *iob;
2928 
2929  QETH_CARD_TEXT(card, 3, "queryadp");
2931  sizeof(struct qeth_ipacmd_setadpparms));
2932  rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2933  return rc;
2934 }
2936 
2937 static int qeth_query_ipassists_cb(struct qeth_card *card,
2938  struct qeth_reply *reply, unsigned long data)
2939 {
2940  struct qeth_ipa_cmd *cmd;
2941 
2942  QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2943 
2944  cmd = (struct qeth_ipa_cmd *) data;
2945 
2946  switch (cmd->hdr.return_code) {
2947  case IPA_RC_NOTSUPP:
2949  QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2950  card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2951  card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
2952  return -0;
2953  default:
2954  if (cmd->hdr.return_code) {
2955  QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
2956  "rc=%d\n",
2957  dev_name(&card->gdev->dev),
2958  cmd->hdr.return_code);
2959  return 0;
2960  }
2961  }
2962 
2963  if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2964  card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2965  card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2966  } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
2967  card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2968  card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2969  } else
2970  QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
2971  "\n", dev_name(&card->gdev->dev));
2972  QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2973  QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported);
2974  QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled);
2975  return 0;
2976 }
2977 
2979 {
2980  int rc;
2981  struct qeth_cmd_buffer *iob;
2982 
2983  QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2984  iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2985  rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2986  return rc;
2987 }
2989 
2990 static int qeth_query_setdiagass_cb(struct qeth_card *card,
2991  struct qeth_reply *reply, unsigned long data)
2992 {
2993  struct qeth_ipa_cmd *cmd;
2994  __u16 rc;
2995 
2996  cmd = (struct qeth_ipa_cmd *)data;
2997  rc = cmd->hdr.return_code;
2998  if (rc)
2999  QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3000  else
3001  card->info.diagass_support = cmd->data.diagass.ext;
3002  return 0;
3003 }
3004 
3005 static int qeth_query_setdiagass(struct qeth_card *card)
3006 {
3007  struct qeth_cmd_buffer *iob;
3008  struct qeth_ipa_cmd *cmd;
3009 
3010  QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3012  cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3013  cmd->data.diagass.subcmd_len = 16;
3014  cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3015  return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3016 }
3017 
3018 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3019 {
3020  unsigned long info = get_zeroed_page(GFP_KERNEL);
3021  struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3022  struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3023  struct ccw_dev_id ccwid;
3024  int level;
3025 
3026  tid->chpid = card->info.chpid;
3027  ccw_device_get_id(CARD_RDEV(card), &ccwid);
3028  tid->ssid = ccwid.ssid;
3029  tid->devno = ccwid.devno;
3030  if (!info)
3031  return;
3032  level = stsi(NULL, 0, 0, 0);
3033  if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
3034  tid->lparnr = info222->lpar_number;
3035  if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
3036  EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3037  memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3038  }
3039  free_page(info);
3040  return;
3041 }
3042 
3043 static int qeth_hw_trap_cb(struct qeth_card *card,
3044  struct qeth_reply *reply, unsigned long data)
3045 {
3046  struct qeth_ipa_cmd *cmd;
3047  __u16 rc;
3048 
3049  cmd = (struct qeth_ipa_cmd *)data;
3050  rc = cmd->hdr.return_code;
3051  if (rc)
3052  QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3053  return 0;
3054 }
3055 
3057 {
3058  struct qeth_cmd_buffer *iob;
3059  struct qeth_ipa_cmd *cmd;
3060 
3061  QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3063  cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3064  cmd->data.diagass.subcmd_len = 80;
3065  cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3066  cmd->data.diagass.type = 1;
3067  cmd->data.diagass.action = action;
3068  switch (action) {
3069  case QETH_DIAGS_TRAP_ARM:
3070  cmd->data.diagass.options = 0x0003;
3071  cmd->data.diagass.ext = 0x00010000 +
3072  sizeof(struct qeth_trap_id);
3073  qeth_get_trap_id(card,
3074  (struct qeth_trap_id *)cmd->data.diagass.cdata);
3075  break;
3077  cmd->data.diagass.options = 0x0001;
3078  break;
3080  break;
3081  }
3082  return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3083 }
3085 
3086 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3087  unsigned int qdio_error, const char *dbftext)
3088 {
3089  if (qdio_error) {
3090  QETH_CARD_TEXT(card, 2, dbftext);
3091  QETH_CARD_TEXT_(card, 2, " F15=%02X",
3092  buf->element[15].sflags);
3093  QETH_CARD_TEXT_(card, 2, " F14=%02X",
3094  buf->element[14].sflags);
3095  QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3096  if ((buf->element[15].sflags) == 0x12) {
3097  card->stats.rx_dropped++;
3098  return 0;
3099  } else
3100  return 1;
3101  }
3102  return 0;
3103 }
3105 
3107 {
3108  struct qeth_card *card = container_of(work, struct qeth_card,
3109  buffer_reclaim_work.work);
3110 
3111  QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3113 }
3114 
3115 void qeth_queue_input_buffer(struct qeth_card *card, int index)
3116 {
3117  struct qeth_qdio_q *queue = card->qdio.in_q;
3118  struct list_head *lh;
3119  int count;
3120  int i;
3121  int rc;
3122  int newcount = 0;
3123 
3124  count = (index < queue->next_buf_to_init)?
3125  card->qdio.in_buf_pool.buf_count -
3126  (queue->next_buf_to_init - index) :
3127  card->qdio.in_buf_pool.buf_count -
3128  (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3129  /* only requeue at a certain threshold to avoid SIGAs */
3130  if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3131  for (i = queue->next_buf_to_init;
3132  i < queue->next_buf_to_init + count; ++i) {
3133  if (qeth_init_input_buffer(card,
3134  &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3135  break;
3136  } else {
3137  newcount++;
3138  }
3139  }
3140 
3141  if (newcount < count) {
3142  /* we are in memory shortage so we switch back to
3143  traditional skb allocation and drop packages */
3144  atomic_set(&card->force_alloc_skb, 3);
3145  count = newcount;
3146  } else {
3147  atomic_add_unless(&card->force_alloc_skb, -1, 0);
3148  }
3149 
3150  if (!count) {
3151  i = 0;
3152  list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3153  i++;
3154  if (i == card->qdio.in_buf_pool.buf_count) {
3155  QETH_CARD_TEXT(card, 2, "qsarbw");
3156  card->reclaim_index = index;
3158  &card->buffer_reclaim_work,
3160  }
3161  return;
3162  }
3163 
3164  /*
3165  * according to old code it should be avoided to requeue all
3166  * 128 buffers in order to benefit from PCI avoidance.
3167  * this function keeps at least one buffer (the buffer at
3168  * 'index') un-requeued -> this buffer is the first buffer that
3169  * will be requeued the next time
3170  */
3171  if (card->options.performance_stats) {
3172  card->perf_stats.inbound_do_qdio_cnt++;
3173  card->perf_stats.inbound_do_qdio_start_time =
3174  qeth_get_micros();
3175  }
3176  rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3177  queue->next_buf_to_init, count);
3178  if (card->options.performance_stats)
3179  card->perf_stats.inbound_do_qdio_time +=
3180  qeth_get_micros() -
3181  card->perf_stats.inbound_do_qdio_start_time;
3182  if (rc) {
3183  QETH_CARD_TEXT(card, 2, "qinberr");
3184  }
3185  queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3186  QDIO_MAX_BUFFERS_PER_Q;
3187  }
3188 }
3190 
3191 static int qeth_handle_send_error(struct qeth_card *card,
3192  struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3193 {
3194  int sbalf15 = buffer->buffer->element[15].sflags;
3195 
3196  QETH_CARD_TEXT(card, 6, "hdsnderr");
3197  if (card->info.type == QETH_CARD_TYPE_IQD) {
3198  if (sbalf15 == 0) {
3199  qdio_err = 0;
3200  } else {
3201  qdio_err = 1;
3202  }
3203  }
3204  qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3205 
3206  if (!qdio_err)
3207  return QETH_SEND_ERROR_NONE;
3208 
3209  if ((sbalf15 >= 15) && (sbalf15 <= 31))
3210  return QETH_SEND_ERROR_RETRY;
3211 
3212  QETH_CARD_TEXT(card, 1, "lnkfail");
3213  QETH_CARD_TEXT_(card, 1, "%04x %02x",
3214  (u16)qdio_err, (u8)sbalf15);
3216 }
3217 
3218 /*
3219  * Switched to packing state if the number of used buffers on a queue
3220  * reaches a certain limit.
3221  */
3222 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3223 {
3224  if (!queue->do_pack) {
3225  if (atomic_read(&queue->used_buffers)
3227  /* switch non-PACKING -> PACKING */
3228  QETH_CARD_TEXT(queue->card, 6, "np->pack");
3229  if (queue->card->options.performance_stats)
3230  queue->card->perf_stats.sc_dp_p++;
3231  queue->do_pack = 1;
3232  }
3233  }
3234 }
3235 
3236 /*
3237  * Switches from packing to non-packing mode. If there is a packing
3238  * buffer on the queue this buffer will be prepared to be flushed.
3239  * In that case 1 is returned to inform the caller. If no buffer
3240  * has to be flushed, zero is returned.
3241  */
3242 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3243 {
3244  struct qeth_qdio_out_buffer *buffer;
3245  int flush_count = 0;
3246 
3247  if (queue->do_pack) {
3248  if (atomic_read(&queue->used_buffers)
3250  /* switch PACKING -> non-PACKING */
3251  QETH_CARD_TEXT(queue->card, 6, "pack->np");
3252  if (queue->card->options.performance_stats)
3253  queue->card->perf_stats.sc_p_dp++;
3254  queue->do_pack = 0;
3255  /* flush packing buffers */
3256  buffer = queue->bufs[queue->next_buf_to_fill];
3257  if ((atomic_read(&buffer->state) ==
3259  (buffer->next_element_to_fill > 0)) {
3260  atomic_set(&buffer->state,
3262  flush_count++;
3263  queue->next_buf_to_fill =
3264  (queue->next_buf_to_fill + 1) %
3265  QDIO_MAX_BUFFERS_PER_Q;
3266  }
3267  }
3268  }
3269  return flush_count;
3270 }
3271 
3272 
3273 /*
3274  * Called to flush a packing buffer if no more pci flags are on the queue.
3275  * Checks if there is a packing buffer and prepares it to be flushed.
3276  * In that case returns 1, otherwise zero.
3277  */
3278 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3279 {
3280  struct qeth_qdio_out_buffer *buffer;
3281 
3282  buffer = queue->bufs[queue->next_buf_to_fill];
3283  if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3284  (buffer->next_element_to_fill > 0)) {
3285  /* it's a packing buffer */
3287  queue->next_buf_to_fill =
3288  (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3289  return 1;
3290  }
3291  return 0;
3292 }
3293 
3294 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3295  int count)
3296 {
3297  struct qeth_qdio_out_buffer *buf;
3298  int rc;
3299  int i;
3300  unsigned int qdio_flags;
3301 
3302  for (i = index; i < index + count; ++i) {
3303  int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3304  buf = queue->bufs[bidx];
3305  buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3307 
3308  if (queue->bufstates)
3309  queue->bufstates[bidx].user = buf;
3310 
3311  if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3312  continue;
3313 
3314  if (!queue->do_pack) {
3315  if ((atomic_read(&queue->used_buffers) >=
3318  !atomic_read(&queue->set_pci_flags_count)) {
3319  /* it's likely that we'll go to packing
3320  * mode soon */
3322  buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3323  }
3324  } else {
3325  if (!atomic_read(&queue->set_pci_flags_count)) {
3326  /*
3327  * there's no outstanding PCI any more, so we
3328  * have to request a PCI to be sure the the PCI
3329  * will wake at some time in the future then we
3330  * can flush packed buffers that might still be
3331  * hanging around, which can happen if no
3332  * further send was requested by the stack
3333  */
3335  buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3336  }
3337  }
3338  }
3339 
3340  queue->card->dev->trans_start = jiffies;
3341  if (queue->card->options.performance_stats) {
3342  queue->card->perf_stats.outbound_do_qdio_cnt++;
3343  queue->card->perf_stats.outbound_do_qdio_start_time =
3344  qeth_get_micros();
3345  }
3346  qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3347  if (atomic_read(&queue->set_pci_flags_count))
3348  qdio_flags |= QDIO_FLAG_PCI_OUT;
3349  rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3350  queue->queue_no, index, count);
3351  if (queue->card->options.performance_stats)
3352  queue->card->perf_stats.outbound_do_qdio_time +=
3353  qeth_get_micros() -
3354  queue->card->perf_stats.outbound_do_qdio_start_time;
3355  atomic_add(count, &queue->used_buffers);
3356  if (rc) {
3357  queue->card->stats.tx_errors += count;
3358  /* ignore temporary SIGA errors without busy condition */
3359  if (rc == -ENOBUFS)
3360  return;
3361  QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3362  QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3363  QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3364  QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3365  QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3366 
3367  /* this must not happen under normal circumstances. if it
3368  * happens something is really wrong -> recover */
3369  qeth_schedule_recovery(queue->card);
3370  return;
3371  }
3372  if (queue->card->options.performance_stats)
3373  queue->card->perf_stats.bufs_sent += count;
3374 }
3375 
3376 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3377 {
3378  int index;
3379  int flush_cnt = 0;
3380  int q_was_packing = 0;
3381 
3382  /*
3383  * check if weed have to switch to non-packing mode or if
3384  * we have to get a pci flag out on the queue
3385  */
3386  if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3387  !atomic_read(&queue->set_pci_flags_count)) {
3388  if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3390  /*
3391  * If we get in here, there was no action in
3392  * do_send_packet. So, we check if there is a
3393  * packing buffer to be flushed here.
3394  */
3395  netif_stop_queue(queue->card->dev);
3396  index = queue->next_buf_to_fill;
3397  q_was_packing = queue->do_pack;
3398  /* queue->do_pack may change */
3399  barrier();
3400  flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3401  if (!flush_cnt &&
3402  !atomic_read(&queue->set_pci_flags_count))
3403  flush_cnt +=
3404  qeth_flush_buffers_on_no_pci(queue);
3405  if (queue->card->options.performance_stats &&
3406  q_was_packing)
3407  queue->card->perf_stats.bufs_sent_pack +=
3408  flush_cnt;
3409  if (flush_cnt)
3410  qeth_flush_buffers(queue, index, flush_cnt);
3412  }
3413  }
3414 }
3415 
3416 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3417  unsigned long card_ptr)
3418 {
3419  struct qeth_card *card = (struct qeth_card *)card_ptr;
3420 
3421  if (card->dev && (card->dev->flags & IFF_UP))
3422  napi_schedule(&card->napi);
3423 }
3425 
3426 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3427 {
3428  int rc;
3429 
3430  if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3431  rc = -1;
3432  goto out;
3433  } else {
3434  if (card->options.cq == cq) {
3435  rc = 0;
3436  goto out;
3437  }
3438 
3439  if (card->state != CARD_STATE_DOWN &&
3440  card->state != CARD_STATE_RECOVER) {
3441  rc = -1;
3442  goto out;
3443  }
3444 
3445  qeth_free_qdio_buffers(card);
3446  card->options.cq = cq;
3447  rc = 0;
3448  }
3449 out:
3450  return rc;
3451 
3452 }
3454 
3455 
3456 static void qeth_qdio_cq_handler(struct qeth_card *card,
3457  unsigned int qdio_err,
3458  unsigned int queue, int first_element, int count) {
3459  struct qeth_qdio_q *cq = card->qdio.c_q;
3460  int i;
3461  int rc;
3462 
3463  if (!qeth_is_cq(card, queue))
3464  goto out;
3465 
3466  QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3467  QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3468  QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3469 
3470  if (qdio_err) {
3471  netif_stop_queue(card->dev);
3472  qeth_schedule_recovery(card);
3473  goto out;
3474  }
3475 
3476  if (card->options.performance_stats) {
3477  card->perf_stats.cq_cnt++;
3478  card->perf_stats.cq_start_time = qeth_get_micros();
3479  }
3480 
3481  for (i = first_element; i < first_element + count; ++i) {
3482  int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3483  struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3484  int e;
3485 
3486  e = 0;
3487  while (buffer->element[e].addr) {
3488  unsigned long phys_aob_addr;
3489 
3490  phys_aob_addr = (unsigned long) buffer->element[e].addr;
3491  qeth_qdio_handle_aob(card, phys_aob_addr);
3492  buffer->element[e].addr = NULL;
3493  buffer->element[e].eflags = 0;
3494  buffer->element[e].sflags = 0;
3495  buffer->element[e].length = 0;
3496 
3497  ++e;
3498  }
3499 
3500  buffer->element[15].eflags = 0;
3501  buffer->element[15].sflags = 0;
3502  }
3503  rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3504  card->qdio.c_q->next_buf_to_init,
3505  count);
3506  if (rc) {
3507  dev_warn(&card->gdev->dev,
3508  "QDIO reported an error, rc=%i\n", rc);
3509  QETH_CARD_TEXT(card, 2, "qcqherr");
3510  }
3511  card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3512  + count) % QDIO_MAX_BUFFERS_PER_Q;
3513 
3514  netif_wake_queue(card->dev);
3515 
3516  if (card->options.performance_stats) {
3517  int delta_t = qeth_get_micros();
3518  delta_t -= card->perf_stats.cq_start_time;
3519  card->perf_stats.cq_time += delta_t;
3520  }
3521 out:
3522  return;
3523 }
3524 
3525 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3526  unsigned int queue, int first_elem, int count,
3527  unsigned long card_ptr)
3528 {
3529  struct qeth_card *card = (struct qeth_card *)card_ptr;
3530 
3531  QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3532  QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3533 
3534  if (qeth_is_cq(card, queue))
3535  qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3536  else if (qdio_err)
3537  qeth_schedule_recovery(card);
3538 
3539 
3540 }
3542 
3544  unsigned int qdio_error, int __queue, int first_element,
3545  int count, unsigned long card_ptr)
3546 {
3547  struct qeth_card *card = (struct qeth_card *) card_ptr;
3548  struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3549  struct qeth_qdio_out_buffer *buffer;
3550  int i;
3551 
3552  QETH_CARD_TEXT(card, 6, "qdouhdl");
3553  if (qdio_error & QDIO_ERROR_FATAL) {
3554  QETH_CARD_TEXT(card, 2, "achkcond");
3555  netif_stop_queue(card->dev);
3556  qeth_schedule_recovery(card);
3557  return;
3558  }
3559  if (card->options.performance_stats) {
3560  card->perf_stats.outbound_handler_cnt++;
3561  card->perf_stats.outbound_handler_start_time =
3562  qeth_get_micros();
3563  }
3564  for (i = first_element; i < (first_element + count); ++i) {
3565  int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3566  buffer = queue->bufs[bidx];
3567  qeth_handle_send_error(card, buffer, qdio_error);
3568 
3569  if (queue->bufstates &&
3570  (queue->bufstates[bidx].flags &
3572  BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3573 
3574  if (atomic_cmpxchg(&buffer->state,
3578  qeth_notify_skbs(queue, buffer,
3580  }
3581  buffer->aob = queue->bufstates[bidx].aob;
3582  QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3583  QETH_CARD_TEXT(queue->card, 5, "aob");
3584  QETH_CARD_TEXT_(queue->card, 5, "%lx",
3585  virt_to_phys(buffer->aob));
3586  BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
3587  if (qeth_init_qdio_out_buf(queue, bidx)) {
3588  QETH_CARD_TEXT(card, 2, "outofbuf");
3589  qeth_schedule_recovery(card);
3590  }
3591  } else {
3592  if (card->options.cq == QETH_CQ_ENABLED) {
3593  enum iucv_tx_notify n;
3594 
3595  n = qeth_compute_cq_notification(
3596  buffer->buffer->element[15].sflags, 0);
3597  qeth_notify_skbs(queue, buffer, n);
3598  }
3599 
3600  qeth_clear_output_buffer(queue, buffer,
3602  }
3603  qeth_cleanup_handled_pending(queue, bidx, 0);
3604  }
3605  atomic_sub(count, &queue->used_buffers);
3606  /* check if we need to do something on this outbound queue */
3607  if (card->info.type != QETH_CARD_TYPE_IQD)
3608  qeth_check_outbound_queue(queue);
3609 
3610  netif_wake_queue(queue->card->dev);
3611  if (card->options.performance_stats)
3612  card->perf_stats.outbound_handler_time += qeth_get_micros() -
3613  card->perf_stats.outbound_handler_start_time;
3614 }
3616 
3617 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3618  int ipv, int cast_type)
3619 {
3620  if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3621  card->info.type == QETH_CARD_TYPE_OSX))
3622  return card->qdio.default_out_queue;
3623  switch (card->qdio.no_out_queues) {
3624  case 4:
3625  if (cast_type && card->info.is_multicast_different)
3626  return card->info.is_multicast_different &
3627  (card->qdio.no_out_queues - 1);
3628  if (card->qdio.do_prio_queueing && (ipv == 4)) {
3629  const u8 tos = ip_hdr(skb)->tos;
3630 
3631  if (card->qdio.do_prio_queueing ==
3633  if (tos & IP_TOS_NOTIMPORTANT)
3634  return 3;
3635  if (tos & IP_TOS_HIGHRELIABILITY)
3636  return 2;
3637  if (tos & IP_TOS_HIGHTHROUGHPUT)
3638  return 1;
3639  if (tos & IP_TOS_LOWDELAY)
3640  return 0;
3641  }
3642  if (card->qdio.do_prio_queueing ==
3644  return 3 - (tos >> 6);
3645  } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3646  /* TODO: IPv6!!! */
3647  }
3648  return card->qdio.default_out_queue;
3649  case 1: /* fallthrough for single-out-queue 1920-device */
3650  default:
3651  return card->qdio.default_out_queue;
3652  }
3653 }
3655 
3656 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3657  struct sk_buff *skb, int elems)
3658 {
3659  int dlen = skb->len - skb->data_len;
3660  int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3661  PFN_DOWN((unsigned long)skb->data);
3662 
3663  elements_needed += skb_shinfo(skb)->nr_frags;
3664  if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3665  QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3666  "(Number=%d / Length=%d). Discarded.\n",
3667  (elements_needed+elems), skb->len);
3668  return 0;
3669  }
3670  return elements_needed;
3671 }
3673 
3674 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3675 {
3676  int hroom, inpage, rest;
3677 
3678  if (((unsigned long)skb->data & PAGE_MASK) !=
3679  (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3680  hroom = skb_headroom(skb);
3681  inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3682  rest = len - inpage;
3683  if (rest > hroom)
3684  return 1;
3685  memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3686  skb->data -= rest;
3687  QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3688  }
3689  return 0;
3690 }
3692 
3693 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3694  struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3695  int offset)
3696 {
3697  int length = skb->len - skb->data_len;
3698  int length_here;
3699  int element;
3700  char *data;
3701  int first_lap, cnt;
3702  struct skb_frag_struct *frag;
3703 
3704  element = *next_element_to_fill;
3705  data = skb->data;
3706  first_lap = (is_tso == 0 ? 1 : 0);
3707 
3708  if (offset >= 0) {
3709  data = skb->data + offset;
3710  length -= offset;
3711  first_lap = 0;
3712  }
3713 
3714  while (length > 0) {
3715  /* length_here is the remaining amount of data in this page */
3716  length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3717  if (length < length_here)
3718  length_here = length;
3719 
3720  buffer->element[element].addr = data;
3721  buffer->element[element].length = length_here;
3722  length -= length_here;
3723  if (!length) {
3724  if (first_lap)
3725  if (skb_shinfo(skb)->nr_frags)
3726  buffer->element[element].eflags =
3728  else
3729  buffer->element[element].eflags = 0;
3730  else
3731  buffer->element[element].eflags =
3733  } else {
3734  if (first_lap)
3735  buffer->element[element].eflags =
3737  else
3738  buffer->element[element].eflags =
3740  }
3741  data += length_here;
3742  element++;
3743  first_lap = 0;
3744  }
3745 
3746  for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3747  frag = &skb_shinfo(skb)->frags[cnt];
3748  buffer->element[element].addr = (char *)
3749  page_to_phys(skb_frag_page(frag))
3750  + frag->page_offset;
3751  buffer->element[element].length = frag->size;
3752  buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
3753  element++;
3754  }
3755 
3756  if (buffer->element[element - 1].eflags)
3757  buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3758  *next_element_to_fill = element;
3759 }
3760 
3761 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3762  struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3763  struct qeth_hdr *hdr, int offset, int hd_len)
3764 {
3765  struct qdio_buffer *buffer;
3766  int flush_cnt = 0, hdr_len, large_send = 0;
3767 
3768  buffer = buf->buffer;
3769  atomic_inc(&skb->users);
3770  skb_queue_tail(&buf->skb_list, skb);
3771 
3772  /*check first on TSO ....*/
3773  if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3774  int element = buf->next_element_to_fill;
3775 
3776  hdr_len = sizeof(struct qeth_hdr_tso) +
3777  ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3778  /*fill first buffer entry only with header information */
3779  buffer->element[element].addr = skb->data;
3780  buffer->element[element].length = hdr_len;
3781  buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3782  buf->next_element_to_fill++;
3783  skb->data += hdr_len;
3784  skb->len -= hdr_len;
3785  large_send = 1;
3786  }
3787 
3788  if (offset >= 0) {
3789  int element = buf->next_element_to_fill;
3790  buffer->element[element].addr = hdr;
3791  buffer->element[element].length = sizeof(struct qeth_hdr) +
3792  hd_len;
3793  buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3794  buf->is_header[element] = 1;
3795  buf->next_element_to_fill++;
3796  }
3797 
3798  __qeth_fill_buffer(skb, buffer, large_send,
3799  (int *)&buf->next_element_to_fill, offset);
3800 
3801  if (!queue->do_pack) {
3802  QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3803  /* set state to PRIMED -> will be flushed */
3805  flush_cnt = 1;
3806  } else {
3807  QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3808  if (queue->card->options.performance_stats)
3809  queue->card->perf_stats.skbs_sent_pack++;
3810  if (buf->next_element_to_fill >=
3811  QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3812  /*
3813  * packed buffer if full -> set state PRIMED
3814  * -> will be flushed
3815  */
3817  flush_cnt = 1;
3818  }
3819  }
3820  return flush_cnt;
3821 }
3822 
3824  struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3825  struct qeth_hdr *hdr, int elements_needed,
3826  int offset, int hd_len)
3827 {
3828  struct qeth_qdio_out_buffer *buffer;
3829  int index;
3830 
3831  /* spin until we get the queue ... */
3832  while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3834  /* ... now we've got the queue */
3835  index = queue->next_buf_to_fill;
3836  buffer = queue->bufs[queue->next_buf_to_fill];
3837  /*
3838  * check if buffer is empty to make sure that we do not 'overtake'
3839  * ourselves and try to fill a buffer that is already primed
3840  */
3841  if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3842  goto out;
3843  queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3844  QDIO_MAX_BUFFERS_PER_Q;
3846  qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3847  qeth_flush_buffers(queue, index, 1);
3848  return 0;
3849 out:
3851  return -EBUSY;
3852 }
3854 
3855 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3856  struct sk_buff *skb, struct qeth_hdr *hdr,
3857  int elements_needed)
3858 {
3859  struct qeth_qdio_out_buffer *buffer;
3860  int start_index;
3861  int flush_count = 0;
3862  int do_pack = 0;
3863  int tmp;
3864  int rc = 0;
3865 
3866  /* spin until we get the queue ... */
3867  while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3869  start_index = queue->next_buf_to_fill;
3870  buffer = queue->bufs[queue->next_buf_to_fill];
3871  /*
3872  * check if buffer is empty to make sure that we do not 'overtake'
3873  * ourselves and try to fill a buffer that is already primed
3874  */
3875  if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3877  return -EBUSY;
3878  }
3879  /* check if we need to switch packing state of this queue */
3880  qeth_switch_to_packing_if_needed(queue);
3881  if (queue->do_pack) {
3882  do_pack = 1;
3883  /* does packet fit in current buffer? */
3884  if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3885  buffer->next_element_to_fill) < elements_needed) {
3886  /* ... no -> set state PRIMED */
3888  flush_count++;
3889  queue->next_buf_to_fill =
3890  (queue->next_buf_to_fill + 1) %
3891  QDIO_MAX_BUFFERS_PER_Q;
3892  buffer = queue->bufs[queue->next_buf_to_fill];
3893  /* we did a step forward, so check buffer state
3894  * again */
3895  if (atomic_read(&buffer->state) !=
3897  qeth_flush_buffers(queue, start_index,
3898  flush_count);
3899  atomic_set(&queue->state,
3901  return -EBUSY;
3902  }
3903  }
3904  }
3905  tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3906  queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3907  QDIO_MAX_BUFFERS_PER_Q;
3908  flush_count += tmp;
3909  if (flush_count)
3910  qeth_flush_buffers(queue, start_index, flush_count);
3911  else if (!atomic_read(&queue->set_pci_flags_count))
3913  /*
3914  * queue->state will go from LOCKED -> UNLOCKED or from
3915  * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3916  * (switch packing state or flush buffer to get another pci flag out).
3917  * In that case we will enter this loop
3918  */
3919  while (atomic_dec_return(&queue->state)) {
3920  flush_count = 0;
3921  start_index = queue->next_buf_to_fill;
3922  /* check if we can go back to non-packing state */
3923  flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3924  /*
3925  * check if we need to flush a packing buffer to get a pci
3926  * flag out on the queue
3927  */
3928  if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3929  flush_count += qeth_flush_buffers_on_no_pci(queue);
3930  if (flush_count)
3931  qeth_flush_buffers(queue, start_index, flush_count);
3932  }
3933  /* at this point the queue is UNLOCKED again */
3934  if (queue->card->options.performance_stats && do_pack)
3935  queue->card->perf_stats.bufs_sent_pack += flush_count;
3936 
3937  return rc;
3938 }
3940 
3941 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3942  struct qeth_reply *reply, unsigned long data)
3943 {
3944  struct qeth_ipa_cmd *cmd;
3945  struct qeth_ipacmd_setadpparms *setparms;
3946 
3947  QETH_CARD_TEXT(card, 4, "prmadpcb");
3948 
3949  cmd = (struct qeth_ipa_cmd *) data;
3950  setparms = &(cmd->data.setadapterparms);
3951 
3952  qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3953  if (cmd->hdr.return_code) {
3954  QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3955  setparms->data.mode = SET_PROMISC_MODE_OFF;
3956  }
3957  card->info.promisc_mode = setparms->data.mode;
3958  return 0;
3959 }
3960 
3962 {
3964  struct net_device *dev = card->dev;
3965  struct qeth_cmd_buffer *iob;
3966  struct qeth_ipa_cmd *cmd;
3967 
3968  QETH_CARD_TEXT(card, 4, "setprom");
3969 
3970  if (((dev->flags & IFF_PROMISC) &&
3971  (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3972  (!(dev->flags & IFF_PROMISC) &&
3973  (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3974  return;
3975  mode = SET_PROMISC_MODE_OFF;
3976  if (dev->flags & IFF_PROMISC)
3977  mode = SET_PROMISC_MODE_ON;
3978  QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3979 
3981  sizeof(struct qeth_ipacmd_setadpparms));
3982  cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3983  cmd->data.setadapterparms.data.mode = mode;
3984  qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3985 }
3987 
3988 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3989 {
3990  struct qeth_card *card;
3991  char dbf_text[15];
3992 
3993  card = dev->ml_priv;
3994 
3995  QETH_CARD_TEXT(card, 4, "chgmtu");
3996  sprintf(dbf_text, "%8x", new_mtu);
3997  QETH_CARD_TEXT(card, 4, dbf_text);
3998 
3999  if (new_mtu < 64)
4000  return -EINVAL;
4001  if (new_mtu > 65535)
4002  return -EINVAL;
4003  if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4004  (!qeth_mtu_is_valid(card, new_mtu)))
4005  return -EINVAL;
4006  dev->mtu = new_mtu;
4007  return 0;
4008 }
4010 
4012 {
4013  struct qeth_card *card;
4014 
4015  card = dev->ml_priv;
4016 
4017  QETH_CARD_TEXT(card, 5, "getstat");
4018 
4019  return &card->stats;
4020 }
4022 
4023 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4024  struct qeth_reply *reply, unsigned long data)
4025 {
4026  struct qeth_ipa_cmd *cmd;
4027 
4028  QETH_CARD_TEXT(card, 4, "chgmaccb");
4029 
4030  cmd = (struct qeth_ipa_cmd *) data;
4031  if (!card->options.layer2 ||
4032  !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4033  memcpy(card->dev->dev_addr,
4034  &cmd->data.setadapterparms.data.change_addr.addr,
4035  OSA_ADDR_LEN);
4036  card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4037  }
4038  qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4039  return 0;
4040 }
4041 
4043 {
4044  int rc;
4045  struct qeth_cmd_buffer *iob;
4046  struct qeth_ipa_cmd *cmd;
4047 
4048  QETH_CARD_TEXT(card, 4, "chgmac");
4049 
4051  sizeof(struct qeth_ipacmd_setadpparms));
4052  cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4053  cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4054  cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4055  memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4056  card->dev->dev_addr, OSA_ADDR_LEN);
4057  rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4058  NULL);
4059  return rc;
4060 }
4062 
4063 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4064  struct qeth_reply *reply, unsigned long data)
4065 {
4066  struct qeth_ipa_cmd *cmd;
4067  struct qeth_set_access_ctrl *access_ctrl_req;
4068 
4069  QETH_CARD_TEXT(card, 4, "setaccb");
4070 
4071  cmd = (struct qeth_ipa_cmd *) data;
4072  access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4073  QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4074  QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4075  QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4076  cmd->data.setadapterparms.hdr.return_code);
4077  switch (cmd->data.setadapterparms.hdr.return_code) {
4081  {
4082  card->options.isolation = access_ctrl_req->subcmd_code;
4083  if (card->options.isolation == ISOLATION_MODE_NONE) {
4084  dev_info(&card->gdev->dev,
4085  "QDIO data connection isolation is deactivated\n");
4086  } else {
4087  dev_info(&card->gdev->dev,
4088  "QDIO data connection isolation is activated\n");
4089  }
4090  QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4091  card->gdev->dev.kobj.name,
4092  access_ctrl_req->subcmd_code,
4093  cmd->data.setadapterparms.hdr.return_code);
4094  break;
4095  }
4097  {
4098  QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4099  card->gdev->dev.kobj.name,
4100  access_ctrl_req->subcmd_code,
4101  cmd->data.setadapterparms.hdr.return_code);
4102  dev_err(&card->gdev->dev, "Adapter does not "
4103  "support QDIO data connection isolation\n");
4104 
4105  /* ensure isolation mode is "none" */
4106  card->options.isolation = ISOLATION_MODE_NONE;
4107  break;
4108  }
4110  {
4111  QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4112  card->gdev->dev.kobj.name,
4113  access_ctrl_req->subcmd_code,
4114  cmd->data.setadapterparms.hdr.return_code);
4115  dev_err(&card->gdev->dev,
4116  "Adapter is dedicated. "
4117  "QDIO data connection isolation not supported\n");
4118 
4119  /* ensure isolation mode is "none" */
4120  card->options.isolation = ISOLATION_MODE_NONE;
4121  break;
4122  }
4124  {
4125  QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4126  card->gdev->dev.kobj.name,
4127  access_ctrl_req->subcmd_code,
4128  cmd->data.setadapterparms.hdr.return_code);
4129  dev_err(&card->gdev->dev,
4130  "TSO does not permit QDIO data connection isolation\n");
4131 
4132  /* ensure isolation mode is "none" */
4133  card->options.isolation = ISOLATION_MODE_NONE;
4134  break;
4135  }
4136  default:
4137  {
4138  /* this should never happen */
4139  QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4140  "==UNKNOWN\n",
4141  card->gdev->dev.kobj.name,
4142  access_ctrl_req->subcmd_code,
4143  cmd->data.setadapterparms.hdr.return_code);
4144 
4145  /* ensure isolation mode is "none" */
4146  card->options.isolation = ISOLATION_MODE_NONE;
4147  break;
4148  }
4149  }
4150  qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4151  return 0;
4152 }
4153 
4154 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4155  enum qeth_ipa_isolation_modes isolation)
4156 {
4157  int rc;
4158  struct qeth_cmd_buffer *iob;
4159  struct qeth_ipa_cmd *cmd;
4160  struct qeth_set_access_ctrl *access_ctrl_req;
4161 
4162  QETH_CARD_TEXT(card, 4, "setacctl");
4163 
4164  QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4165  QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4166 
4168  sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4169  sizeof(struct qeth_set_access_ctrl));
4170  cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4171  access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4172  access_ctrl_req->subcmd_code = isolation;
4173 
4174  rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4175  NULL);
4176  QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4177  return rc;
4178 }
4179 
4181 {
4182  int rc = 0;
4183 
4184  QETH_CARD_TEXT(card, 4, "setactlo");
4185 
4186  if ((card->info.type == QETH_CARD_TYPE_OSD ||
4187  card->info.type == QETH_CARD_TYPE_OSX) &&
4189  rc = qeth_setadpparms_set_access_ctrl(card,
4190  card->options.isolation);
4191  if (rc) {
4192  QETH_DBF_MESSAGE(3,
4193  "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4194  card->gdev->dev.kobj.name,
4195  rc);
4196  }
4197  } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4198  card->options.isolation = ISOLATION_MODE_NONE;
4199 
4200  dev_err(&card->gdev->dev, "Adapter does not "
4201  "support QDIO data connection isolation\n");
4202  rc = -EOPNOTSUPP;
4203  }
4204  return rc;
4205 }
4207 
4209 {
4210  struct qeth_card *card;
4211 
4212  card = dev->ml_priv;
4213  QETH_CARD_TEXT(card, 4, "txtimeo");
4214  card->stats.tx_errors++;
4215  qeth_schedule_recovery(card);
4216 }
4218 
4219 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4220 {
4221  struct qeth_card *card = dev->ml_priv;
4222  int rc = 0;
4223 
4224  switch (regnum) {
4225  case MII_BMCR: /* Basic mode control register */
4226  rc = BMCR_FULLDPLX;
4227  if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4228  (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4229  (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4230  rc |= BMCR_SPEED100;
4231  break;
4232  case MII_BMSR: /* Basic mode status register */
4235  BMSR_100BASE4;
4236  break;
4237  case MII_PHYSID1: /* PHYS ID 1 */
4238  rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4239  dev->dev_addr[2];
4240  rc = (rc >> 5) & 0xFFFF;
4241  break;
4242  case MII_PHYSID2: /* PHYS ID 2 */
4243  rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4244  break;
4245  case MII_ADVERTISE: /* Advertisement control reg */
4246  rc = ADVERTISE_ALL;
4247  break;
4248  case MII_LPA: /* Link partner ability reg */
4251  break;
4252  case MII_EXPANSION: /* Expansion register */
4253  break;
4254  case MII_DCOUNTER: /* disconnect counter */
4255  break;
4256  case MII_FCSCOUNTER: /* false carrier counter */
4257  break;
4258  case MII_NWAYTEST: /* N-way auto-neg test register */
4259  break;
4260  case MII_RERRCOUNTER: /* rx error counter */
4261  rc = card->stats.rx_errors;
4262  break;
4263  case MII_SREVISION: /* silicon revision */
4264  break;
4265  case MII_RESV1: /* reserved 1 */
4266  break;
4267  case MII_LBRERROR: /* loopback, rx, bypass error */
4268  break;
4269  case MII_PHYADDR: /* physical address */
4270  break;
4271  case MII_RESV2: /* reserved 2 */
4272  break;
4273  case MII_TPISTATUS: /* TPI status for 10mbps */
4274  break;
4275  case MII_NCONFIG: /* network interface config */
4276  break;
4277  default:
4278  break;
4279  }
4280  return rc;
4281 }
4283 
4284 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4285  struct qeth_cmd_buffer *iob, int len,
4286  int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4287  unsigned long),
4288  void *reply_param)
4289 {
4290  u16 s1, s2;
4291 
4292  QETH_CARD_TEXT(card, 4, "sendsnmp");
4293 
4296  &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4297  /* adjust PDU length fields in IPA_PDU_HEADER */
4298  s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4299  s2 = (u32) len;
4300  memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4301  memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4302  memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4303  memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4304  return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4305  reply_cb, reply_param);
4306 }
4307 
4308 static int qeth_snmp_command_cb(struct qeth_card *card,
4309  struct qeth_reply *reply, unsigned long sdata)
4310 {
4311  struct qeth_ipa_cmd *cmd;
4312  struct qeth_arp_query_info *qinfo;
4313  struct qeth_snmp_cmd *snmp;
4314  unsigned char *data;
4315  __u16 data_len;
4316 
4317  QETH_CARD_TEXT(card, 3, "snpcmdcb");
4318 
4319  cmd = (struct qeth_ipa_cmd *) sdata;
4320  data = (unsigned char *)((char *)cmd - reply->offset);
4321  qinfo = (struct qeth_arp_query_info *) reply->param;
4322  snmp = &cmd->data.setadapterparms.data.snmp;
4323 
4324  if (cmd->hdr.return_code) {
4325  QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4326  return 0;
4327  }
4328  if (cmd->data.setadapterparms.hdr.return_code) {
4329  cmd->hdr.return_code =
4330  cmd->data.setadapterparms.hdr.return_code;
4331  QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4332  return 0;
4333  }
4334  data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4335  if (cmd->data.setadapterparms.hdr.seq_no == 1)
4336  data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4337  else
4338  data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4339 
4340  /* check if there is enough room in userspace */
4341  if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4342  QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4343  cmd->hdr.return_code = IPA_RC_ENOMEM;
4344  return 0;
4345  }
4346  QETH_CARD_TEXT_(card, 4, "snore%i",
4347  cmd->data.setadapterparms.hdr.used_total);
4348  QETH_CARD_TEXT_(card, 4, "sseqn%i",
4349  cmd->data.setadapterparms.hdr.seq_no);
4350  /*copy entries to user buffer*/
4351  if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4352  memcpy(qinfo->udata + qinfo->udata_offset,
4353  (char *)snmp,
4354  data_len + offsetof(struct qeth_snmp_cmd, data));
4355  qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4356  } else {
4357  memcpy(qinfo->udata + qinfo->udata_offset,
4358  (char *)&snmp->request, data_len);
4359  }
4360  qinfo->udata_offset += data_len;
4361  /* check if all replies received ... */
4362  QETH_CARD_TEXT_(card, 4, "srtot%i",
4363  cmd->data.setadapterparms.hdr.used_total);
4364  QETH_CARD_TEXT_(card, 4, "srseq%i",
4365  cmd->data.setadapterparms.hdr.seq_no);
4366  if (cmd->data.setadapterparms.hdr.seq_no <
4367  cmd->data.setadapterparms.hdr.used_total)
4368  return 1;
4369  return 0;
4370 }
4371 
4372 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4373 {
4374  struct qeth_cmd_buffer *iob;
4375  struct qeth_ipa_cmd *cmd;
4376  struct qeth_snmp_ureq *ureq;
4377  int req_len;
4378  struct qeth_arp_query_info qinfo = {0, };
4379  int rc = 0;
4380 
4381  QETH_CARD_TEXT(card, 3, "snmpcmd");
4382 
4383  if (card->info.guestlan)
4384  return -EOPNOTSUPP;
4385 
4387  (!card->options.layer2)) {
4388  return -EOPNOTSUPP;
4389  }
4390  /* skip 4 bytes (data_len struct member) to get req_len */
4391  if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4392  return -EFAULT;
4393  ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4394  if (IS_ERR(ureq)) {
4395  QETH_CARD_TEXT(card, 2, "snmpnome");
4396  return PTR_ERR(ureq);
4397  }
4398  qinfo.udata_len = ureq->hdr.data_len;
4399  qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4400  if (!qinfo.udata) {
4401  kfree(ureq);
4402  return -ENOMEM;
4403  }
4404  qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4405 
4407  QETH_SNMP_SETADP_CMDLENGTH + req_len);
4408  cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4409  memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4410  rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4411  qeth_snmp_command_cb, (void *)&qinfo);
4412  if (rc)
4413  QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4414  QETH_CARD_IFNAME(card), rc);
4415  else {
4416  if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4417  rc = -EFAULT;
4418  }
4419 
4420  kfree(ureq);
4421  kfree(qinfo.udata);
4422  return rc;
4423 }
4425 
4426 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4427  struct qeth_reply *reply, unsigned long data)
4428 {
4429  struct qeth_ipa_cmd *cmd;
4430  struct qeth_qoat_priv *priv;
4431  char *resdata;
4432  int resdatalen;
4433 
4434  QETH_CARD_TEXT(card, 3, "qoatcb");
4435 
4436  cmd = (struct qeth_ipa_cmd *)data;
4437  priv = (struct qeth_qoat_priv *)reply->param;
4438  resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4439  resdata = (char *)data + 28;
4440 
4441  if (resdatalen > (priv->buffer_len - priv->response_len)) {
4442  cmd->hdr.return_code = IPA_RC_FFFF;
4443  return 0;
4444  }
4445 
4446  memcpy((priv->buffer + priv->response_len), resdata,
4447  resdatalen);
4448  priv->response_len += resdatalen;
4449 
4450  if (cmd->data.setadapterparms.hdr.seq_no <
4451  cmd->data.setadapterparms.hdr.used_total)
4452  return 1;
4453  return 0;
4454 }
4455 
4456 int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4457 {
4458  int rc = 0;
4459  struct qeth_cmd_buffer *iob;
4460  struct qeth_ipa_cmd *cmd;
4461  struct qeth_query_oat *oat_req;
4462  struct qeth_query_oat_data oat_data;
4463  struct qeth_qoat_priv priv;
4464  void __user *tmp;
4465 
4466  QETH_CARD_TEXT(card, 3, "qoatcmd");
4467 
4469  rc = -EOPNOTSUPP;
4470  goto out;
4471  }
4472 
4473  if (copy_from_user(&oat_data, udata,
4474  sizeof(struct qeth_query_oat_data))) {
4475  rc = -EFAULT;
4476  goto out;
4477  }
4478 
4479  priv.buffer_len = oat_data.buffer_len;
4480  priv.response_len = 0;
4481  priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4482  if (!priv.buffer) {
4483  rc = -ENOMEM;
4484  goto out;
4485  }
4486 
4488  sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4489  sizeof(struct qeth_query_oat));
4490  cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4491  oat_req = &cmd->data.setadapterparms.data.query_oat;
4492  oat_req->subcmd_code = oat_data.command;
4493 
4494  rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4495  &priv);
4496  if (!rc) {
4497  if (is_compat_task())
4498  tmp = compat_ptr(oat_data.ptr);
4499  else
4500  tmp = (void __user *)(unsigned long)oat_data.ptr;
4501 
4502  if (copy_to_user(tmp, priv.buffer,
4503  priv.response_len)) {
4504  rc = -EFAULT;
4505  goto out_free;
4506  }
4507 
4508  oat_data.response_len = priv.response_len;
4509 
4510  if (copy_to_user(udata, &oat_data,
4511  sizeof(struct qeth_query_oat_data)))
4512  rc = -EFAULT;
4513  } else
4514  if (rc == IPA_RC_FFFF)
4515  rc = -EFAULT;
4516 
4517 out_free:
4518  kfree(priv.buffer);
4519 out:
4520  return rc;
4521 }
4523 
4524 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4525 {
4526  switch (card->info.type) {
4527  case QETH_CARD_TYPE_IQD:
4528  return 2;
4529  default:
4530  return 0;
4531  }
4532 }
4533 
4534 static void qeth_determine_capabilities(struct qeth_card *card)
4535 {
4536  int rc;
4537  int length;
4538  char *prcd;
4539  struct ccw_device *ddev;
4540  int ddev_offline = 0;
4541 
4542  QETH_DBF_TEXT(SETUP, 2, "detcapab");
4543  ddev = CARD_DDEV(card);
4544  if (!ddev->online) {
4545  ddev_offline = 1;
4546  rc = ccw_device_set_online(ddev);
4547  if (rc) {
4548  QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4549  goto out;
4550  }
4551  }
4552 
4553  rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4554  if (rc) {
4555  QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4556  dev_name(&card->gdev->dev), rc);
4557  QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4558  goto out_offline;
4559  }
4560  qeth_configure_unitaddr(card, prcd);
4561  if (ddev_offline)
4562  qeth_configure_blkt_default(card, prcd);
4563  kfree(prcd);
4564 
4565  rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4566  if (rc)
4567  QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4568 
4569  QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4570  QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4571  QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4572  QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4573  if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4574  ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4575  ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4576  dev_info(&card->gdev->dev,
4577  "Completion Queueing supported\n");
4578  } else {
4579  card->options.cq = QETH_CQ_NOTAVAILABLE;
4580  }
4581 
4582 
4583 out_offline:
4584  if (ddev_offline == 1)
4585  ccw_device_set_offline(ddev);
4586 out:
4587  return;
4588 }
4589 
4590 static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4591  struct qdio_buffer **in_sbal_ptrs,
4592  void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4593  int i;
4594 
4595  if (card->options.cq == QETH_CQ_ENABLED) {
4596  int offset = QDIO_MAX_BUFFERS_PER_Q *
4597  (card->qdio.no_in_queues - 1);
4598  i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4599  for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4600  in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4601  virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4602  }
4603 
4604  queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4605  }
4606 }
4607 
4608 static int qeth_qdio_establish(struct qeth_card *card)
4609 {
4610  struct qdio_initialize init_data;
4611  char *qib_param_field;
4612  struct qdio_buffer **in_sbal_ptrs;
4613  void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4614  struct qdio_buffer **out_sbal_ptrs;
4615  int i, j, k;
4616  int rc = 0;
4617 
4618  QETH_DBF_TEXT(SETUP, 2, "qdioest");
4619 
4620  qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4621  GFP_KERNEL);
4622  if (!qib_param_field) {
4623  rc = -ENOMEM;
4624  goto out_free_nothing;
4625  }
4626 
4627  qeth_create_qib_param_field(card, qib_param_field);
4628  qeth_create_qib_param_field_blkt(card, qib_param_field);
4629 
4630  in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
4631  QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4632  GFP_KERNEL);
4633  if (!in_sbal_ptrs) {
4634  rc = -ENOMEM;
4635  goto out_free_qib_param;
4636  }
4637  for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4638  in_sbal_ptrs[i] = (struct qdio_buffer *)
4639  virt_to_phys(card->qdio.in_q->bufs[i].buffer);
4640  }
4641 
4642  queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4643  GFP_KERNEL);
4644  if (!queue_start_poll) {
4645  rc = -ENOMEM;
4646  goto out_free_in_sbals;
4647  }
4648  for (i = 0; i < card->qdio.no_in_queues; ++i)
4649  queue_start_poll[i] = card->discipline->start_poll;
4650 
4651  qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
4652 
4653  out_sbal_ptrs =
4654  kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4655  sizeof(void *), GFP_KERNEL);
4656  if (!out_sbal_ptrs) {
4657  rc = -ENOMEM;
4658  goto out_free_queue_start_poll;
4659  }
4660  for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4661  for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4662  out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
4663  card->qdio.out_qs[i]->bufs[j]->buffer);
4664  }
4665 
4666  memset(&init_data, 0, sizeof(struct qdio_initialize));
4667  init_data.cdev = CARD_DDEV(card);
4668  init_data.q_format = qeth_get_qdio_q_format(card);
4669  init_data.qib_param_field_format = 0;
4670  init_data.qib_param_field = qib_param_field;
4671  init_data.no_input_qs = card->qdio.no_in_queues;
4672  init_data.no_output_qs = card->qdio.no_out_queues;
4673  init_data.input_handler = card->discipline->input_handler;
4674  init_data.output_handler = card->discipline->output_handler;
4675  init_data.queue_start_poll_array = queue_start_poll;
4676  init_data.int_parm = (unsigned long) card;
4677  init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4678  init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
4679  init_data.output_sbal_state_array = card->qdio.out_bufstates;
4680  init_data.scan_threshold =
4681  (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4682 
4683  if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4685  rc = qdio_allocate(&init_data);
4686  if (rc) {
4687  atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4688  goto out;
4689  }
4690  rc = qdio_establish(&init_data);
4691  if (rc) {
4692  atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4693  qdio_free(CARD_DDEV(card));
4694  }
4695  }
4696 
4697  switch (card->options.cq) {
4698  case QETH_CQ_ENABLED:
4699  dev_info(&card->gdev->dev, "Completion Queue support enabled");
4700  break;
4701  case QETH_CQ_DISABLED:
4702  dev_info(&card->gdev->dev, "Completion Queue support disabled");
4703  break;
4704  default:
4705  break;
4706  }
4707 out:
4708  kfree(out_sbal_ptrs);
4709 out_free_queue_start_poll:
4710  kfree(queue_start_poll);
4711 out_free_in_sbals:
4712  kfree(in_sbal_ptrs);
4713 out_free_qib_param:
4714  kfree(qib_param_field);
4715 out_free_nothing:
4716  return rc;
4717 }
4718 
4719 static void qeth_core_free_card(struct qeth_card *card)
4720 {
4721 
4722  QETH_DBF_TEXT(SETUP, 2, "freecrd");
4723  QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4724  qeth_clean_channel(&card->read);
4725  qeth_clean_channel(&card->write);
4726  if (card->dev)
4727  free_netdev(card->dev);
4728  kfree(card->ip_tbd_list);
4729  qeth_free_qdio_buffers(card);
4731  kfree(card);
4732 }
4733 
4734 static struct ccw_device_id qeth_ids[] = {
4735  {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4736  .driver_info = QETH_CARD_TYPE_OSD},
4737  {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4738  .driver_info = QETH_CARD_TYPE_IQD},
4739  {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4740  .driver_info = QETH_CARD_TYPE_OSN},
4741  {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4742  .driver_info = QETH_CARD_TYPE_OSM},
4743  {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4744  .driver_info = QETH_CARD_TYPE_OSX},
4745  {},
4746 };
4747 MODULE_DEVICE_TABLE(ccw, qeth_ids);
4748 
4749 static struct ccw_driver qeth_ccw_driver = {
4750  .driver = {
4751  .owner = THIS_MODULE,
4752  .name = "qeth",
4753  },
4754  .ids = qeth_ids,
4755  .probe = ccwgroup_probe_ccwdev,
4756  .remove = ccwgroup_remove_ccwdev,
4757 };
4758 
4760 {
4761  int retries = 0;
4762  int rc;
4763 
4764  QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4765  atomic_set(&card->force_alloc_skb, 0);
4766  qeth_update_from_chp_desc(card);
4767 retry:
4768  if (retries)
4769  QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4770  dev_name(&card->gdev->dev));
4774  rc = ccw_device_set_online(CARD_RDEV(card));
4775  if (rc)
4776  goto retriable;
4777  rc = ccw_device_set_online(CARD_WDEV(card));
4778  if (rc)
4779  goto retriable;
4780  rc = ccw_device_set_online(CARD_DDEV(card));
4781  if (rc)
4782  goto retriable;
4783  rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
4784 retriable:
4785  if (rc == -ERESTARTSYS) {
4786  QETH_DBF_TEXT(SETUP, 2, "break1");
4787  return rc;
4788  } else if (rc) {
4789  QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4790  if (++retries > 3)
4791  goto out;
4792  else
4793  goto retry;
4794  }
4795  qeth_determine_capabilities(card);
4796  qeth_init_tokens(card);
4797  qeth_init_func_level(card);
4798  rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4799  if (rc == -ERESTARTSYS) {
4800  QETH_DBF_TEXT(SETUP, 2, "break2");
4801  return rc;
4802  } else if (rc) {
4803  QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4804  if (--retries < 0)
4805  goto out;
4806  else
4807  goto retry;
4808  }
4809  rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4810  if (rc == -ERESTARTSYS) {
4811  QETH_DBF_TEXT(SETUP, 2, "break3");
4812  return rc;
4813  } else if (rc) {
4814  QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4815  if (--retries < 0)
4816  goto out;
4817  else
4818  goto retry;
4819  }
4820  card->read_or_write_problem = 0;
4821  rc = qeth_mpc_initialize(card);
4822  if (rc) {
4823  QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4824  goto out;
4825  }
4826 
4827  card->options.ipa4.supported_funcs = 0;
4828  card->options.adp.supported_funcs = 0;
4829  card->info.diagass_support = 0;
4834  qeth_query_setdiagass(card);
4835  return 0;
4836 out:
4837  dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4838  "an error on the device\n");
4839  QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4840  dev_name(&card->gdev->dev), rc);
4841  return rc;
4842 }
4844 
4845 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4846  struct qdio_buffer_element *element,
4847  struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4848 {
4849  struct page *page = virt_to_page(element->addr);
4850  if (*pskb == NULL) {
4851  if (qethbuffer->rx_skb) {
4852  /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4853  *pskb = qethbuffer->rx_skb;
4854  qethbuffer->rx_skb = NULL;
4855  } else {
4856  *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4857  if (!(*pskb))
4858  return -ENOMEM;
4859  }
4860 
4861  skb_reserve(*pskb, ETH_HLEN);
4862  if (data_len <= QETH_RX_PULL_LEN) {
4863  memcpy(skb_put(*pskb, data_len), element->addr + offset,
4864  data_len);
4865  } else {
4866  get_page(page);
4868  element->addr + offset, QETH_RX_PULL_LEN);
4869  skb_fill_page_desc(*pskb, *pfrag, page,
4870  offset + QETH_RX_PULL_LEN,
4871  data_len - QETH_RX_PULL_LEN);
4872  (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4873  (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4874  (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4875  (*pfrag)++;
4876  }
4877  } else {
4878  get_page(page);
4879  skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4880  (*pskb)->data_len += data_len;
4881  (*pskb)->len += data_len;
4882  (*pskb)->truesize += data_len;
4883  (*pfrag)++;
4884  }
4885 
4886 
4887  return 0;
4888 }
4889 
4891  struct qeth_qdio_buffer *qethbuffer,
4892  struct qdio_buffer_element **__element, int *__offset,
4893  struct qeth_hdr **hdr)
4894 {
4895  struct qdio_buffer_element *element = *__element;
4896  struct qdio_buffer *buffer = qethbuffer->buffer;
4897  int offset = *__offset;
4898  struct sk_buff *skb = NULL;
4899  int skb_len = 0;
4900  void *data_ptr;
4901  int data_len;
4902  int headroom = 0;
4903  int use_rx_sg = 0;
4904  int frag = 0;
4905 
4906  /* qeth_hdr must not cross element boundaries */
4907  if (element->length < offset + sizeof(struct qeth_hdr)) {
4908  if (qeth_is_last_sbale(element))
4909  return NULL;
4910  element++;
4911  offset = 0;
4912  if (element->length < sizeof(struct qeth_hdr))
4913  return NULL;
4914  }
4915  *hdr = element->addr + offset;
4916 
4917  offset += sizeof(struct qeth_hdr);
4918  switch ((*hdr)->hdr.l2.id) {
4920  skb_len = (*hdr)->hdr.l2.pkt_length;
4921  break;
4923  skb_len = (*hdr)->hdr.l3.length;
4924  headroom = ETH_HLEN;
4925  break;
4926  case QETH_HEADER_TYPE_OSN:
4927  skb_len = (*hdr)->hdr.osn.pdu_length;
4928  headroom = sizeof(struct qeth_hdr);
4929  break;
4930  default:
4931  break;
4932  }
4933 
4934  if (!skb_len)
4935  return NULL;
4936 
4937  if (((skb_len >= card->options.rx_sg_cb) &&
4938  (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4939  (!atomic_read(&card->force_alloc_skb))) ||
4940  (card->options.cq == QETH_CQ_ENABLED)) {
4941  use_rx_sg = 1;
4942  } else {
4943  skb = dev_alloc_skb(skb_len + headroom);
4944  if (!skb)
4945  goto no_mem;
4946  if (headroom)
4947  skb_reserve(skb, headroom);
4948  }
4949 
4950  data_ptr = element->addr + offset;
4951  while (skb_len) {
4952  data_len = min(skb_len, (int)(element->length - offset));
4953  if (data_len) {
4954  if (use_rx_sg) {
4955  if (qeth_create_skb_frag(qethbuffer, element,
4956  &skb, offset, &frag, data_len))
4957  goto no_mem;
4958  } else {
4959  memcpy(skb_put(skb, data_len), data_ptr,
4960  data_len);
4961  }
4962  }
4963  skb_len -= data_len;
4964  if (skb_len) {
4965  if (qeth_is_last_sbale(element)) {
4966  QETH_CARD_TEXT(card, 4, "unexeob");
4967  QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4968  dev_kfree_skb_any(skb);
4969  card->stats.rx_errors++;
4970  return NULL;
4971  }
4972  element++;
4973  offset = 0;
4974  data_ptr = element->addr;
4975  } else {
4976  offset += data_len;
4977  }
4978  }
4979  *__element = element;
4980  *__offset = offset;
4981  if (use_rx_sg && card->options.performance_stats) {
4982  card->perf_stats.sg_skbs_rx++;
4983  card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4984  }
4985  return skb;
4986 no_mem:
4987  if (net_ratelimit()) {
4988  QETH_CARD_TEXT(card, 2, "noskbmem");
4989  }
4990  card->stats.rx_dropped++;
4991  return NULL;
4992 }
4994 
4995 static void qeth_unregister_dbf_views(void)
4996 {
4997  int x;
4998  for (x = 0; x < QETH_DBF_INFOS; x++) {
4999  debug_unregister(qeth_dbf[x].id);
5000  qeth_dbf[x].id = NULL;
5001  }
5002 }
5003 
5004 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
5005 {
5006  char dbf_txt_buf[32];
5007  va_list args;
5008 
5009  if (level > id->level)
5010  return;
5011  va_start(args, fmt);
5012  vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5013  va_end(args);
5014  debug_text_event(id, level, dbf_txt_buf);
5015 }
5017 
5018 static int qeth_register_dbf_views(void)
5019 {
5020  int ret;
5021  int x;
5022 
5023  for (x = 0; x < QETH_DBF_INFOS; x++) {
5024  /* register the areas */
5025  qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5026  qeth_dbf[x].pages,
5027  qeth_dbf[x].areas,
5028  qeth_dbf[x].len);
5029  if (qeth_dbf[x].id == NULL) {
5030  qeth_unregister_dbf_views();
5031  return -ENOMEM;
5032  }
5033 
5034  /* register a view */
5035  ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5036  if (ret) {
5037  qeth_unregister_dbf_views();
5038  return ret;
5039  }
5040 
5041  /* set a passing level */
5042  debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5043  }
5044 
5045  return 0;
5046 }
5047 
5049  enum qeth_discipline_id discipline)
5050 {
5051  int rc = 0;
5052  mutex_lock(&qeth_mod_mutex);
5053  switch (discipline) {
5056  symbol_get(qeth_l3_discipline), "qeth_l3");
5057  break;
5060  symbol_get(qeth_l2_discipline), "qeth_l2");
5061  break;
5062  }
5063  if (!card->discipline) {
5064  dev_err(&card->gdev->dev, "There is no kernel module to "
5065  "support discipline %d\n", discipline);
5066  rc = -EINVAL;
5067  }
5068  mutex_unlock(&qeth_mod_mutex);
5069  return rc;
5070 }
5071 
5073 {
5074  if (card->options.layer2)
5076  else
5078  card->discipline = NULL;
5079 }
5080 
5081 static const struct device_type qeth_generic_devtype = {
5082  .name = "qeth_generic",
5083  .groups = qeth_generic_attr_groups,
5084 };
5085 static const struct device_type qeth_osn_devtype = {
5086  .name = "qeth_osn",
5087  .groups = qeth_osn_attr_groups,
5088 };
5089 
5090 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5091 {
5092  struct qeth_card *card;
5093  struct device *dev;
5094  int rc;
5095  unsigned long flags;
5096  char dbf_name[20];
5097 
5098  QETH_DBF_TEXT(SETUP, 2, "probedev");
5099 
5100  dev = &gdev->dev;
5101  if (!get_device(dev))
5102  return -ENODEV;
5103 
5104  QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
5105 
5106  card = qeth_alloc_card();
5107  if (!card) {
5108  QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
5109  rc = -ENOMEM;
5110  goto err_dev;
5111  }
5112 
5113  snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5114  dev_name(&gdev->dev));
5115  card->debug = debug_register(dbf_name, 2, 1, 8);
5116  if (!card->debug) {
5117  QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5118  rc = -ENOMEM;
5119  goto err_card;
5120  }
5122 
5123  card->read.ccwdev = gdev->cdev[0];
5124  card->write.ccwdev = gdev->cdev[1];
5125  card->data.ccwdev = gdev->cdev[2];
5126  dev_set_drvdata(&gdev->dev, card);
5127  card->gdev = gdev;
5128  gdev->cdev[0]->handler = qeth_irq;
5129  gdev->cdev[1]->handler = qeth_irq;
5130  gdev->cdev[2]->handler = qeth_irq;
5131 
5132  rc = qeth_determine_card_type(card);
5133  if (rc) {
5134  QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5135  goto err_dbf;
5136  }
5137  rc = qeth_setup_card(card);
5138  if (rc) {
5139  QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
5140  goto err_dbf;
5141  }
5142 
5143  if (card->info.type == QETH_CARD_TYPE_OSN)
5144  gdev->dev.type = &qeth_osn_devtype;
5145  else
5146  gdev->dev.type = &qeth_generic_devtype;
5147 
5148  switch (card->info.type) {
5149  case QETH_CARD_TYPE_OSN:
5150  case QETH_CARD_TYPE_OSM:
5152  if (rc)
5153  goto err_dbf;
5154  rc = card->discipline->setup(card->gdev);
5155  if (rc)
5156  goto err_disc;
5157  case QETH_CARD_TYPE_OSD:
5158  case QETH_CARD_TYPE_OSX:
5159  default:
5160  break;
5161  }
5162 
5163  write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5164  list_add_tail(&card->list, &qeth_core_card_list.list);
5166 
5167  qeth_determine_capabilities(card);
5168  return 0;
5169 
5170 err_disc:
5172 err_dbf:
5173  debug_unregister(card->debug);
5174 err_card:
5175  qeth_core_free_card(card);
5176 err_dev:
5177  put_device(dev);
5178  return rc;
5179 }
5180 
5181 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5182 {
5183  unsigned long flags;
5184  struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5185 
5186  QETH_DBF_TEXT(SETUP, 2, "removedv");
5187 
5188  if (card->discipline) {
5189  card->discipline->remove(gdev);
5191  }
5192 
5193  debug_unregister(card->debug);
5194  write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5195  list_del(&card->list);
5197  qeth_core_free_card(card);
5198  dev_set_drvdata(&gdev->dev, NULL);
5199  put_device(&gdev->dev);
5200  return;
5201 }
5202 
5203 static int qeth_core_set_online(struct ccwgroup_device *gdev)
5204 {
5205  struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5206  int rc = 0;
5207  int def_discipline;
5208 
5209  if (!card->discipline) {
5210  if (card->info.type == QETH_CARD_TYPE_IQD)
5211  def_discipline = QETH_DISCIPLINE_LAYER3;
5212  else
5213  def_discipline = QETH_DISCIPLINE_LAYER2;
5214  rc = qeth_core_load_discipline(card, def_discipline);
5215  if (rc)
5216  goto err;
5217  rc = card->discipline->setup(card->gdev);
5218  if (rc)
5219  goto err;
5220  }
5221  rc = card->discipline->set_online(gdev);
5222 err:
5223  return rc;
5224 }
5225 
5226 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5227 {
5228  struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5229  return card->discipline->set_offline(gdev);
5230 }
5231 
5232 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5233 {
5234  struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5235  if (card->discipline && card->discipline->shutdown)
5236  card->discipline->shutdown(gdev);
5237 }
5238 
5239 static int qeth_core_prepare(struct ccwgroup_device *gdev)
5240 {
5241  struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5242  if (card->discipline && card->discipline->prepare)
5243  return card->discipline->prepare(gdev);
5244  return 0;
5245 }
5246 
5247 static void qeth_core_complete(struct ccwgroup_device *gdev)
5248 {
5249  struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5250  if (card->discipline && card->discipline->complete)
5251  card->discipline->complete(gdev);
5252 }
5253 
5254 static int qeth_core_freeze(struct ccwgroup_device *gdev)
5255 {
5256  struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5257  if (card->discipline && card->discipline->freeze)
5258  return card->discipline->freeze(gdev);
5259  return 0;
5260 }
5261 
5262 static int qeth_core_thaw(struct ccwgroup_device *gdev)
5263 {
5264  struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5265  if (card->discipline && card->discipline->thaw)
5266  return card->discipline->thaw(gdev);
5267  return 0;
5268 }
5269 
5270 static int qeth_core_restore(struct ccwgroup_device *gdev)
5271 {
5272  struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5273  if (card->discipline && card->discipline->restore)
5274  return card->discipline->restore(gdev);
5275  return 0;
5276 }
5277 
5278 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5279  .driver = {
5280  .owner = THIS_MODULE,
5281  .name = "qeth",
5282  },
5283  .setup = qeth_core_probe_device,
5284  .remove = qeth_core_remove_device,
5285  .set_online = qeth_core_set_online,
5286  .set_offline = qeth_core_set_offline,
5287  .shutdown = qeth_core_shutdown,
5288  .prepare = qeth_core_prepare,
5289  .complete = qeth_core_complete,
5290  .freeze = qeth_core_freeze,
5291  .thaw = qeth_core_thaw,
5292  .restore = qeth_core_restore,
5293 };
5294 
5295 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5296  const char *buf, size_t count)
5297 {
5298  int err;
5299 
5300  err = ccwgroup_create_dev(qeth_core_root_dev,
5301  &qeth_core_ccwgroup_driver, 3, buf);
5302 
5303  return err ? err : count;
5304 }
5305 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5306 
5307 static struct attribute *qeth_drv_attrs[] = {
5308  &driver_attr_group.attr,
5309  NULL,
5310 };
5311 static struct attribute_group qeth_drv_attr_group = {
5312  .attrs = qeth_drv_attrs,
5313 };
5314 static const struct attribute_group *qeth_drv_attr_groups[] = {
5315  &qeth_drv_attr_group,
5316  NULL,
5317 };
5318 
5319 static struct {
5320  const char str[ETH_GSTRING_LEN];
5321 } qeth_ethtool_stats_keys[] = {
5322 /* 0 */{"rx skbs"},
5323  {"rx buffers"},
5324  {"tx skbs"},
5325  {"tx buffers"},
5326  {"tx skbs no packing"},
5327  {"tx buffers no packing"},
5328  {"tx skbs packing"},
5329  {"tx buffers packing"},
5330  {"tx sg skbs"},
5331  {"tx sg frags"},
5332 /* 10 */{"rx sg skbs"},
5333  {"rx sg frags"},
5334  {"rx sg page allocs"},
5335  {"tx large kbytes"},
5336  {"tx large count"},
5337  {"tx pk state ch n->p"},
5338  {"tx pk state ch p->n"},
5339  {"tx pk watermark low"},
5340  {"tx pk watermark high"},
5341  {"queue 0 buffer usage"},
5342 /* 20 */{"queue 1 buffer usage"},
5343  {"queue 2 buffer usage"},
5344  {"queue 3 buffer usage"},
5345  {"rx poll time"},
5346  {"rx poll count"},
5347  {"rx do_QDIO time"},
5348  {"rx do_QDIO count"},
5349  {"tx handler time"},
5350  {"tx handler count"},
5351  {"tx time"},
5352 /* 30 */{"tx count"},
5353  {"tx do_QDIO time"},
5354  {"tx do_QDIO count"},
5355  {"tx csum"},
5356  {"tx lin"},
5357  {"cq handler count"},
5358  {"cq handler time"}
5359 };
5360 
5361 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
5362 {
5363  switch (stringset) {
5364  case ETH_SS_STATS:
5365  return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5366  default:
5367  return -EINVAL;
5368  }
5369 }
5371 
5373  struct ethtool_stats *stats, u64 *data)
5374 {
5375  struct qeth_card *card = dev->ml_priv;
5376  data[0] = card->stats.rx_packets -
5377  card->perf_stats.initial_rx_packets;
5378  data[1] = card->perf_stats.bufs_rec;
5379  data[2] = card->stats.tx_packets -
5380  card->perf_stats.initial_tx_packets;
5381  data[3] = card->perf_stats.bufs_sent;
5382  data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5383  - card->perf_stats.skbs_sent_pack;
5384  data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5385  data[6] = card->perf_stats.skbs_sent_pack;
5386  data[7] = card->perf_stats.bufs_sent_pack;
5387  data[8] = card->perf_stats.sg_skbs_sent;
5388  data[9] = card->perf_stats.sg_frags_sent;
5389  data[10] = card->perf_stats.sg_skbs_rx;
5390  data[11] = card->perf_stats.sg_frags_rx;
5391  data[12] = card->perf_stats.sg_alloc_page_rx;
5392  data[13] = (card->perf_stats.large_send_bytes >> 10);
5393  data[14] = card->perf_stats.large_send_cnt;
5394  data[15] = card->perf_stats.sc_dp_p;
5395  data[16] = card->perf_stats.sc_p_dp;
5396  data[17] = QETH_LOW_WATERMARK_PACK;
5397  data[18] = QETH_HIGH_WATERMARK_PACK;
5398  data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5399  data[20] = (card->qdio.no_out_queues > 1) ?
5400  atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5401  data[21] = (card->qdio.no_out_queues > 2) ?
5402  atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5403  data[22] = (card->qdio.no_out_queues > 3) ?
5404  atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5405  data[23] = card->perf_stats.inbound_time;
5406  data[24] = card->perf_stats.inbound_cnt;
5407  data[25] = card->perf_stats.inbound_do_qdio_time;
5408  data[26] = card->perf_stats.inbound_do_qdio_cnt;
5409  data[27] = card->perf_stats.outbound_handler_time;
5410  data[28] = card->perf_stats.outbound_handler_cnt;
5411  data[29] = card->perf_stats.outbound_time;
5412  data[30] = card->perf_stats.outbound_cnt;
5413  data[31] = card->perf_stats.outbound_do_qdio_time;
5414  data[32] = card->perf_stats.outbound_do_qdio_cnt;
5415  data[33] = card->perf_stats.tx_csum;
5416  data[34] = card->perf_stats.tx_lin;
5417  data[35] = card->perf_stats.cq_cnt;
5418  data[36] = card->perf_stats.cq_time;
5419 }
5421 
5422 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5423 {
5424  switch (stringset) {
5425  case ETH_SS_STATS:
5426  memcpy(data, &qeth_ethtool_stats_keys,
5427  sizeof(qeth_ethtool_stats_keys));
5428  break;
5429  default:
5430  WARN_ON(1);
5431  break;
5432  }
5433 }
5435 
5437  struct ethtool_drvinfo *info)
5438 {
5439  struct qeth_card *card = dev->ml_priv;
5440  if (card->options.layer2)
5441  strcpy(info->driver, "qeth_l2");
5442  else
5443  strcpy(info->driver, "qeth_l3");
5444 
5445  strcpy(info->version, "1.0");
5446  strcpy(info->fw_version, card->info.mcl_level);
5447  sprintf(info->bus_info, "%s/%s/%s",
5448  CARD_RDEV_ID(card),
5449  CARD_WDEV_ID(card),
5450  CARD_DDEV_ID(card));
5451 }
5453 
5455  struct ethtool_cmd *ecmd)
5456 {
5457  struct qeth_card *card = netdev->ml_priv;
5458  enum qeth_link_types link_type;
5459 
5460  if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5461  link_type = QETH_LINK_TYPE_10GBIT_ETH;
5462  else
5463  link_type = card->info.link_type;
5464 
5465  ecmd->transceiver = XCVR_INTERNAL;
5466  ecmd->supported = SUPPORTED_Autoneg;
5468  ecmd->duplex = DUPLEX_FULL;
5469  ecmd->autoneg = AUTONEG_ENABLE;
5470 
5471  switch (link_type) {
5478  SUPPORTED_TP;
5483  ADVERTISED_TP;
5484  ecmd->speed = SPEED_100;
5485  ecmd->port = PORT_TP;
5486  break;
5487 
5504  ecmd->speed = SPEED_1000;
5505  ecmd->port = PORT_FIBRE;
5506  break;
5507 
5525  ecmd->speed = SPEED_10000;
5526  ecmd->port = PORT_FIBRE;
5527  break;
5528 
5529  default:
5532  SUPPORTED_TP;
5535  ADVERTISED_TP;
5536  ecmd->speed = SPEED_10;
5537  ecmd->port = PORT_TP;
5538  }
5539 
5540  return 0;
5541 }
5543 
5544 static int __init qeth_core_init(void)
5545 {
5546  int rc;
5547 
5548  pr_info("loading core functions\n");
5549  INIT_LIST_HEAD(&qeth_core_card_list.list);
5551  mutex_init(&qeth_mod_mutex);
5552 
5553  rc = qeth_register_dbf_views();
5554  if (rc)
5555  goto out_err;
5556  qeth_core_root_dev = root_device_register("qeth");
5557  rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5558  if (rc)
5559  goto register_err;
5560  qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5561  sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5562  if (!qeth_core_header_cache) {
5563  rc = -ENOMEM;
5564  goto slab_err;
5565  }
5566  qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5567  sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5568  if (!qeth_qdio_outbuf_cache) {
5569  rc = -ENOMEM;
5570  goto cqslab_err;
5571  }
5572  rc = ccw_driver_register(&qeth_ccw_driver);
5573  if (rc)
5574  goto ccw_err;
5575  qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5576  rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5577  if (rc)
5578  goto ccwgroup_err;
5579 
5580  return 0;
5581 
5582 ccwgroup_err:
5583  ccw_driver_unregister(&qeth_ccw_driver);
5584 ccw_err:
5585  kmem_cache_destroy(qeth_qdio_outbuf_cache);
5586 cqslab_err:
5587  kmem_cache_destroy(qeth_core_header_cache);
5588 slab_err:
5589  root_device_unregister(qeth_core_root_dev);
5590 register_err:
5591  qeth_unregister_dbf_views();
5592 out_err:
5593  pr_err("Initializing the qeth device driver failed\n");
5594  return rc;
5595 }
5596 
5597 static void __exit qeth_core_exit(void)
5598 {
5599  ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5600  ccw_driver_unregister(&qeth_ccw_driver);
5601  kmem_cache_destroy(qeth_qdio_outbuf_cache);
5602  kmem_cache_destroy(qeth_core_header_cache);
5603  root_device_unregister(qeth_core_root_dev);
5604  qeth_unregister_dbf_views();
5605  pr_info("core functions removed\n");
5606 }
5607 
5608 module_init(qeth_core_init);
5609 module_exit(qeth_core_exit);
5610 MODULE_AUTHOR("Frank Blaschka <[email protected]>");
5611 MODULE_DESCRIPTION("qeth core functions");
5612 MODULE_LICENSE("GPL");