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sw.c
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1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * wlanfae <[email protected]>
23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24  * Hsinchu 300, Taiwan.
25  *
26  * Larry Finger <[email protected]>
27  *
28  *****************************************************************************/
29 
30 #include "../wifi.h"
31 #include "../core.h"
32 #include "../pci.h"
33 #include "reg.h"
34 #include "def.h"
35 #include "phy.h"
36 #include "dm.h"
37 #include "hw.h"
38 #include "rf.h"
39 #include "sw.h"
40 #include "trx.h"
41 #include "led.h"
42 
43 #include <linux/module.h>
44 
45 static void rtl92c_init_aspm_vars(struct ieee80211_hw *hw)
46 {
47  struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
48 
49  /*close ASPM for AMD defaultly */
50  rtlpci->const_amdpci_aspm = 0;
51 
52  /*
53  * ASPM PS mode.
54  * 0 - Disable ASPM,
55  * 1 - Enable ASPM without Clock Req,
56  * 2 - Enable ASPM with Clock Req,
57  * 3 - Alwyas Enable ASPM with Clock Req,
58  * 4 - Always Enable ASPM without Clock Req.
59  * set defult to RTL8192CE:3 RTL8192E:2
60  * */
61  rtlpci->const_pci_aspm = 3;
62 
63  /*Setting for PCI-E device */
64  rtlpci->const_devicepci_aspm_setting = 0x03;
65 
66  /*Setting for PCI-E bridge */
67  rtlpci->const_hostpci_aspm_setting = 0x02;
68 
69  /*
70  * In Hw/Sw Radio Off situation.
71  * 0 - Default,
72  * 1 - From ASPM setting without low Mac Pwr,
73  * 2 - From ASPM setting with low Mac Pwr,
74  * 3 - Bus D3
75  * set default to RTL8192CE:0 RTL8192SE:2
76  */
77  rtlpci->const_hwsw_rfoff_d3 = 0;
78 
79  /*
80  * This setting works for those device with
81  * backdoor ASPM setting such as EPHY setting.
82  * 0 - Not support ASPM,
83  * 1 - Support ASPM,
84  * 2 - According to chipset.
85  */
86  rtlpci->const_support_pciaspm = 1;
87 }
88 
90 {
91  int err;
92  struct rtl_priv *rtlpriv = rtl_priv(hw);
93  struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
94  struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
95 
97 
98  rtlpriv->dm.dm_initialgain_enable = true;
99  rtlpriv->dm.dm_flag = 0;
100  rtlpriv->dm.disable_framebursting = false;
101  rtlpriv->dm.thermalvalue = 0;
102  rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13);
103 
104  /* compatible 5G band 88ce just 2.4G band & smsp */
105  rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
106  rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
107  rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
108 
109  rtlpci->receive_config = (RCR_APPFCS |
110  RCR_AMF |
111  RCR_ADF |
112  RCR_APP_MIC |
113  RCR_APP_ICV |
114  RCR_AICV |
115  RCR_ACRC32 |
116  RCR_AB |
117  RCR_AM |
118  RCR_APM |
120 
121  rtlpci->irq_mask[0] =
122  (u32) (IMR_ROK |
123  IMR_VODOK |
124  IMR_VIDOK |
125  IMR_BEDOK |
126  IMR_BKDOK |
127  IMR_MGNTDOK |
129 
130  rtlpci->irq_mask[1] = (u32) (IMR_CPWM | IMR_C2HCMD | 0);
131 
132  /* for debug level */
133  rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug;
134  /* for LPS & IPS */
135  rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
136  rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
137  rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
138  if (!rtlpriv->psc.inactiveps)
139  pr_info("rtl8192ce: Power Save off (module option)\n");
140  if (!rtlpriv->psc.fwctrl_lps)
141  pr_info("rtl8192ce: FW Power Save off (module option)\n");
142  rtlpriv->psc.reg_fwctrl_lps = 3;
143  rtlpriv->psc.reg_max_lps_awakeintvl = 5;
144  /* for ASPM, you can close aspm through
145  * set const_support_pciaspm = 0 */
146  rtl92c_init_aspm_vars(hw);
147 
148  if (rtlpriv->psc.reg_fwctrl_lps == 1)
149  rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
150  else if (rtlpriv->psc.reg_fwctrl_lps == 2)
151  rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
152  else if (rtlpriv->psc.reg_fwctrl_lps == 3)
153  rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
154 
155  /* for firmware buf */
156  rtlpriv->rtlhal.pfirmware = vzalloc(0x4000);
157  if (!rtlpriv->rtlhal.pfirmware) {
158  RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
159  "Can't alloc buffer for fw\n");
160  return 1;
161  }
162 
163  /* request fw */
164  if (IS_VENDOR_UMC_A_CUT(rtlhal->version) &&
165  !IS_92C_SERIAL(rtlhal->version)) {
166  rtlpriv->cfg->fw_name = "rtlwifi/rtl8192cfwU.bin";
167  } else if (IS_81xxC_VENDOR_UMC_B_CUT(rtlhal->version)) {
168  rtlpriv->cfg->fw_name = "rtlwifi/rtl8192cfwU_B.bin";
169  pr_info("****** This B_CUT device may not work with kernels 3.6 and earlier\n");
170  }
171 
172  rtlpriv->max_fw_size = 0x4000;
173  pr_info("Using firmware %s\n", rtlpriv->cfg->fw_name);
174  err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name,
175  rtlpriv->io.dev, GFP_KERNEL, hw,
176  rtl_fw_cb);
177  if (err) {
178  RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
179  "Failed to request firmware!\n");
180  return 1;
181  }
182 
183  return 0;
184 }
185 
187 {
188  struct rtl_priv *rtlpriv = rtl_priv(hw);
189 
190  if (rtlpriv->rtlhal.pfirmware) {
191  vfree(rtlpriv->rtlhal.pfirmware);
192  rtlpriv->rtlhal.pfirmware = NULL;
193  }
194 }
195 
196 static struct rtl_hal_ops rtl8192ce_hal_ops = {
197  .init_sw_vars = rtl92c_init_sw_vars,
198  .deinit_sw_vars = rtl92c_deinit_sw_vars,
199  .read_eeprom_info = rtl92ce_read_eeprom_info,
200  .interrupt_recognized = rtl92ce_interrupt_recognized,
201  .hw_init = rtl92ce_hw_init,
202  .hw_disable = rtl92ce_card_disable,
203  .hw_suspend = rtl92ce_suspend,
204  .hw_resume = rtl92ce_resume,
205  .enable_interrupt = rtl92ce_enable_interrupt,
206  .disable_interrupt = rtl92ce_disable_interrupt,
207  .set_network_type = rtl92ce_set_network_type,
208  .set_chk_bssid = rtl92ce_set_check_bssid,
209  .set_qos = rtl92ce_set_qos,
211  .set_bcn_intv = rtl92ce_set_beacon_interval,
212  .update_interrupt_mask = rtl92ce_update_interrupt_mask,
213  .get_hw_reg = rtl92ce_get_hw_reg,
214  .set_hw_reg = rtl92ce_set_hw_reg,
215  .update_rate_tbl = rtl92ce_update_hal_rate_tbl,
216  .fill_tx_desc = rtl92ce_tx_fill_desc,
217  .fill_tx_cmddesc = rtl92ce_tx_fill_cmddesc,
218  .query_rx_desc = rtl92ce_rx_query_desc,
219  .set_channel_access = rtl92ce_update_channel_access_setting,
220  .radio_onoff_checking = rtl92ce_gpio_radio_on_off_checking,
221  .set_bw_mode = rtl92c_phy_set_bw_mode,
222  .switch_channel = rtl92c_phy_sw_chnl,
223  .dm_watchdog = rtl92c_dm_watchdog,
224  .scan_operation_backup = rtl92c_phy_scan_operation_backup,
225  .set_rf_power_state = rtl92c_phy_set_rf_power_state,
226  .led_control = rtl92ce_led_control,
227  .set_desc = rtl92ce_set_desc,
228  .get_desc = rtl92ce_get_desc,
229  .tx_polling = rtl92ce_tx_polling,
230  .enable_hw_sec = rtl92ce_enable_hw_security_config,
231  .set_key = rtl92ce_set_key,
232  .init_sw_leds = rtl92ce_init_sw_leds,
233  .get_bbreg = rtl92c_phy_query_bb_reg,
234  .set_bbreg = rtl92c_phy_set_bb_reg,
235  .set_rfreg = rtl92ce_phy_set_rf_reg,
236  .get_rfreg = rtl92c_phy_query_rf_reg,
237  .phy_rf6052_config = rtl92ce_phy_rf6052_config,
238  .phy_rf6052_set_cck_txpower = rtl92ce_phy_rf6052_set_cck_txpower,
239  .phy_rf6052_set_ofdm_txpower = rtl92ce_phy_rf6052_set_ofdm_txpower,
240  .config_bb_with_headerfile = _rtl92ce_phy_config_bb_with_headerfile,
241  .config_bb_with_pgheaderfile = _rtl92ce_phy_config_bb_with_pgheaderfile,
242  .phy_lc_calibrate = _rtl92ce_phy_lc_calibrate,
243  .phy_set_bw_mode_callback = rtl92ce_phy_set_bw_mode_callback,
244  .dm_dynamic_txpower = rtl92ce_dm_dynamic_txpower,
245 };
246 
247 static struct rtl_mod_params rtl92ce_mod_params = {
248  .sw_crypto = false,
249  .inactiveps = true,
250  .swctrl_lps = false,
251  .fwctrl_lps = true,
252  .debug = DBG_EMERG,
253 };
254 
255 static struct rtl_hal_cfg rtl92ce_hal_cfg = {
256  .bar_id = 2,
257  .write_readback = true,
258  .name = "rtl92c_pci",
259  .fw_name = "rtlwifi/rtl8192cfw.bin",
260  .ops = &rtl8192ce_hal_ops,
261  .mod_params = &rtl92ce_mod_params,
262 
264  .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
265  .maps[SYS_CLK] = REG_SYS_CLKR,
266  .maps[MAC_RCR_AM] = AM,
267  .maps[MAC_RCR_AB] = AB,
268  .maps[MAC_RCR_ACRC32] = ACRC32,
269  .maps[MAC_RCR_ACF] = ACF,
270  .maps[MAC_RCR_AAP] = AAP,
271 
272  .maps[EFUSE_TEST] = REG_EFUSE_TEST,
273  .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
274  .maps[EFUSE_CLK] = 0,
276  .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
277  .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
279  .maps[EFUSE_ANA8M] = EFUSE_ANA8M,
283 
284  .maps[RWCAM] = REG_CAMCMD,
285  .maps[WCAMI] = REG_CAMWRITE,
286  .maps[RCAMO] = REG_CAMREAD,
287  .maps[CAMDBG] = REG_CAMDBG,
288  .maps[SECR] = REG_SECCFG,
289  .maps[SEC_CAM_NONE] = CAM_NONE,
290  .maps[SEC_CAM_WEP40] = CAM_WEP40,
291  .maps[SEC_CAM_TKIP] = CAM_TKIP,
292  .maps[SEC_CAM_AES] = CAM_AES,
293  .maps[SEC_CAM_WEP104] = CAM_WEP104,
294 
301  .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,
302  .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
303  .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
304  .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
305  .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
306  .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
307  .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
308  .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
311 
312  .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
314  .maps[RTL_IMR_BcnInt] = IMR_BCNINT,
315  .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
316  .maps[RTL_IMR_RDU] = IMR_RDU,
317  .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
318  .maps[RTL_IMR_BDOK] = IMR_BDOK,
319  .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
320  .maps[RTL_IMR_TBDER] = IMR_TBDER,
321  .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
322  .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
323  .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
324  .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
325  .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
326  .maps[RTL_IMR_VODOK] = IMR_VODOK,
327  .maps[RTL_IMR_ROK] = IMR_ROK,
329 
342 
345 };
346 
347 static DEFINE_PCI_DEVICE_TABLE(rtl92ce_pci_ids) = {
348  {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8191, rtl92ce_hal_cfg)},
349  {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8178, rtl92ce_hal_cfg)},
350  {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8177, rtl92ce_hal_cfg)},
351  {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8176, rtl92ce_hal_cfg)},
352  {},
353 };
354 
355 MODULE_DEVICE_TABLE(pci, rtl92ce_pci_ids);
356 
357 MODULE_AUTHOR("lizhaoming <[email protected]>");
358 MODULE_AUTHOR("Realtek WlanFAE <[email protected]>");
359 MODULE_AUTHOR("Larry Finger <[email protected]>");
360 MODULE_LICENSE("GPL");
361 MODULE_DESCRIPTION("Realtek 8192C/8188C 802.11n PCI wireless");
362 MODULE_FIRMWARE("rtlwifi/rtl8192cfw.bin");
363 MODULE_FIRMWARE("rtlwifi/rtl8192cfwU.bin");
364 MODULE_FIRMWARE("rtlwifi/rtl8192cfwU_B.bin");
365 
366 module_param_named(swenc, rtl92ce_mod_params.sw_crypto, bool, 0444);
367 module_param_named(debug, rtl92ce_mod_params.debug, int, 0444);
368 module_param_named(ips, rtl92ce_mod_params.inactiveps, bool, 0444);
369 module_param_named(swlps, rtl92ce_mod_params.swctrl_lps, bool, 0444);
370 module_param_named(fwlps, rtl92ce_mod_params.fwctrl_lps, bool, 0444);
371 MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
372 MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
373 MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
374 MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
375 MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)");
376 
377 static const struct dev_pm_ops rtlwifi_pm_ops = {
378  .suspend = rtl_pci_suspend,
379  .resume = rtl_pci_resume,
380  .freeze = rtl_pci_suspend,
381  .thaw = rtl_pci_resume,
382  .poweroff = rtl_pci_suspend,
383  .restore = rtl_pci_resume,
384 };
385 
386 static struct pci_driver rtl92ce_driver = {
387  .name = KBUILD_MODNAME,
388  .id_table = rtl92ce_pci_ids,
389  .probe = rtl_pci_probe,
390  .remove = rtl_pci_disconnect,
391  .driver.pm = &rtlwifi_pm_ops,
392 };
393 
394 module_pci_driver(rtl92ce_driver);