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rtl_core.h
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1 /******************************************************************************
2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3  *
4  * Based on the r8180 driver, which is:
5  * Copyright 2004-2005 Andrea Merello <[email protected]>, et al.
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of version 2 of the GNU General Public License as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18  *
19  * The full GNU General Public License is included in this distribution in the
20  * file called LICENSE.
21  *
22  * Contact Information:
23  * wlanfae <[email protected]>
24 ******************************************************************************/
25 
26 #ifndef _RTL_CORE_H
27 #define _RTL_CORE_H
28 
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/sched.h>
34 #include <linux/types.h>
35 #include <linux/interrupt.h>
36 #include <linux/slab.h>
37 #include <linux/netdevice.h>
38 #include <linux/pci.h>
39 #include <linux/etherdevice.h>
40 #include <linux/delay.h>
41 #include <linux/rtnetlink.h>
42 #include <linux/wireless.h>
43 #include <linux/timer.h>
44 #include <linux/proc_fs.h>
45 #include <linux/if_arp.h>
46 #include <linux/random.h>
47 #include <linux/io.h>
48 
49 /* Need this defined before including local include files */
50 #define DRV_NAME "rtl819xE"
51 
52 #include "../rtllib.h"
53 
54 #include "../dot11d.h"
55 
56 #include "r8192E_firmware.h"
57 #include "r8192E_hw.h"
58 
59 #include "r8190P_def.h"
60 #include "r8192E_dev.h"
61 
62 #include "rtl_eeprom.h"
63 #include "rtl_ps.h"
64 #include "rtl_pci.h"
65 #include "rtl_cam.h"
66 
67 #define DRV_COPYRIGHT \
68  "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
69 #define DRV_AUTHOR "<[email protected]>"
70 #define DRV_VERSION "0014.0401.2010"
71 
72 #define IS_HARDWARE_TYPE_819xP(_priv) \
73  ((((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8190P) || \
74  (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192E))
75 #define IS_HARDWARE_TYPE_8192SE(_priv) \
76  (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192SE)
77 #define IS_HARDWARE_TYPE_8192CE(_priv) \
78  (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CE)
79 #define IS_HARDWARE_TYPE_8192CU(_priv) \
80  (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CU)
81 #define IS_HARDWARE_TYPE_8192DE(_priv) \
82  (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DE)
83 #define IS_HARDWARE_TYPE_8192DU(_priv) \
84  (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DU)
85 
86 #define RTL_PCI_DEVICE(vend, dev, cfg) \
87  .vendor = (vend), .device = (dev), \
88  .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID , \
89  .driver_data = (kernel_ulong_t)&(cfg)
90 
91 #define irqreturn_type irqreturn_t
92 
93 #define rtl8192_interrupt(x, y, z) rtl8192_interrupt_rsl(x, y)
94 
95 #define RTL_MAX_SCAN_SIZE 128
96 
97 #define RTL_RATE_MAX 30
98 
99 #define TOTAL_CAM_ENTRY 32
100 #define CAM_CONTENT_COUNT 8
101 
102 #ifndef BIT
103 #define BIT(_i) (1<<(_i))
104 #endif
105 
106 #define IS_NIC_DOWN(priv) (!(priv)->up)
107 
108 #define IS_ADAPTER_SENDS_BEACON(dev) 0
109 
110 #define IS_UNDER_11N_AES_MODE(_rtllib) \
111  ((_rtllib->pHTInfo->bCurrentHTSupport == true) && \
112  (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
113 
114 #define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
115 #define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
116 #define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
117 #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
118 #define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000
119 #define HAL_HW_PCI_REVISION_ID_8192SE 0x10
120 #define HAL_HW_PCI_REVISION_ID_8192CE 0x1
121 #define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000
122 #define HAL_HW_PCI_REVISION_ID_8192DE 0x0
123 #define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000
124 
125 #define HAL_HW_PCI_8180_DEVICE_ID 0x8180
126 #define HAL_HW_PCI_8185_DEVICE_ID 0x8185
127 #define HAL_HW_PCI_8188_DEVICE_ID 0x8188
128 #define HAL_HW_PCI_8198_DEVICE_ID 0x8198
129 #define HAL_HW_PCI_8190_DEVICE_ID 0x8190
130 #define HAL_HW_PCI_8192_DEVICE_ID 0x8192
131 #define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192
132 #define HAL_HW_PCI_8174_DEVICE_ID 0x8174
133 #define HAL_HW_PCI_8173_DEVICE_ID 0x8173
134 #define HAL_HW_PCI_8172_DEVICE_ID 0x8172
135 #define HAL_HW_PCI_8171_DEVICE_ID 0x8171
136 #define HAL_HW_PCI_0045_DEVICE_ID 0x0045
137 #define HAL_HW_PCI_0046_DEVICE_ID 0x0046
138 #define HAL_HW_PCI_0044_DEVICE_ID 0x0044
139 #define HAL_HW_PCI_0047_DEVICE_ID 0x0047
140 #define HAL_HW_PCI_700F_DEVICE_ID 0x700F
141 #define HAL_HW_PCI_701F_DEVICE_ID 0x701F
142 #define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
143 #define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191
144 #define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178
145 #define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177
146 #define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176
147 #define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191
148 #define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D
149 #define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D
150 
151 #define RTL819X_DEFAULT_RF_TYPE RF_1T2R
152 
153 #define RTLLIB_WATCH_DOG_TIME 2000
154 
155 #define MAX_DEV_ADDR_SIZE 8 /*support till 64 bit bus width OS*/
156 #define MAX_FIRMWARE_INFORMATION_SIZE 32
157 #define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
158 #define ENCRYPTION_MAX_OVERHEAD 128
159 #define MAX_FRAGMENT_COUNT 8
160 #define MAX_TRANSMIT_BUFFER_SIZE \
161  (1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) * \
162  MAX_FRAGMENT_COUNT)
163 
164 #define scrclng 4
165 
166 #define DEFAULT_FRAG_THRESHOLD 2342U
167 #define MIN_FRAG_THRESHOLD 256U
168 #define DEFAULT_BEACONINTERVAL 0x64U
169 
170 #define DEFAULT_SSID ""
171 #define DEFAULT_RETRY_RTS 7
172 #define DEFAULT_RETRY_DATA 7
173 #define PRISM_HDR_SIZE 64
174 
175 #define PHY_RSSI_SLID_WIN_MAX 100
176 
177 #define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 30)
178 
179 #define TxBBGainTableLength 37
180 #define CCKTxBBGainTableLength 23
181 
182 #define CHANNEL_PLAN_LEN 10
183 #define sCrcLng 4
184 
185 #define NIC_SEND_HANG_THRESHOLD_NORMAL 4
186 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
187 
188 #define MAX_TX_QUEUE 9
189 
190 #define MAX_RX_QUEUE 1
191 
192 #define MAX_RX_COUNT 64
193 #define MAX_TX_QUEUE_COUNT 9
194 
195 enum RTL819x_PHY_PARAM {
196  RTL819X_PHY_MACPHY_REG = 0,
197  RTL819X_PHY_MACPHY_REG_PG = 1,
198  RTL8188C_PHY_MACREG = 2,
199  RTL8192C_PHY_MACREG = 3,
200  RTL819X_PHY_REG = 4,
201  RTL819X_PHY_REG_1T2R = 5,
202  RTL819X_PHY_REG_to1T1R = 6,
203  RTL819X_PHY_REG_to1T2R = 7,
204  RTL819X_PHY_REG_to2T2R = 8,
205  RTL819X_PHY_REG_PG = 9,
206  RTL819X_AGC_TAB = 10,
207  RTL819X_PHY_RADIO_A = 11,
208  RTL819X_PHY_RADIO_A_1T = 12,
209  RTL819X_PHY_RADIO_A_2T = 13,
210  RTL819X_PHY_RADIO_B = 14,
211  RTL819X_PHY_RADIO_B_GM = 15,
212  RTL819X_PHY_RADIO_C = 16,
213  RTL819X_PHY_RADIO_D = 17,
214  RTL819X_EEPROM_MAP = 18,
215  RTL819X_EFUSE_MAP = 19,
216 };
217 
218 enum nic_t {
219  NIC_UNKNOWN = 0,
220  NIC_8192E = 1,
221  NIC_8190P = 2,
222  NIC_8192SE = 4,
223  NIC_8192CE = 5,
224  NIC_8192CU = 6,
225  NIC_8192DE = 7,
226  NIC_8192DU = 8,
227 };
228 
229 enum rt_eeprom_type {
230  EEPROM_93C46,
231  EEPROM_93C56,
232  EEPROM_BOOT_EFUSE,
233 };
234 
235 enum dcmg_txcmd_op {
236  TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
237  TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
238  TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
239  TXCMD_SET_TX_DURATION = 0xFF900003,
240  TXCMD_SET_RX_RSSI = 0xFF900004,
241  TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
242  TXCMD_XXXX_CTRL,
243 };
244 
245 enum rt_rf_type_819xu {
246  RF_TYPE_MIN = 0,
247  RF_8225,
248  RF_8256,
249  RF_8258,
250  RF_6052 = 4,
251  RF_PSEUDO_11N = 5,
252 };
253 
254 enum rf_step {
255  RF_STEP_INIT = 0,
256  RF_STEP_NORMAL,
257  RF_STEP_MAX
258 };
259 
260 enum rt_status {
261  RT_STATUS_SUCCESS,
262  RT_STATUS_FAILURE,
263  RT_STATUS_PENDING,
264  RT_STATUS_RESOURCE
265 };
266 
267 enum rt_customer_id {
268  RT_CID_DEFAULT = 0,
269  RT_CID_8187_ALPHA0 = 1,
270  RT_CID_8187_SERCOMM_PS = 2,
271  RT_CID_8187_HW_LED = 3,
272  RT_CID_8187_NETGEAR = 4,
273  RT_CID_WHQL = 5,
274  RT_CID_819x_CAMEO = 6,
275  RT_CID_819x_RUNTOP = 7,
276  RT_CID_819x_Senao = 8,
277  RT_CID_TOSHIBA = 9,
278  RT_CID_819x_Netcore = 10,
279  RT_CID_Nettronix = 11,
280  RT_CID_DLINK = 12,
281  RT_CID_PRONET = 13,
282  RT_CID_COREGA = 14,
283  RT_CID_819x_ALPHA = 15,
284  RT_CID_819x_Sitecom = 16,
285  RT_CID_CCX = 17,
286  RT_CID_819x_Lenovo = 18,
287  RT_CID_819x_QMI = 19,
288  RT_CID_819x_Edimax_Belkin = 20,
289  RT_CID_819x_Sercomm_Belkin = 21,
290  RT_CID_819x_CAMEO1 = 22,
291  RT_CID_819x_MSI = 23,
292  RT_CID_819x_Acer = 24,
293  RT_CID_819x_HP = 27,
294  RT_CID_819x_CLEVO = 28,
295  RT_CID_819x_Arcadyan_Belkin = 29,
296  RT_CID_819x_SAMSUNG = 30,
297  RT_CID_819x_WNC_COREGA = 31,
298 };
299 
300 enum reset_type {
301  RESET_TYPE_NORESET = 0x00,
302  RESET_TYPE_NORMAL = 0x01,
303  RESET_TYPE_SILENT = 0x02
304 };
305 
306 enum ic_inferiority_8192s {
307  IC_INFERIORITY_A = 0,
308  IC_INFERIORITY_B = 1,
309 };
310 
311 enum pci_bridge_vendor {
312  PCI_BRIDGE_VENDOR_INTEL = 0x0,
313  PCI_BRIDGE_VENDOR_ATI,
314  PCI_BRIDGE_VENDOR_AMD,
315  PCI_BRIDGE_VENDOR_SIS ,
316  PCI_BRIDGE_VENDOR_UNKNOWN,
317  PCI_BRIDGE_VENDOR_MAX ,
318 };
319 
320 struct buffer {
321  struct buffer *next;
322  u32 *buf;
323  dma_addr_t dma;
324 
325 };
326 
327 struct rtl_reg_debug {
328  unsigned int cmd;
329  struct {
330  unsigned char type;
331  unsigned char addr;
332  unsigned char page;
333  unsigned char length;
334  } head;
335  unsigned char buf[0xff];
336 };
337 
338 struct rt_tx_rahis {
339  u32 cck[4];
340  u32 ofdm[8];
341  u32 ht_mcs[4][16];
342 };
343 
344 struct rt_smooth_data_4rf {
345  char elements[4][100];
346  u32 index;
347  u32 TotalNum;
348  u32 TotalVal[4];
349 };
350 
351 struct rt_stats {
352  unsigned long txrdu;
353  unsigned long rxrdu;
354  unsigned long rxok;
355  unsigned long rxframgment;
356  unsigned long rxurberr;
357  unsigned long rxstaterr;
358  unsigned long rxdatacrcerr;
359  unsigned long rxmgmtcrcerr;
360  unsigned long rxcrcerrmin;
361  unsigned long rxcrcerrmid;
362  unsigned long rxcrcerrmax;
363  unsigned long received_rate_histogram[4][32];
364  unsigned long received_preamble_GI[2][32];
365  unsigned long rx_AMPDUsize_histogram[5];
366  unsigned long rx_AMPDUnum_histogram[5];
367  unsigned long numpacket_matchbssid;
368  unsigned long numpacket_toself;
369  unsigned long num_process_phyinfo;
370  unsigned long numqry_phystatus;
371  unsigned long numqry_phystatusCCK;
372  unsigned long numqry_phystatusHT;
373  unsigned long received_bwtype[5];
374  unsigned long txnperr;
375  unsigned long txnpdrop;
376  unsigned long txresumed;
377  unsigned long rxoverflow;
378  unsigned long rxint;
379  unsigned long txnpokint;
380  unsigned long ints;
381  unsigned long shints;
382  unsigned long txoverflow;
383  unsigned long txlpokint;
384  unsigned long txlpdrop;
385  unsigned long txlperr;
386  unsigned long txbeokint;
387  unsigned long txbedrop;
388  unsigned long txbeerr;
389  unsigned long txbkokint;
390  unsigned long txbkdrop;
391  unsigned long txbkerr;
392  unsigned long txviokint;
393  unsigned long txvidrop;
394  unsigned long txvierr;
395  unsigned long txvookint;
396  unsigned long txvodrop;
397  unsigned long txvoerr;
398  unsigned long txbeaconokint;
399  unsigned long txbeacondrop;
400  unsigned long txbeaconerr;
401  unsigned long txmanageokint;
402  unsigned long txmanagedrop;
403  unsigned long txmanageerr;
404  unsigned long txcmdpktokint;
405  unsigned long txdatapkt;
406  unsigned long txfeedback;
407  unsigned long txfeedbackok;
408  unsigned long txoktotal;
409  unsigned long txokbytestotal;
410  unsigned long txokinperiod;
411  unsigned long txmulticast;
412  unsigned long txbytesmulticast;
413  unsigned long txbroadcast;
414  unsigned long txbytesbroadcast;
415  unsigned long txunicast;
416  unsigned long txbytesunicast;
417  unsigned long rxbytesunicast;
418  unsigned long txfeedbackfail;
419  unsigned long txerrtotal;
420  unsigned long txerrbytestotal;
421  unsigned long txerrmulticast;
422  unsigned long txerrbroadcast;
423  unsigned long txerrunicast;
424  unsigned long txretrycount;
425  unsigned long txfeedbackretry;
426  u8 last_packet_rate;
427  unsigned long slide_signal_strength[100];
428  unsigned long slide_evm[100];
429  unsigned long slide_rssi_total;
430  unsigned long slide_evm_total;
431  long signal_strength;
432  long signal_quality;
433  long last_signal_strength_inpercent;
434  long recv_signal_power;
435  u8 rx_rssi_percentage[4];
436  u8 rx_evm_percentage[2];
437  long rxSNRdB[4];
438  struct rt_tx_rahis txrate;
439  u32 Slide_Beacon_pwdb[100];
440  u32 Slide_Beacon_Total;
441  struct rt_smooth_data_4rf cck_adc_pwdb;
442  u32 CurrentShowTxate;
443 };
444 
445 struct channel_access_setting {
446  u16 SIFS_Timer;
447  u16 DIFS_Timer;
448  u16 SlotTimeTimer;
449  u16 EIFS_Timer;
450  u16 CWminIndex;
451  u16 CWmaxIndex;
452 };
453 
454 enum two_port_status {
455  TWO_PORT_STATUS__DEFAULT_ONLY,
456  TWO_PORT_STATUS__EXTENSION_ONLY,
457  TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
458  TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
459  TWO_PORT_STATUS__ADHOC,
460  TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
461 };
462 
463 struct txbbgain_struct {
464  long txbb_iq_amplifygain;
465  u32 txbbgain_value;
466 };
467 
468 struct ccktxbbgain {
469  u8 ccktxbb_valuearray[8];
470 };
471 
472 struct init_gain {
473  u8 xaagccore1;
474  u8 xbagccore1;
475  u8 xcagccore1;
476  u8 xdagccore1;
477  u8 cca;
478 
479 };
480 
481 struct tx_ring {
482  u32 *desc;
483  u8 nStuckCount;
484  struct tx_ring *next;
485 } __packed;
486 
487 struct rtl8192_tx_ring {
488  struct tx_desc *desc;
489  dma_addr_t dma;
490  unsigned int idx;
491  unsigned int entries;
492  struct sk_buff_head queue;
493 };
494 
495 
496 
497 struct rtl819x_ops {
498  enum nic_t nic_type;
499  void (*get_eeprom_size)(struct net_device *dev);
500  void (*init_adapter_variable)(struct net_device *dev);
501  void (*init_before_adapter_start)(struct net_device *dev);
502  bool (*initialize_adapter)(struct net_device *dev);
503  void (*link_change)(struct net_device *dev);
504  void (*tx_fill_descriptor)(struct net_device *dev,
505  struct tx_desc *tx_desc,
506  struct cb_desc *cb_desc,
507  struct sk_buff *skb);
508  void (*tx_fill_cmd_descriptor)(struct net_device *dev,
509  struct tx_desc_cmd *entry,
510  struct cb_desc *cb_desc,
511  struct sk_buff *skb);
512  bool (*rx_query_status_descriptor)(struct net_device *dev,
513  struct rtllib_rx_stats *stats,
514  struct rx_desc *pdesc,
515  struct sk_buff *skb);
516  bool (*rx_command_packet_handler)(struct net_device *dev,
517  struct sk_buff *skb,
518  struct rx_desc *pdesc);
519  void (*stop_adapter)(struct net_device *dev, bool reset);
520  void (*update_ratr_table)(struct net_device *dev);
521  void (*irq_enable)(struct net_device *dev);
522  void (*irq_disable)(struct net_device *dev);
523  void (*irq_clear)(struct net_device *dev);
524  void (*rx_enable)(struct net_device *dev);
525  void (*tx_enable)(struct net_device *dev);
526  void (*interrupt_recognized)(struct net_device *dev,
527  u32 *p_inta, u32 *p_intb);
528  bool (*TxCheckStuckHandler)(struct net_device *dev);
529  bool (*RxCheckStuckHandler)(struct net_device *dev);
530 };
531 
532 struct r8192_priv {
533  struct pci_dev *pdev;
534  struct pci_dev *bridge_pdev;
535 
536  bool bfirst_init;
537  bool bfirst_after_down;
538  bool initialized_at_probe;
539  bool being_init_adapter;
540  bool bDriverIsGoingToUnload;
541 
542  int irq;
543  short irq_enabled;
544 
545  short up;
546  short up_first_time;
547  struct delayed_work update_beacon_wq;
548  struct delayed_work watch_dog_wq;
549  struct delayed_work txpower_tracking_wq;
550  struct delayed_work rfpath_check_wq;
551  struct delayed_work gpio_change_rf_wq;
552  struct delayed_work initialgain_operate_wq;
553  struct delayed_work check_hw_scan_wq;
554  struct delayed_work hw_scan_simu_wq;
555  struct delayed_work start_hw_scan_wq;
556 
557  struct workqueue_struct *priv_wq;
558 
559  struct channel_access_setting ChannelAccessSetting;
560 
561  struct mp_adapter NdisAdapter;
562 
563  struct rtl819x_ops *ops;
564  struct rtllib_device *rtllib;
565 
566  struct work_struct reset_wq;
567 
568  struct log_int_8190 InterruptLog;
569 
570  enum rt_customer_id CustomerID;
571 
572 
573  enum rt_rf_type_819xu rf_chip;
574  enum ic_inferiority_8192s IC_Class;
575  enum ht_channel_width CurrentChannelBW;
576  struct bb_reg_definition PHYRegDef[4];
577  struct rate_adaptive rate_adaptive;
578 
579  struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength];
580  struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
581 
582  struct txbbgain_struct txbbgain_table[TxBBGainTableLength];
583 
584  enum acm_method AcmMethod;
585 
586  struct rt_firmware *pFirmware;
587  enum rtl819x_loopback LoopbackMode;
588  enum firmware_source firmware_source;
589 
590  struct timer_list watch_dog_timer;
591  struct timer_list fsync_timer;
592  struct timer_list gpio_polling_timer;
593 
594  spinlock_t fw_scan_lock;
595  spinlock_t irq_lock;
596  spinlock_t irq_th_lock;
597  spinlock_t tx_lock;
598  spinlock_t rf_ps_lock;
599  spinlock_t rw_lock;
600  spinlock_t rt_h2c_lock;
601  spinlock_t rf_lock;
602  spinlock_t ps_lock;
603 
604  struct sk_buff_head rx_queue;
605  struct sk_buff_head skb_queue;
606 
607  struct tasklet_struct irq_rx_tasklet;
608  struct tasklet_struct irq_tx_tasklet;
609  struct tasklet_struct irq_prepare_beacon_tasklet;
610 
611  struct semaphore wx_sem;
612  struct semaphore rf_sem;
613  struct mutex mutex;
614 
615  struct rt_stats stats;
616  struct iw_statistics wstats;
617  struct proc_dir_entry *dir_dev;
618 
619  short (*rf_set_sens)(struct net_device *dev, short sens);
620  u8 (*rf_set_chan)(struct net_device *dev, u8 ch);
621  void (*rf_close)(struct net_device *dev);
622  void (*rf_init)(struct net_device *dev);
623 
624  struct rx_desc *rx_ring[MAX_RX_QUEUE];
625  struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
626  dma_addr_t rx_ring_dma[MAX_RX_QUEUE];
627  unsigned int rx_idx[MAX_RX_QUEUE];
628  int rxringcount;
629  u16 rxbuffersize;
630 
631  u64 LastRxDescTSF;
632 
633  u16 EarlyRxThreshold;
634  u32 ReceiveConfig;
635  u8 AcmControl;
636  u8 RFProgType;
637  u8 retry_data;
638  u8 retry_rts;
639  u16 rts;
640 
641  struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
642  int txringcount;
643  int txbuffsize;
644  int txfwbuffersize;
645  atomic_t tx_pending[0x10];
646 
647  u16 ShortRetryLimit;
648  u16 LongRetryLimit;
649  u32 TransmitConfig;
650  u8 RegCWinMin;
651  u8 keepAliveLevel;
652 
653  bool sw_radio_on;
654  bool bHwRadioOff;
655  bool pwrdown;
656  bool blinked_ingpio;
657  u8 polling_timer_on;
658 
659  /**********************************************************/
660 
661  enum card_type {
662  PCI, MINIPCI,
663  CARDBUS, USB
664  } card_type;
665 
666  struct work_struct qos_activate;
667 
668  u8 bIbssCoordinator;
669 
670  short promisc;
671  short crcmon;
672 
673  int txbeaconcount;
674 
675  short chan;
676  short sens;
677  short max_sens;
678  u32 rx_prevlen;
679 
680  u8 ScanDelay;
681  bool ps_force;
682 
683  u32 irq_mask[2];
684 
685  u8 Rf_Mode;
686  enum nic_t card_8192;
687  u8 card_8192_version;
688 
689  short enable_gpio0;
690 
691  u8 rf_type;
692  u8 IC_Cut;
693  char nick[IW_ESSID_MAX_SIZE + 1];
694 
695  u8 RegBcnCtrlVal;
696  bool bHwAntDiv;
697 
698  bool bTKIPinNmodeFromReg;
699  bool bWEPinNmodeFromReg;
700 
701  bool bLedOpenDrain;
702 
703  u8 check_roaming_cnt;
704 
705  bool bIgnoreSilentReset;
706  u32 SilentResetRxSoltNum;
707  u32 SilentResetRxSlotIndex;
708  u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
709 
710  void *scan_cmd;
711  u8 hwscan_bw_40;
712 
713  u16 nrxAMPDU_size;
714  u8 nrxAMPDU_aggr_num;
715 
716  u32 last_rxdesc_tsf_high;
717  u32 last_rxdesc_tsf_low;
718 
719  u16 basic_rate;
720  u8 short_preamble;
721  u8 dot11CurrentPreambleMode;
722  u8 slot_time;
723  u16 SifsTime;
724 
725  u8 RegWirelessMode;
726 
727  u8 firmware_version;
728  u16 FirmwareSubVersion;
729  u16 rf_pathmap;
730  bool AutoloadFailFlag;
731 
732  u8 RegPciASPM;
733  u8 RegAMDPciASPM;
734  u8 RegHwSwRfOffD3;
735  u8 RegSupportPciASPM;
736  bool bSupportASPM;
737 
738  u32 RfRegChnlVal[2];
739 
740  u8 ShowRateMode;
741  u8 RATRTableBitmap;
742 
743  u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
744  u16 EfuseUsedBytes;
745  u8 EfuseUsedPercentage;
746 
747  short epromtype;
748  u16 eeprom_vid;
749  u16 eeprom_did;
750  u16 eeprom_svid;
751  u16 eeprom_smid;
752  u8 eeprom_CustomerID;
753  u16 eeprom_ChannelPlan;
754  u8 eeprom_version;
755 
756  u8 EEPROMRegulatory;
757  u8 EEPROMPwrGroup[2][3];
758  u8 EEPROMOptional;
759 
760  u8 EEPROMTxPowerLevelCCK[14];
761  u8 EEPROMTxPowerLevelOFDM24G[14];
762  u8 EEPROMTxPowerLevelOFDM5G[24];
763  u8 EEPROMRfACCKChnl1TxPwLevel[3];
764  u8 EEPROMRfAOfdmChnlTxPwLevel[3];
765  u8 EEPROMRfCCCKChnl1TxPwLevel[3];
766  u8 EEPROMRfCOfdmChnlTxPwLevel[3];
767  u16 EEPROMTxPowerDiff;
768  u16 EEPROMAntPwDiff;
769  u8 EEPROMThermalMeter;
770  u8 EEPROMPwDiff;
771  u8 EEPROMCrystalCap;
772 
773  u8 EEPROMBluetoothCoexist;
774  u8 EEPROMBluetoothType;
775  u8 EEPROMBluetoothAntNum;
776  u8 EEPROMBluetoothAntIsolation;
777  u8 EEPROMBluetoothRadioShared;
778 
779 
780  u8 EEPROMSupportWoWLAN;
781  u8 EEPROMBoardType;
782  u8 EEPROM_Def_Ver;
783  u8 EEPROMHT2T_TxPwr[6];
784  u8 EEPROMTSSI_A;
785  u8 EEPROMTSSI_B;
786  u8 EEPROMTxPowerLevelCCK_V1[3];
787  u8 EEPROMLegacyHTTxPowerDiff;
788 
789  u8 BluetoothCoexist;
790 
791  u8 CrystalCap;
792  u8 ThermalMeter[2];
793 
794  u16 FwCmdIOMap;
795  u32 FwCmdIOParam;
796 
797  u8 SwChnlInProgress;
798  u8 SwChnlStage;
799  u8 SwChnlStep;
800  u8 SetBWModeInProgress;
801 
802  u8 nCur40MhzPrimeSC;
803 
804  u32 RfReg0Value[4];
805  u8 NumTotalRFPath;
806  bool brfpath_rxenable[4];
807 
808  bool bTXPowerDataReadFromEEPORM;
809 
810  u16 RegChannelPlan;
811  u16 ChannelPlan;
812  bool bChnlPlanFromHW;
813 
814  bool RegRfOff;
815  bool isRFOff;
816  bool bInPowerSaveMode;
817  u8 bHwRfOffAction;
818 
819  bool aspm_clkreq_enable;
820  u32 pci_bridge_vendor;
821  u8 RegHostPciASPMSetting;
822  u8 RegDevicePciASPMSetting;
823 
824  bool RFChangeInProgress;
825  bool SetRFPowerStateInProgress;
826  bool bdisable_nic;
827 
828  u8 pwrGroupCnt;
829 
830  u8 ThermalValue_LCK;
831  u8 ThermalValue_IQK;
832  bool bRfPiEnable;
833 
834  u32 APKoutput[2][2];
835  bool bAPKdone;
836 
837  long RegE94;
838  long RegE9C;
839  long RegEB4;
840  long RegEBC;
841 
842  u32 RegC04;
843  u32 Reg874;
844  u32 RegC08;
845  u32 ADDA_backup[16];
846  u32 IQK_MAC_backup[3];
847 
848  bool SetFwCmdInProgress;
849  u8 CurrentFwCmdIO;
850 
851  u8 rssi_level;
852 
853  bool bInformFWDriverControlDM;
854  u8 PwrGroupHT20[2][14];
855  u8 PwrGroupHT40[2][14];
856 
857  u8 ThermalValue;
858  long EntryMinUndecoratedSmoothedPWDB;
859  long EntryMaxUndecoratedSmoothedPWDB;
860  u8 DynamicTxHighPowerLvl;
861  u8 LastDTPLvl;
862  u32 CurrentRATR0;
863  struct false_alarm_stats FalseAlmCnt;
864 
865  u8 DMFlag;
866  u8 DM_Type;
867 
868  u8 CckPwEnl;
869  u16 TSSI_13dBm;
870  u32 Pwr_Track;
871  u8 CCKPresentAttentuation_20Mdefault;
872  u8 CCKPresentAttentuation_40Mdefault;
873  char CCKPresentAttentuation_difference;
874  char CCKPresentAttentuation;
875  u8 bCckHighPower;
876  long undecorated_smoothed_pwdb;
877  long undecorated_smoothed_cck_adc_pwdb[4];
878 
879  u32 MCSTxPowerLevelOriginalOffset[6];
880  u32 CCKTxPowerLevelOriginalOffset;
881  u8 TxPowerLevelCCK[14];
882  u8 TxPowerLevelCCK_A[14];
883  u8 TxPowerLevelCCK_C[14];
884  u8 TxPowerLevelOFDM24G[14];
885  u8 TxPowerLevelOFDM5G[14];
886  u8 TxPowerLevelOFDM24G_A[14];
887  u8 TxPowerLevelOFDM24G_C[14];
888  u8 LegacyHTTxPowerDiff;
889  u8 TxPowerDiff;
890  s8 RF_C_TxPwDiff;
891  s8 RF_B_TxPwDiff;
892  u8 RfTxPwrLevelCck[2][14];
893  u8 RfTxPwrLevelOfdm1T[2][14];
894  u8 RfTxPwrLevelOfdm2T[2][14];
895  u8 AntennaTxPwDiff[3];
896  u8 TxPwrHt20Diff[2][14];
897  u8 TxPwrLegacyHtDiff[2][14];
898  u8 TxPwrSafetyFlag;
899  u8 HT2T_TxPwr_A[14];
900  u8 HT2T_TxPwr_B[14];
901  u8 CurrentCckTxPwrIdx;
902  u8 CurrentOfdm24GTxPwrIdx;
903 
904  bool bdynamic_txpower;
905  bool bDynamicTxHighPower;
906  bool bDynamicTxLowPower;
907  bool bLastDTPFlag_High;
908  bool bLastDTPFlag_Low;
909 
910  bool bstore_last_dtpflag;
911  bool bstart_txctrl_bydtp;
912 
913  u8 rfa_txpowertrackingindex;
914  u8 rfa_txpowertrackingindex_real;
915  u8 rfa_txpowertracking_default;
916  u8 rfc_txpowertrackingindex;
917  u8 rfc_txpowertrackingindex_real;
918  u8 rfc_txpowertracking_default;
919  bool btxpower_tracking;
920  bool bcck_in_ch14;
921 
922  u8 TxPowerTrackControl;
923  u8 txpower_count;
924  bool btxpower_trackingInit;
925 
926  u8 OFDM_index[2];
927  u8 CCK_index;
928 
929  u8 Record_CCK_20Mindex;
930  u8 Record_CCK_40Mindex;
931 
932  struct init_gain initgain_backup;
933  u8 DefaultInitialGain[4];
934  bool bis_any_nonbepkts;
935  bool bcurrent_turbo_EDCA;
936  bool bis_cur_rdlstate;
937 
938  bool bCCKinCH14;
939 
940  u8 MidHighPwrTHR_L1;
941  u8 MidHighPwrTHR_L2;
942 
943  bool bfsync_processing;
944  u32 rate_record;
945  u32 rateCountDiffRecord;
946  u32 ContinueDiffCount;
947  bool bswitch_fsync;
948  u8 framesync;
949  u32 framesyncC34;
950  u8 framesyncMonitor;
951 
952  bool bDMInitialGainEnable;
953  bool MutualAuthenticationFail;
954 
955  bool bDisableFrameBursting;
956 
957  u32 reset_count;
958  bool bpbc_pressed;
959 
960  u32 txpower_checkcnt;
961  u32 txpower_tracking_callback_cnt;
962  u8 thermal_read_val[40];
963  u8 thermal_readback_index;
964  u32 ccktxpower_adjustcnt_not_ch14;
965  u32 ccktxpower_adjustcnt_ch14;
966 
967  enum reset_type ResetProgress;
968  bool bForcedSilentReset;
969  bool bDisableNormalResetCheck;
970  u16 TxCounter;
971  u16 RxCounter;
972  int IrpPendingCount;
973  bool bResetInProgress;
974  bool force_reset;
975  bool force_lps;
976  u8 InitialGainOperateType;
977 
978  bool chan_forced;
979  bool bSingleCarrier;
980  bool RegBoard;
981  bool bCckContTx;
982  bool bOfdmContTx;
983  bool bStartContTx;
984  u8 RegPaModel;
985  u8 btMpCckTxPower;
986  u8 btMpOfdmTxPower;
987 
988  u32 MptActType;
989  u32 MptIoOffset;
990  u32 MptIoValue;
991  u32 MptRfPath;
992 
993  u32 MptBandWidth;
994  u32 MptRateIndex;
995  u8 MptChannelToSw;
996  u32 MptRCR;
997 
998  u8 PwrDomainProtect;
999  u8 H2CTxCmdSeq;
1000 
1001 
1002 };
1003 
1004 extern const struct ethtool_ops rtl819x_ethtool_ops;
1005 
1006 void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
1007 short rtl8192_tx(struct net_device *dev, struct sk_buff *skb);
1008 
1009 u8 read_nic_io_byte(struct net_device *dev, int x);
1010 u32 read_nic_io_dword(struct net_device *dev, int x);
1011 u16 read_nic_io_word(struct net_device *dev, int x) ;
1012 void write_nic_io_byte(struct net_device *dev, int x, u8 y);
1013 void write_nic_io_word(struct net_device *dev, int x, u16 y);
1014 void write_nic_io_dword(struct net_device *dev, int x, u32 y);
1015 
1016 u8 read_nic_byte(struct net_device *dev, int x);
1017 u32 read_nic_dword(struct net_device *dev, int x);
1018 u16 read_nic_word(struct net_device *dev, int x) ;
1019 void write_nic_byte(struct net_device *dev, int x, u8 y);
1020 void write_nic_word(struct net_device *dev, int x, u16 y);
1021 void write_nic_dword(struct net_device *dev, int x, u32 y);
1022 
1023 void force_pci_posting(struct net_device *dev);
1024 
1025 void rtl8192_rx_enable(struct net_device *);
1026 void rtl8192_tx_enable(struct net_device *);
1027 
1028 int rtl8192_hard_start_xmit(struct sk_buff *skb, struct net_device *dev);
1029 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev,
1030  int rate);
1031 void rtl8192_data_hard_stop(struct net_device *dev);
1032 void rtl8192_data_hard_resume(struct net_device *dev);
1033 void rtl8192_restart(void *data);
1034 void rtl819x_watchdog_wqcallback(void *data);
1035 void rtl8192_hw_sleep_wq(void *data);
1036 void watch_dog_timer_callback(unsigned long data);
1037 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
1038 void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
1039 int rtl8192_down(struct net_device *dev, bool shutdownrf);
1040 int rtl8192_up(struct net_device *dev);
1041 void rtl8192_commit(struct net_device *dev);
1042 void rtl8192_set_chan(struct net_device *dev, short ch);
1043 
1044 void check_rfctrl_gpio_timer(unsigned long data);
1045 
1046 void rtl8192_hw_wakeup_wq(void *data);
1047 irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
1048 
1049 short rtl8192_pci_initdescring(struct net_device *dev);
1050 
1051 void rtl8192_cancel_deferred_work(struct r8192_priv *priv);
1052 
1053 int _rtl8192_up(struct net_device *dev, bool is_silent_reset);
1054 
1055 short rtl8192_is_tx_queue_empty(struct net_device *dev);
1056 void rtl8192_irq_disable(struct net_device *dev);
1057 
1058 void rtl8192_tx_timeout(struct net_device *dev);
1059 void rtl8192_pci_resetdescring(struct net_device *dev);
1060 void rtl8192_SetWirelessMode(struct net_device *dev, u8 wireless_mode);
1061 void rtl8192_irq_enable(struct net_device *dev);
1062 void rtl8192_config_rate(struct net_device *dev, u16 *rate_config);
1063 void rtl8192_update_cap(struct net_device *dev, u16 cap);
1064 void rtl8192_irq_disable(struct net_device *dev);
1065 
1066 void rtl819x_UpdateRxPktTimeStamp(struct net_device *dev,
1067  struct rtllib_rx_stats *stats);
1068 long rtl819x_translate_todbm(struct r8192_priv *priv, u8 signal_strength_index);
1069 void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv *priv,
1070  struct rtllib_rx_stats *pprevious_stats);
1071 u8 rtl819x_evm_dbtopercentage(char value);
1072 void rtl819x_process_cck_rxpathsel(struct r8192_priv *priv,
1073  struct rtllib_rx_stats *pprevious_stats);
1074 u8 rtl819x_query_rxpwrpercentage(char antpower);
1075 void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats *psrc_stats,
1076  struct rtllib_rx_stats *ptarget_stats);
1077 bool NicIFEnableNIC(struct net_device *dev);
1078 bool NicIFDisableNIC(struct net_device *dev);
1079 
1080 bool MgntActSet_RF_State(struct net_device *dev,
1081  enum rt_rf_power_state StateToSet,
1082  RT_RF_CHANGE_SOURCE ChangeSource,
1083  bool ProtectOrNot);
1084 void ActUpdateChannelAccessSetting(struct net_device *dev,
1085  enum wireless_mode WirelessMode,
1086  struct channel_access_setting *ChnlAccessSetting);
1087 
1088 /* proc stuff from rtl_debug.c */
1089 void rtl8192_proc_init_one(struct net_device *dev);
1090 void rtl8192_proc_remove_one(struct net_device *dev);
1091 void rtl8192_proc_module_init(void);
1092 void rtl8192_proc_module_remove(void);
1093 
1094 #endif
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