LLVM API Documentation

Defines | Functions | Variables
MipsSEISelLowering.cpp File Reference
#include "MipsSEISelLowering.h"
#include "MipsMachineFunction.h"
#include "MipsRegisterInfo.h"
#include "MipsTargetMachine.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
Include dependency graph for MipsSEISelLowering.cpp:

Go to the source code of this file.

Defines

#define DEBUG_TYPE   "mips-isel"

Functions

static bool selectMADD (SDNode *ADDENode, SelectionDAG *CurDAG)
static bool selectMSUB (SDNode *SUBENode, SelectionDAG *CurDAG)
static SDValue performADDECombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue performANDCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static bool isVSplat (SDValue N, APInt &Imm, bool IsLittleEndian)
static bool isVectorAllOnes (SDValue N)
static bool isBitwiseInverse (SDValue N, SDValue OfNode)
static SDValue performORCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue performSUBECombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue genConstMult (SDValue X, uint64_t C, SDLoc DL, EVT VT, EVT ShiftTy, SelectionDAG &DAG)
static SDValue performMULCombine (SDNode *N, SelectionDAG &DAG, const TargetLowering::DAGCombinerInfo &DCI, const MipsSETargetLowering *TL)
static SDValue performDSPShiftCombine (unsigned Opc, SDNode *N, EVT Ty, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
static SDValue performSHLCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue performSRACombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue performSRLCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static bool isLegalDSPCondCode (EVT Ty, ISD::CondCode CC)
static SDValue performSETCCCombine (SDNode *N, SelectionDAG &DAG)
static SDValue performVSELECTCombine (SDNode *N, SelectionDAG &DAG)
static SDValue performXORCombine (SDNode *N, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
static SDValue initAccumulator (SDValue In, SDLoc DL, SelectionDAG &DAG)
static SDValue extractLOHI (SDValue Op, SDLoc DL, SelectionDAG &DAG)
static SDValue lowerDSPIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc)
static SDValue lowerMSACopyIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc)
static SDValue lowerMSASplatZExt (SDValue Op, unsigned OpNr, SelectionDAG &DAG)
static SDValue lowerMSASplatImm (SDValue Op, unsigned ImmOp, SelectionDAG &DAG)
static SDValue getBuildVectorSplat (EVT VecTy, SDValue SplatValue, bool BigEndian, SelectionDAG &DAG)
static SDValue lowerMSABinaryBitImmIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc, SDValue Imm, bool BigEndian)
static SDValue lowerMSABitClear (SDValue Op, SelectionDAG &DAG)
static SDValue lowerMSABitClearImm (SDValue Op, SelectionDAG &DAG)
static SDValue lowerMSALoadIntr (SDValue Op, SelectionDAG &DAG, unsigned Intr)
static SDValue lowerMSAStoreIntr (SDValue Op, SelectionDAG &DAG, unsigned Intr)
static bool isSplatVector (const BuildVectorSDNode *N)
 Check if the given BuildVectorSDNode is a splat. This method currently relies on DAG nodes being reused when equivalent, so it's possible for this to return false even when isConstantSplat returns true.
static bool isConstantOrUndef (const SDValue Op)
static bool isConstantOrUndefBUILD_VECTOR (const BuildVectorSDNode *Op)
static SDValue lowerVECTOR_SHUFFLE_SHF (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_ILVEV (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_ILVOD (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_ILVL (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_ILVR (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_PCKEV (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_PCKOD (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
static SDValue lowerVECTOR_SHUFFLE_VSHF (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)

Variables

static cl::opt< bool > EnableMipsTailCalls ("enable-mips-tail-calls", cl::Hidden, cl::desc("MIPS: Enable tail calls."), cl::init(false))
static cl::opt< bool > NoDPLoadStore ("mno-ldc1-sdc1", cl::init(false), cl::desc("Expand double precision loads and ""stores to their single precision ""counterparts"))

Define Documentation

#define DEBUG_TYPE   "mips-isel"

Definition at line 27 of file MipsSEISelLowering.cpp.


Function Documentation

static SDValue extractLOHI ( SDValue  Op,
SDLoc  DL,
SelectionDAG &  DAG 
) [static]
static SDValue genConstMult ( SDValue  X,
uint64_t  C,
SDLoc  DL,
EVT  VT,
EVT  ShiftTy,
SelectionDAG &  DAG 
) [static]
static SDValue getBuildVectorSplat ( EVT  VecTy,
SDValue  SplatValue,
bool  BigEndian,
SelectionDAG &  DAG 
) [static]
static SDValue initAccumulator ( SDValue  In,
SDLoc  DL,
SelectionDAG &  DAG 
) [static]
static bool isBitwiseInverse ( SDValue  N,
SDValue  OfNode 
) [static]
static bool isConstantOrUndef ( const SDValue  Op) [static]

Definition at line 2290 of file MipsSEISelLowering.cpp.

References llvm::SDNode::getOpcode(), and llvm::ISD::UNDEF.

Referenced by isConstantOrUndefBUILD_VECTOR().

static bool isLegalDSPCondCode ( EVT  Ty,
ISD::CondCode  CC 
) [static]
static bool isSplatVector ( const BuildVectorSDNode *  N) [static]

Check if the given BuildVectorSDNode is a splat. This method currently relies on DAG nodes being reused when equivalent, so it's possible for this to return false even when isConstantSplat returns true.

Definition at line 2249 of file MipsSEISelLowering.cpp.

References llvm::SDNode::getNumOperands(), and llvm::SDNode::getOperand().

static bool isVectorAllOnes ( SDValue  N) [static]
static bool isVSplat ( SDValue  N,
APInt &  Imm,
bool  IsLittleEndian 
) [static]
static SDValue lowerDSPIntr ( SDValue  Op,
SelectionDAG &  DAG,
unsigned  Opc 
) [static]
static SDValue lowerMSABinaryBitImmIntr ( SDValue  Op,
SelectionDAG &  DAG,
unsigned  Opc,
SDValue  Imm,
bool  BigEndian 
) [static]
static SDValue lowerMSABitClear ( SDValue  Op,
SelectionDAG &  DAG 
) [static]
static SDValue lowerMSABitClearImm ( SDValue  Op,
SelectionDAG &  DAG 
) [static]
static SDValue lowerMSACopyIntr ( SDValue  Op,
SelectionDAG &  DAG,
unsigned  Opc 
) [static]
static SDValue lowerMSALoadIntr ( SDValue  Op,
SelectionDAG &  DAG,
unsigned  Intr 
) [static]
static SDValue lowerMSASplatImm ( SDValue  Op,
unsigned  ImmOp,
SelectionDAG &  DAG 
) [static]
static SDValue lowerMSASplatZExt ( SDValue  Op,
unsigned  OpNr,
SelectionDAG &  DAG 
) [static]
static SDValue lowerMSAStoreIntr ( SDValue  Op,
SelectionDAG &  DAG,
unsigned  Intr 
) [static]
static SDValue lowerVECTOR_SHUFFLE_ILVEV ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG &  DAG 
) [static]
static SDValue lowerVECTOR_SHUFFLE_ILVL ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG &  DAG 
) [static]
static SDValue lowerVECTOR_SHUFFLE_ILVOD ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG &  DAG 
) [static]
static SDValue lowerVECTOR_SHUFFLE_ILVR ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG &  DAG 
) [static]
static SDValue lowerVECTOR_SHUFFLE_PCKEV ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG &  DAG 
) [static]
static SDValue lowerVECTOR_SHUFFLE_PCKOD ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG &  DAG 
) [static]
static SDValue lowerVECTOR_SHUFFLE_SHF ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG &  DAG 
) [static]
static SDValue lowerVECTOR_SHUFFLE_VSHF ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG &  DAG 
) [static]
static SDValue performADDECombine ( SDNode *  N,
SelectionDAG &  DAG,
TargetLowering::DAGCombinerInfo &  DCI,
const MipsSubtarget &  Subtarget 
) [static]
static SDValue performANDCombine ( SDNode *  N,
SelectionDAG &  DAG,
TargetLowering::DAGCombinerInfo &  DCI,
const MipsSubtarget &  Subtarget 
) [static]
static SDValue performDSPShiftCombine ( unsigned  Opc,
SDNode *  N,
EVT  Ty,
SelectionDAG &  DAG,
const MipsSubtarget &  Subtarget 
) [static]
static SDValue performORCombine ( SDNode *  N,
SelectionDAG &  DAG,
TargetLowering::DAGCombinerInfo &  DCI,
const MipsSubtarget &  Subtarget 
) [static]
static SDValue performSETCCCombine ( SDNode *  N,
SelectionDAG &  DAG 
) [static]
static SDValue performSHLCombine ( SDNode *  N,
SelectionDAG &  DAG,
TargetLowering::DAGCombinerInfo &  DCI,
const MipsSubtarget &  Subtarget 
) [static]
static SDValue performSRACombine ( SDNode *  N,
SelectionDAG &  DAG,
TargetLowering::DAGCombinerInfo &  DCI,
const MipsSubtarget &  Subtarget 
) [static]
static SDValue performSRLCombine ( SDNode *  N,
SelectionDAG &  DAG,
TargetLowering::DAGCombinerInfo &  DCI,
const MipsSubtarget &  Subtarget 
) [static]
static SDValue performSUBECombine ( SDNode *  N,
SelectionDAG &  DAG,
TargetLowering::DAGCombinerInfo &  DCI,
const MipsSubtarget &  Subtarget 
) [static]
static SDValue performVSELECTCombine ( SDNode *  N,
SelectionDAG &  DAG 
) [static]
static SDValue performXORCombine ( SDNode *  N,
SelectionDAG &  DAG,
const MipsSubtarget &  Subtarget 
) [static]
static bool selectMADD ( SDNode *  ADDENode,
SelectionDAG *  CurDAG 
) [static]
static bool selectMSUB ( SDNode *  SUBENode,
SelectionDAG *  CurDAG 
) [static]

Variable Documentation

cl::opt<bool> EnableMipsTailCalls("enable-mips-tail-calls", cl::Hidden, cl::desc("MIPS: Enable tail calls."), cl::init(false)) [static]
cl::opt<bool> NoDPLoadStore("mno-ldc1-sdc1", cl::init(false), cl::desc("Expand double precision loads and ""stores to their single precision ""counterparts")) [static]