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ak4114.h File Reference

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Data Structures

struct  ak4114
 

Macros

#define AK4114_REG_PWRDN   0x00 /* power down */
 
#define AK4114_REG_FORMAT   0x01 /* format control */
 
#define AK4114_REG_IO0   0x02 /* input/output control */
 
#define AK4114_REG_IO1   0x03 /* input/output control */
 
#define AK4114_REG_INT0_MASK   0x04 /* interrupt0 mask */
 
#define AK4114_REG_INT1_MASK   0x05 /* interrupt1 mask */
 
#define AK4114_REG_RCS0   0x06 /* receiver status 0 */
 
#define AK4114_REG_RCS1   0x07 /* receiver status 1 */
 
#define AK4114_REG_RXCSB0   0x08 /* RX channel status byte 0 */
 
#define AK4114_REG_RXCSB1   0x09 /* RX channel status byte 1 */
 
#define AK4114_REG_RXCSB2   0x0a /* RX channel status byte 2 */
 
#define AK4114_REG_RXCSB3   0x0b /* RX channel status byte 3 */
 
#define AK4114_REG_RXCSB4   0x0c /* RX channel status byte 4 */
 
#define AK4114_REG_TXCSB0   0x0d /* TX channel status byte 0 */
 
#define AK4114_REG_TXCSB1   0x0e /* TX channel status byte 1 */
 
#define AK4114_REG_TXCSB2   0x0f /* TX channel status byte 2 */
 
#define AK4114_REG_TXCSB3   0x10 /* TX channel status byte 3 */
 
#define AK4114_REG_TXCSB4   0x11 /* TX channel status byte 4 */
 
#define AK4114_REG_Pc0   0x12 /* burst preamble Pc byte 0 */
 
#define AK4114_REG_Pc1   0x13 /* burst preamble Pc byte 1 */
 
#define AK4114_REG_Pd0   0x14 /* burst preamble Pd byte 0 */
 
#define AK4114_REG_Pd1   0x15 /* burst preamble Pd byte 1 */
 
#define AK4114_REG_QSUB_ADDR   0x16 /* Q-subcode address + control */
 
#define AK4114_REG_QSUB_TRACK   0x17 /* Q-subcode track */
 
#define AK4114_REG_QSUB_INDEX   0x18 /* Q-subcode index */
 
#define AK4114_REG_QSUB_MINUTE   0x19 /* Q-subcode minute */
 
#define AK4114_REG_QSUB_SECOND   0x1a /* Q-subcode second */
 
#define AK4114_REG_QSUB_FRAME   0x1b /* Q-subcode frame */
 
#define AK4114_REG_QSUB_ZERO   0x1c /* Q-subcode zero */
 
#define AK4114_REG_QSUB_ABSMIN   0x1d /* Q-subcode absolute minute */
 
#define AK4114_REG_QSUB_ABSSEC   0x1e /* Q-subcode absolute second */
 
#define AK4114_REG_QSUB_ABSFRM   0x1f /* Q-subcode absolute frame */
 
#define AK4114_REG_RXCSB_SIZE   ((AK4114_REG_RXCSB4-AK4114_REG_RXCSB0)+1)
 
#define AK4114_REG_TXCSB_SIZE   ((AK4114_REG_TXCSB4-AK4114_REG_TXCSB0)+1)
 
#define AK4114_REG_QSUB_SIZE   ((AK4114_REG_QSUB_ABSFRM-AK4114_REG_QSUB_ADDR)+1)
 
#define AK4114_CS12   (1<<7) /* Channel Status Select */
 
#define AK4114_BCU   (1<<6) /* Block Start & C/U Output Mode */
 
#define AK4114_CM1   (1<<5) /* Master Clock Operation Select */
 
#define AK4114_CM0   (1<<4) /* Master Clock Operation Select */
 
#define AK4114_OCKS1   (1<<3) /* Master Clock Frequency Select */
 
#define AK4114_OCKS0   (1<<2) /* Master Clock Frequency Select */
 
#define AK4114_PWN   (1<<1) /* 0 = power down, 1 = normal operation */
 
#define AK4114_RST   (1<<0) /* 0 = reset & initialize (except this register), 1 = normal operation */
 
#define AK4114_MONO   (1<<7) /* Double Sampling Frequency Mode: 0 = stereo, 1 = mono */
 
#define AK4114_DIF2   (1<<6) /* Audio Data Control */
 
#define AK4114_DIF1   (1<<5) /* Audio Data Control */
 
#define AK4114_DIF0   (1<<4) /* Audio Data Control */
 
#define AK4114_DIF_16R   (0) /* STDO: 16-bit, right justified */
 
#define AK4114_DIF_18R   (AK4114_DIF0) /* STDO: 18-bit, right justified */
 
#define AK4114_DIF_20R   (AK4114_DIF1) /* STDO: 20-bit, right justified */
 
#define AK4114_DIF_24R   (AK4114_DIF1|AK4114_DIF0) /* STDO: 24-bit, right justified */
 
#define AK4114_DIF_24L   (AK4114_DIF2) /* STDO: 24-bit, left justified */
 
#define AK4114_DIF_24I2S   (AK4114_DIF2|AK4114_DIF0) /* STDO: I2S */
 
#define AK4114_DIF_I24L   (AK4114_DIF2|AK4114_DIF1) /* STDO: 24-bit, left justified; LRCLK, BICK = Input */
 
#define AK4114_DIF_I24I2S   (AK4114_DIF2|AK4114_DIF1|AK4114_DIF0) /* STDO: I2S; LRCLK, BICK = Input */
 
#define AK4114_DEAU   (1<<3) /* Deemphasis Autodetect Enable (1 = enable) */
 
#define AK4114_DEM1   (1<<2) /* 32kHz-48kHz Deemphasis Control */
 
#define AK4114_DEM0   (1<<1) /* 32kHz-48kHz Deemphasis Control */
 
#define AK4114_DEM_44KHZ   (0)
 
#define AK4114_DEM_48KHZ   (AK4114_DEM1)
 
#define AK4114_DEM_32KHZ   (AK4114_DEM0|AK4114_DEM1)
 
#define AK4114_DEM_96KHZ   (AK4114_DEM1) /* DFS must be set */
 
#define AK4114_DFS   (1<<0) /* 96kHz Deemphasis Control */
 
#define AK4114_TX1E   (1<<7) /* TX1 Output Enable (1 = enable) */
 
#define AK4114_OPS12   (1<<6) /* Output Data Selector for TX1 pin */
 
#define AK4114_OPS11   (1<<5) /* Output Data Selector for TX1 pin */
 
#define AK4114_OPS10   (1<<4) /* Output Data Selector for TX1 pin */
 
#define AK4114_TX0E   (1<<3) /* TX0 Output Enable (1 = enable) */
 
#define AK4114_OPS02   (1<<2) /* Output Data Selector for TX0 pin */
 
#define AK4114_OPS01   (1<<1) /* Output Data Selector for TX0 pin */
 
#define AK4114_OPS00   (1<<0) /* Output Data Selector for TX0 pin */
 
#define AK4114_EFH1   (1<<7) /* Interrupt 0 pin Hold */
 
#define AK4114_EFH0   (1<<6) /* Interrupt 0 pin Hold */
 
#define AK4114_EFH_512   (0)
 
#define AK4114_EFH_1024   (AK4114_EFH0)
 
#define AK4114_EFH_2048   (AK4114_EFH1)
 
#define AK4114_EFH_4096   (AK4114_EFH1|AK4114_EFH0)
 
#define AK4114_UDIT   (1<<5) /* U-bit Control for DIT (0 = fixed '0', 1 = recovered) */
 
#define AK4114_TLR   (1<<4) /* Double Sampling Frequency Select for DIT (0 = L channel, 1 = R channel) */
 
#define AK4114_DIT   (1<<3) /* TX1 out: 0 = Through Data (RX data), 1 = Transmit Data (DAUX data) */
 
#define AK4114_IPS2   (1<<2) /* Input Recovery Data Select */
 
#define AK4114_IPS1   (1<<1) /* Input Recovery Data Select */
 
#define AK4114_IPS0   (1<<0) /* Input Recovery Data Select */
 
#define AK4114_IPS(x)   ((x)&7)
 
#define AK4117_MQI   (1<<7) /* mask enable for QINT bit */
 
#define AK4117_MAT   (1<<6) /* mask enable for AUTO bit */
 
#define AK4117_MCI   (1<<5) /* mask enable for CINT bit */
 
#define AK4117_MUL   (1<<4) /* mask enable for UNLOCK bit */
 
#define AK4117_MDTS   (1<<3) /* mask enable for DTSCD bit */
 
#define AK4117_MPE   (1<<2) /* mask enable for PEM bit */
 
#define AK4117_MAN   (1<<1) /* mask enable for AUDN bit */
 
#define AK4117_MPR   (1<<0) /* mask enable for PAR bit */
 
#define AK4114_QINT   (1<<7) /* Q-subcode buffer interrupt, 0 = no change, 1 = changed */
 
#define AK4114_AUTO   (1<<6) /* Non-PCM or DTS stream auto detection, 0 = no detect, 1 = detect */
 
#define AK4114_CINT   (1<<5) /* channel status buffer interrupt, 0 = no change, 1 = change */
 
#define AK4114_UNLCK   (1<<4) /* PLL lock status, 0 = lock, 1 = unlock */
 
#define AK4114_DTSCD   (1<<3) /* DTS-CD Detect, 0 = No detect, 1 = Detect */
 
#define AK4114_PEM   (1<<2) /* Pre-emphasis Detect, 0 = OFF, 1 = ON */
 
#define AK4114_AUDION   (1<<1) /* audio bit output, 0 = audio, 1 = non-audio */
 
#define AK4114_PAR   (1<<0) /* parity error or biphase error status, 0 = no error, 1 = error */
 
#define AK4114_FS3   (1<<7) /* sampling frequency detection */
 
#define AK4114_FS2   (1<<6)
 
#define AK4114_FS1   (1<<5)
 
#define AK4114_FS0   (1<<4)
 
#define AK4114_FS_44100HZ   (0)
 
#define AK4114_FS_48000HZ   (AK4114_FS1)
 
#define AK4114_FS_32000HZ   (AK4114_FS1|AK4114_FS0)
 
#define AK4114_FS_88200HZ   (AK4114_FS3)
 
#define AK4114_FS_96000HZ   (AK4114_FS3|AK4114_FS1)
 
#define AK4114_FS_176400HZ   (AK4114_FS3|AK4114_FS2)
 
#define AK4114_FS_192000HZ   (AK4114_FS3|AK4114_FS2|AK4114_FS1)
 
#define AK4114_V   (1<<3) /* Validity of Channel Status, 0 = Valid, 1 = Invalid */
 
#define AK4114_QCRC   (1<<1) /* CRC for Q-subcode, 0 = no error, 1 = error */
 
#define AK4114_CCRC   (1<<0) /* CRC for channel status, 0 = no error, 1 = error */
 
#define AK4114_CHECK_NO_STAT   (1<<0) /* no statistics */
 
#define AK4114_CHECK_NO_RATE   (1<<1) /* no rate check */
 
#define AK4114_CONTROLS   15
 

Typedefs

typedef voidak4114_write_t )(void *private_data, unsigned char addr, unsigned char data)
 
typedef unsigned charak4114_read_t )(void *private_data, unsigned char addr)
 

Functions

int snd_ak4114_create (struct snd_card *card, ak4114_read_t *read, ak4114_write_t *write, const unsigned char pgm[7], const unsigned char txcsb[5], void *private_data, struct ak4114 **r_ak4114)
 
void snd_ak4114_reg_write (struct ak4114 *ak4114, unsigned char reg, unsigned char mask, unsigned char val)
 
void snd_ak4114_reinit (struct ak4114 *ak4114)
 
int snd_ak4114_build (struct ak4114 *ak4114, struct snd_pcm_substream *playback_substream, struct snd_pcm_substream *capture_substream)
 
int snd_ak4114_external_rate (struct ak4114 *ak4114)
 
int snd_ak4114_check_rate_and_errors (struct ak4114 *ak4114, unsigned int flags)
 

Macro Definition Documentation

#define AK4114_AUDION   (1<<1) /* audio bit output, 0 = audio, 1 = non-audio */

Definition at line 138 of file ak4114.h.

#define AK4114_AUTO   (1<<6) /* Non-PCM or DTS stream auto detection, 0 = no detect, 1 = detect */

Definition at line 133 of file ak4114.h.

#define AK4114_BCU   (1<<6) /* Block Start & C/U Output Mode */

Definition at line 66 of file ak4114.h.

#define AK4114_CCRC   (1<<0) /* CRC for channel status, 0 = no error, 1 = error */

Definition at line 155 of file ak4114.h.

#define AK4114_CHECK_NO_RATE   (1<<1) /* no rate check */

Definition at line 159 of file ak4114.h.

#define AK4114_CHECK_NO_STAT   (1<<0) /* no statistics */

Definition at line 158 of file ak4114.h.

#define AK4114_CINT   (1<<5) /* channel status buffer interrupt, 0 = no change, 1 = change */

Definition at line 134 of file ak4114.h.

#define AK4114_CM0   (1<<4) /* Master Clock Operation Select */

Definition at line 68 of file ak4114.h.

#define AK4114_CM1   (1<<5) /* Master Clock Operation Select */

Definition at line 67 of file ak4114.h.

#define AK4114_CONTROLS   15

Definition at line 161 of file ak4114.h.

#define AK4114_CS12   (1<<7) /* Channel Status Select */

Definition at line 65 of file ak4114.h.

#define AK4114_DEAU   (1<<3) /* Deemphasis Autodetect Enable (1 = enable) */

Definition at line 87 of file ak4114.h.

#define AK4114_DEM0   (1<<1) /* 32kHz-48kHz Deemphasis Control */

Definition at line 89 of file ak4114.h.

#define AK4114_DEM1   (1<<2) /* 32kHz-48kHz Deemphasis Control */

Definition at line 88 of file ak4114.h.

#define AK4114_DEM_32KHZ   (AK4114_DEM0|AK4114_DEM1)

Definition at line 92 of file ak4114.h.

#define AK4114_DEM_44KHZ   (0)

Definition at line 90 of file ak4114.h.

#define AK4114_DEM_48KHZ   (AK4114_DEM1)

Definition at line 91 of file ak4114.h.

#define AK4114_DEM_96KHZ   (AK4114_DEM1) /* DFS must be set */

Definition at line 93 of file ak4114.h.

#define AK4114_DFS   (1<<0) /* 96kHz Deemphasis Control */

Definition at line 94 of file ak4114.h.

#define AK4114_DIF0   (1<<4) /* Audio Data Control */

Definition at line 78 of file ak4114.h.

#define AK4114_DIF1   (1<<5) /* Audio Data Control */

Definition at line 77 of file ak4114.h.

#define AK4114_DIF2   (1<<6) /* Audio Data Control */

Definition at line 76 of file ak4114.h.

#define AK4114_DIF_16R   (0) /* STDO: 16-bit, right justified */

Definition at line 79 of file ak4114.h.

#define AK4114_DIF_18R   (AK4114_DIF0) /* STDO: 18-bit, right justified */

Definition at line 80 of file ak4114.h.

#define AK4114_DIF_20R   (AK4114_DIF1) /* STDO: 20-bit, right justified */

Definition at line 81 of file ak4114.h.

#define AK4114_DIF_24I2S   (AK4114_DIF2|AK4114_DIF0) /* STDO: I2S */

Definition at line 84 of file ak4114.h.

#define AK4114_DIF_24L   (AK4114_DIF2) /* STDO: 24-bit, left justified */

Definition at line 83 of file ak4114.h.

#define AK4114_DIF_24R   (AK4114_DIF1|AK4114_DIF0) /* STDO: 24-bit, right justified */

Definition at line 82 of file ak4114.h.

#define AK4114_DIF_I24I2S   (AK4114_DIF2|AK4114_DIF1|AK4114_DIF0) /* STDO: I2S; LRCLK, BICK = Input */

Definition at line 86 of file ak4114.h.

#define AK4114_DIF_I24L   (AK4114_DIF2|AK4114_DIF1) /* STDO: 24-bit, left justified; LRCLK, BICK = Input */

Definition at line 85 of file ak4114.h.

#define AK4114_DIT   (1<<3) /* TX1 out: 0 = Through Data (RX data), 1 = Transmit Data (DAUX data) */

Definition at line 115 of file ak4114.h.

#define AK4114_DTSCD   (1<<3) /* DTS-CD Detect, 0 = No detect, 1 = Detect */

Definition at line 136 of file ak4114.h.

#define AK4114_EFH0   (1<<6) /* Interrupt 0 pin Hold */

Definition at line 108 of file ak4114.h.

#define AK4114_EFH1   (1<<7) /* Interrupt 0 pin Hold */

Definition at line 107 of file ak4114.h.

#define AK4114_EFH_1024   (AK4114_EFH0)

Definition at line 110 of file ak4114.h.

#define AK4114_EFH_2048   (AK4114_EFH1)

Definition at line 111 of file ak4114.h.

#define AK4114_EFH_4096   (AK4114_EFH1|AK4114_EFH0)

Definition at line 112 of file ak4114.h.

#define AK4114_EFH_512   (0)

Definition at line 109 of file ak4114.h.

#define AK4114_FS0   (1<<4)

Definition at line 145 of file ak4114.h.

#define AK4114_FS1   (1<<5)

Definition at line 144 of file ak4114.h.

#define AK4114_FS2   (1<<6)

Definition at line 143 of file ak4114.h.

#define AK4114_FS3   (1<<7) /* sampling frequency detection */

Definition at line 142 of file ak4114.h.

#define AK4114_FS_176400HZ   (AK4114_FS3|AK4114_FS2)

Definition at line 151 of file ak4114.h.

#define AK4114_FS_192000HZ   (AK4114_FS3|AK4114_FS2|AK4114_FS1)

Definition at line 152 of file ak4114.h.

#define AK4114_FS_32000HZ   (AK4114_FS1|AK4114_FS0)

Definition at line 148 of file ak4114.h.

#define AK4114_FS_44100HZ   (0)

Definition at line 146 of file ak4114.h.

#define AK4114_FS_48000HZ   (AK4114_FS1)

Definition at line 147 of file ak4114.h.

#define AK4114_FS_88200HZ   (AK4114_FS3)

Definition at line 149 of file ak4114.h.

#define AK4114_FS_96000HZ   (AK4114_FS3|AK4114_FS1)

Definition at line 150 of file ak4114.h.

#define AK4114_IPS (   x)    ((x)&7)

Definition at line 119 of file ak4114.h.

#define AK4114_IPS0   (1<<0) /* Input Recovery Data Select */

Definition at line 118 of file ak4114.h.

#define AK4114_IPS1   (1<<1) /* Input Recovery Data Select */

Definition at line 117 of file ak4114.h.

#define AK4114_IPS2   (1<<2) /* Input Recovery Data Select */

Definition at line 116 of file ak4114.h.

#define AK4114_MONO   (1<<7) /* Double Sampling Frequency Mode: 0 = stereo, 1 = mono */

Definition at line 75 of file ak4114.h.

#define AK4114_OCKS0   (1<<2) /* Master Clock Frequency Select */

Definition at line 70 of file ak4114.h.

#define AK4114_OCKS1   (1<<3) /* Master Clock Frequency Select */

Definition at line 69 of file ak4114.h.

#define AK4114_OPS00   (1<<0) /* Output Data Selector for TX0 pin */

Definition at line 104 of file ak4114.h.

#define AK4114_OPS01   (1<<1) /* Output Data Selector for TX0 pin */

Definition at line 103 of file ak4114.h.

#define AK4114_OPS02   (1<<2) /* Output Data Selector for TX0 pin */

Definition at line 102 of file ak4114.h.

#define AK4114_OPS10   (1<<4) /* Output Data Selector for TX1 pin */

Definition at line 100 of file ak4114.h.

#define AK4114_OPS11   (1<<5) /* Output Data Selector for TX1 pin */

Definition at line 99 of file ak4114.h.

#define AK4114_OPS12   (1<<6) /* Output Data Selector for TX1 pin */

Definition at line 98 of file ak4114.h.

#define AK4114_PAR   (1<<0) /* parity error or biphase error status, 0 = no error, 1 = error */

Definition at line 139 of file ak4114.h.

#define AK4114_PEM   (1<<2) /* Pre-emphasis Detect, 0 = OFF, 1 = ON */

Definition at line 137 of file ak4114.h.

#define AK4114_PWN   (1<<1) /* 0 = power down, 1 = normal operation */

Definition at line 71 of file ak4114.h.

#define AK4114_QCRC   (1<<1) /* CRC for Q-subcode, 0 = no error, 1 = error */

Definition at line 154 of file ak4114.h.

#define AK4114_QINT   (1<<7) /* Q-subcode buffer interrupt, 0 = no change, 1 = changed */

Definition at line 132 of file ak4114.h.

#define AK4114_REG_FORMAT   0x01 /* format control */

Definition at line 27 of file ak4114.h.

#define AK4114_REG_INT0_MASK   0x04 /* interrupt0 mask */

Definition at line 30 of file ak4114.h.

#define AK4114_REG_INT1_MASK   0x05 /* interrupt1 mask */

Definition at line 31 of file ak4114.h.

#define AK4114_REG_IO0   0x02 /* input/output control */

Definition at line 28 of file ak4114.h.

#define AK4114_REG_IO1   0x03 /* input/output control */

Definition at line 29 of file ak4114.h.

#define AK4114_REG_Pc0   0x12 /* burst preamble Pc byte 0 */

Definition at line 44 of file ak4114.h.

#define AK4114_REG_Pc1   0x13 /* burst preamble Pc byte 1 */

Definition at line 45 of file ak4114.h.

#define AK4114_REG_Pd0   0x14 /* burst preamble Pd byte 0 */

Definition at line 46 of file ak4114.h.

#define AK4114_REG_Pd1   0x15 /* burst preamble Pd byte 1 */

Definition at line 47 of file ak4114.h.

#define AK4114_REG_PWRDN   0x00 /* power down */

Definition at line 26 of file ak4114.h.

#define AK4114_REG_QSUB_ABSFRM   0x1f /* Q-subcode absolute frame */

Definition at line 57 of file ak4114.h.

#define AK4114_REG_QSUB_ABSMIN   0x1d /* Q-subcode absolute minute */

Definition at line 55 of file ak4114.h.

#define AK4114_REG_QSUB_ABSSEC   0x1e /* Q-subcode absolute second */

Definition at line 56 of file ak4114.h.

#define AK4114_REG_QSUB_ADDR   0x16 /* Q-subcode address + control */

Definition at line 48 of file ak4114.h.

#define AK4114_REG_QSUB_FRAME   0x1b /* Q-subcode frame */

Definition at line 53 of file ak4114.h.

#define AK4114_REG_QSUB_INDEX   0x18 /* Q-subcode index */

Definition at line 50 of file ak4114.h.

#define AK4114_REG_QSUB_MINUTE   0x19 /* Q-subcode minute */

Definition at line 51 of file ak4114.h.

#define AK4114_REG_QSUB_SECOND   0x1a /* Q-subcode second */

Definition at line 52 of file ak4114.h.

#define AK4114_REG_QSUB_SIZE   ((AK4114_REG_QSUB_ABSFRM-AK4114_REG_QSUB_ADDR)+1)

Definition at line 62 of file ak4114.h.

#define AK4114_REG_QSUB_TRACK   0x17 /* Q-subcode track */

Definition at line 49 of file ak4114.h.

#define AK4114_REG_QSUB_ZERO   0x1c /* Q-subcode zero */

Definition at line 54 of file ak4114.h.

#define AK4114_REG_RCS0   0x06 /* receiver status 0 */

Definition at line 32 of file ak4114.h.

#define AK4114_REG_RCS1   0x07 /* receiver status 1 */

Definition at line 33 of file ak4114.h.

#define AK4114_REG_RXCSB0   0x08 /* RX channel status byte 0 */

Definition at line 34 of file ak4114.h.

#define AK4114_REG_RXCSB1   0x09 /* RX channel status byte 1 */

Definition at line 35 of file ak4114.h.

#define AK4114_REG_RXCSB2   0x0a /* RX channel status byte 2 */

Definition at line 36 of file ak4114.h.

#define AK4114_REG_RXCSB3   0x0b /* RX channel status byte 3 */

Definition at line 37 of file ak4114.h.

#define AK4114_REG_RXCSB4   0x0c /* RX channel status byte 4 */

Definition at line 38 of file ak4114.h.

#define AK4114_REG_RXCSB_SIZE   ((AK4114_REG_RXCSB4-AK4114_REG_RXCSB0)+1)

Definition at line 60 of file ak4114.h.

#define AK4114_REG_TXCSB0   0x0d /* TX channel status byte 0 */

Definition at line 39 of file ak4114.h.

#define AK4114_REG_TXCSB1   0x0e /* TX channel status byte 1 */

Definition at line 40 of file ak4114.h.

#define AK4114_REG_TXCSB2   0x0f /* TX channel status byte 2 */

Definition at line 41 of file ak4114.h.

#define AK4114_REG_TXCSB3   0x10 /* TX channel status byte 3 */

Definition at line 42 of file ak4114.h.

#define AK4114_REG_TXCSB4   0x11 /* TX channel status byte 4 */

Definition at line 43 of file ak4114.h.

#define AK4114_REG_TXCSB_SIZE   ((AK4114_REG_TXCSB4-AK4114_REG_TXCSB0)+1)

Definition at line 61 of file ak4114.h.

#define AK4114_RST   (1<<0) /* 0 = reset & initialize (except this register), 1 = normal operation */

Definition at line 72 of file ak4114.h.

#define AK4114_TLR   (1<<4) /* Double Sampling Frequency Select for DIT (0 = L channel, 1 = R channel) */

Definition at line 114 of file ak4114.h.

#define AK4114_TX0E   (1<<3) /* TX0 Output Enable (1 = enable) */

Definition at line 101 of file ak4114.h.

#define AK4114_TX1E   (1<<7) /* TX1 Output Enable (1 = enable) */

Definition at line 97 of file ak4114.h.

#define AK4114_UDIT   (1<<5) /* U-bit Control for DIT (0 = fixed '0', 1 = recovered) */

Definition at line 113 of file ak4114.h.

#define AK4114_UNLCK   (1<<4) /* PLL lock status, 0 = lock, 1 = unlock */

Definition at line 135 of file ak4114.h.

#define AK4114_V   (1<<3) /* Validity of Channel Status, 0 = Valid, 1 = Invalid */

Definition at line 153 of file ak4114.h.

#define AK4117_MAN   (1<<1) /* mask enable for AUDN bit */

Definition at line 128 of file ak4114.h.

#define AK4117_MAT   (1<<6) /* mask enable for AUTO bit */

Definition at line 123 of file ak4114.h.

#define AK4117_MCI   (1<<5) /* mask enable for CINT bit */

Definition at line 124 of file ak4114.h.

#define AK4117_MDTS   (1<<3) /* mask enable for DTSCD bit */

Definition at line 126 of file ak4114.h.

#define AK4117_MPE   (1<<2) /* mask enable for PEM bit */

Definition at line 127 of file ak4114.h.

#define AK4117_MPR   (1<<0) /* mask enable for PAR bit */

Definition at line 129 of file ak4114.h.

#define AK4117_MQI   (1<<7) /* mask enable for QINT bit */

Definition at line 122 of file ak4114.h.

#define AK4117_MUL   (1<<4) /* mask enable for UNLOCK bit */

Definition at line 125 of file ak4114.h.

Typedef Documentation

typedef unsigned char( ak4114_read_t)(void *private_data, unsigned char addr)

Definition at line 164 of file ak4114.h.

typedef void( ak4114_write_t)(void *private_data, unsigned char addr, unsigned char data)

Definition at line 163 of file ak4114.h.

Function Documentation

int snd_ak4114_build ( struct ak4114 ak4114,
struct snd_pcm_substream playback_substream,
struct snd_pcm_substream capture_substream 
)

Definition at line 470 of file ak4114.c.

int snd_ak4114_check_rate_and_errors ( struct ak4114 ak4114,
unsigned int  flags 
)

Definition at line 564 of file ak4114.c.

int snd_ak4114_create ( struct snd_card card,
ak4114_read_t read,
ak4114_write_t write,
const unsigned char  pgm[7],
const unsigned char  txcsb[5],
void private_data,
struct ak4114 **  r_ak4114 
)

Definition at line 82 of file ak4114.c.

int snd_ak4114_external_rate ( struct ak4114 ak4114)

Definition at line 556 of file ak4114.c.

void snd_ak4114_reg_write ( struct ak4114 ak4114,
unsigned char  reg,
unsigned char  mask,
unsigned char  val 
)

Definition at line 126 of file ak4114.c.

void snd_ak4114_reinit ( struct ak4114 ak4114)

Definition at line 153 of file ak4114.c.