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time.c
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1 /*
2  * Time of day based timer functions.
3  *
4  * S390 version
5  * Copyright IBM Corp. 1999, 2008
6  * Author(s): Hartmut Penner ([email protected]),
7  * Martin Schwidefsky ([email protected]),
8  * Denis Joseph Barrow ([email protected],[email protected])
9  *
10  * Derived from "arch/i386/kernel/time.c"
11  * Copyright (C) 1991, 1992, 1995 Linus Torvalds
12  */
13 
14 #define KMSG_COMPONENT "time"
15 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
16 
17 #include <linux/kernel_stat.h>
18 #include <linux/errno.h>
19 #include <linux/module.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/mm.h>
25 #include <linux/interrupt.h>
26 #include <linux/cpu.h>
27 #include <linux/stop_machine.h>
28 #include <linux/time.h>
29 #include <linux/device.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/smp.h>
33 #include <linux/types.h>
34 #include <linux/profile.h>
35 #include <linux/timex.h>
36 #include <linux/notifier.h>
38 #include <linux/clockchips.h>
39 #include <linux/gfp.h>
40 #include <linux/kprobes.h>
41 #include <asm/uaccess.h>
42 #include <asm/delay.h>
43 #include <asm/div64.h>
44 #include <asm/vdso.h>
45 #include <asm/irq.h>
46 #include <asm/irq_regs.h>
47 #include <asm/vtimer.h>
48 #include <asm/etr.h>
49 #include <asm/cio.h>
50 #include "entry.h"
51 
52 /* change this if you have some constant time drift */
53 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
54 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
55 
56 u64 sched_clock_base_cc = -1; /* Force to data section. */
58 
59 static DEFINE_PER_CPU(struct clock_event_device, comparators);
60 
61 /*
62  * Scheduler clock - returns current time in nanosec units.
63  */
64 unsigned long long notrace __kprobes sched_clock(void)
65 {
66  return (get_clock_monotonic() * 125) >> 9;
67 }
68 
69 /*
70  * Monotonic_clock - returns # of nanoseconds passed since time_init()
71  */
72 unsigned long long monotonic_clock(void)
73 {
74  return sched_clock();
75 }
77 
78 void tod_to_timeval(__u64 todval, struct timespec *xt)
79 {
80  unsigned long long sec;
81 
82  sec = todval >> 12;
83  do_div(sec, 1000000);
84  xt->tv_sec = sec;
85  todval -= (sec * 1000000) << 12;
86  xt->tv_nsec = ((todval * 1000) >> 12);
87 }
89 
91 {
92  struct clock_event_device *cd;
93 
94  S390_lowcore.clock_comparator = -1ULL;
95  set_clock_comparator(S390_lowcore.clock_comparator);
96  cd = &__get_cpu_var(comparators);
97  cd->event_handler(cd);
98 }
99 
100 /*
101  * Fixup the clock comparator.
102  */
103 static void fixup_clock_comparator(unsigned long long delta)
104 {
105  /* If nobody is waiting there's nothing to fix. */
106  if (S390_lowcore.clock_comparator == -1ULL)
107  return;
108  S390_lowcore.clock_comparator += delta;
109  set_clock_comparator(S390_lowcore.clock_comparator);
110 }
111 
112 static int s390_next_ktime(ktime_t expires,
113  struct clock_event_device *evt)
114 {
115  struct timespec ts;
116  u64 nsecs;
117 
118  ts.tv_sec = ts.tv_nsec = 0;
120  nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
121  do_div(nsecs, 125);
122  S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
123  set_clock_comparator(S390_lowcore.clock_comparator);
124  return 0;
125 }
126 
127 static void s390_set_mode(enum clock_event_mode mode,
128  struct clock_event_device *evt)
129 {
130 }
131 
132 /*
133  * Set up lowcore and control register of the current cpu to
134  * enable TOD clock and clock comparator interrupts.
135  */
136 void init_cpu_timer(void)
137 {
138  struct clock_event_device *cd;
139  int cpu;
140 
141  S390_lowcore.clock_comparator = -1ULL;
142  set_clock_comparator(S390_lowcore.clock_comparator);
143 
144  cpu = smp_processor_id();
145  cd = &per_cpu(comparators, cpu);
146  cd->name = "comparator";
147  cd->features = CLOCK_EVT_FEAT_ONESHOT |
148  CLOCK_EVT_FEAT_KTIME;
149  cd->mult = 16777;
150  cd->shift = 12;
151  cd->min_delta_ns = 1;
152  cd->max_delta_ns = LONG_MAX;
153  cd->rating = 400;
154  cd->cpumask = cpumask_of(cpu);
155  cd->set_next_ktime = s390_next_ktime;
156  cd->set_mode = s390_set_mode;
157 
159 
160  /* Enable clock comparator timer interrupt. */
161  __ctl_set_bit(0,11);
162 
163  /* Always allow the timing alert external interrupt. */
164  __ctl_set_bit(0, 4);
165 }
166 
167 static void clock_comparator_interrupt(struct ext_code ext_code,
168  unsigned int param32,
169  unsigned long param64)
170 {
172  if (S390_lowcore.clock_comparator == -1ULL)
173  set_clock_comparator(S390_lowcore.clock_comparator);
174 }
175 
176 static void etr_timing_alert(struct etr_irq_parm *);
177 static void stp_timing_alert(struct stp_irq_parm *);
178 
179 static void timing_alert_interrupt(struct ext_code ext_code,
180  unsigned int param32, unsigned long param64)
181 {
183  if (param32 & 0x00c40000)
184  etr_timing_alert((struct etr_irq_parm *) &param32);
185  if (param32 & 0x00038000)
186  stp_timing_alert((struct stp_irq_parm *) &param32);
187 }
188 
189 static void etr_reset(void);
190 static void stp_reset(void);
191 
193 {
195 }
196 
198 {
200 }
201 
202 static cycle_t read_tod_clock(struct clocksource *cs)
203 {
204  return get_clock();
205 }
206 
207 static struct clocksource clocksource_tod = {
208  .name = "tod",
209  .rating = 400,
210  .read = read_tod_clock,
211  .mask = -1ULL,
212  .mult = 1000,
213  .shift = 12,
215 };
216 
218 {
219  return &clocksource_tod;
220 }
221 
222 void update_vsyscall_old(struct timespec *wall_time, struct timespec *wtm,
223  struct clocksource *clock, u32 mult)
224 {
225  if (clock != &clocksource_tod)
226  return;
227 
228  /* Make userspace gettimeofday spin until we're done. */
230  smp_wmb();
232  vdso_data->xtime_clock_sec = wall_time->tv_sec;
233  vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
237  smp_wmb();
239 }
240 
241 extern struct timezone sys_tz;
242 
244 {
245  /* Make userspace gettimeofday spin until we're done. */
247  smp_wmb();
248  vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
249  vdso_data->tz_dsttime = sys_tz.tz_dsttime;
250  smp_wmb();
252 }
253 
254 /*
255  * Initialize the TOD clock and the CPU timer of
256  * the boot cpu.
257  */
258 void __init time_init(void)
259 {
260  /* Reset time synchronization interfaces. */
261  etr_reset();
262  stp_reset();
263 
264  /* request the clock comparator external interrupt */
265  if (register_external_interrupt(0x1004, clock_comparator_interrupt))
266  panic("Couldn't request external interrupt 0x1004");
267 
268  /* request the timing alert external interrupt */
269  if (register_external_interrupt(0x1406, timing_alert_interrupt))
270  panic("Couldn't request external interrupt 0x1406");
271 
272  if (clocksource_register(&clocksource_tod) != 0)
273  panic("Could not register TOD clock source");
274 
275  /* Enable TOD clock interrupts on the boot cpu. */
276  init_cpu_timer();
277 
278  /* Enable cpu timer interrupts on the boot cpu. */
279  vtime_init();
280 }
281 
282 /*
283  * The time is "clock". old is what we think the time is.
284  * Adjust the value by a multiple of jiffies and add the delta to ntp.
285  * "delay" is an approximation how long the synchronization took. If
286  * the time correction is positive, then "delay" is subtracted from
287  * the time difference and only the remaining part is passed to ntp.
288  */
289 static unsigned long long adjust_time(unsigned long long old,
290  unsigned long long clock,
291  unsigned long long delay)
292 {
293  unsigned long long delta, ticks;
294  struct timex adjust;
295 
296  if (clock > old) {
297  /* It is later than we thought. */
298  delta = ticks = clock - old;
299  delta = ticks = (delta < delay) ? 0 : delta - delay;
300  delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
301  adjust.offset = ticks * (1000000 / HZ);
302  } else {
303  /* It is earlier than we thought. */
304  delta = ticks = old - clock;
305  delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
306  delta = -delta;
307  adjust.offset = -ticks * (1000000 / HZ);
308  }
310  if (adjust.offset != 0) {
311  pr_notice("The ETR interface has adjusted the clock "
312  "by %li microseconds\n", adjust.offset);
315  }
316  return delta;
317 }
318 
319 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
320 static DEFINE_MUTEX(clock_sync_mutex);
321 static unsigned long clock_sync_flags;
322 
323 #define CLOCK_SYNC_HAS_ETR 0
324 #define CLOCK_SYNC_HAS_STP 1
325 #define CLOCK_SYNC_ETR 2
326 #define CLOCK_SYNC_STP 3
327 
328 /*
329  * The synchronous get_clock function. It will write the current clock
330  * value to the clock pointer and return 0 if the clock is in sync with
331  * the external time source. If the clock mode is local it will return
332  * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external
333  * reference.
334  */
335 int get_sync_clock(unsigned long long *clock)
336 {
337  atomic_t *sw_ptr;
338  unsigned int sw0, sw1;
339 
340  sw_ptr = &get_cpu_var(clock_sync_word);
341  sw0 = atomic_read(sw_ptr);
342  *clock = get_clock();
343  sw1 = atomic_read(sw_ptr);
344  put_cpu_var(clock_sync_word);
345  if (sw0 == sw1 && (sw0 & 0x80000000U))
346  /* Success: time is in sync. */
347  return 0;
348  if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
349  !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
350  return -EOPNOTSUPP;
351  if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
352  !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
353  return -EACCES;
354  return -EAGAIN;
355 }
357 
358 /*
359  * Make get_sync_clock return -EAGAIN.
360  */
361 static void disable_sync_clock(void *dummy)
362 {
363  atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
364  /*
365  * Clear the in-sync bit 2^31. All get_sync_clock calls will
366  * fail until the sync bit is turned back on. In addition
367  * increase the "sequence" counter to avoid the race of an
368  * etr event and the complete recovery against get_sync_clock.
369  */
370  atomic_clear_mask(0x80000000, sw_ptr);
371  atomic_inc(sw_ptr);
372 }
373 
374 /*
375  * Make get_sync_clock return 0 again.
376  * Needs to be called from a context disabled for preemption.
377  */
378 static void enable_sync_clock(void)
379 {
380  atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
381  atomic_set_mask(0x80000000, sw_ptr);
382 }
383 
384 /*
385  * Function to check if the clock is in sync.
386  */
387 static inline int check_sync_clock(void)
388 {
389  atomic_t *sw_ptr;
390  int rc;
391 
392  sw_ptr = &get_cpu_var(clock_sync_word);
393  rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
394  put_cpu_var(clock_sync_word);
395  return rc;
396 }
397 
398 /* Single threaded workqueue used for etr and stp sync events */
399 static struct workqueue_struct *time_sync_wq;
400 
401 static void __init time_init_wq(void)
402 {
403  if (time_sync_wq)
404  return;
405  time_sync_wq = create_singlethread_workqueue("timesync");
406 }
407 
408 /*
409  * External Time Reference (ETR) code.
410  */
411 static int etr_port0_online;
412 static int etr_port1_online;
413 static int etr_steai_available;
414 
415 static int __init early_parse_etr(char *p)
416 {
417  if (strncmp(p, "off", 3) == 0)
418  etr_port0_online = etr_port1_online = 0;
419  else if (strncmp(p, "port0", 5) == 0)
420  etr_port0_online = 1;
421  else if (strncmp(p, "port1", 5) == 0)
422  etr_port1_online = 1;
423  else if (strncmp(p, "on", 2) == 0)
424  etr_port0_online = etr_port1_online = 1;
425  return 0;
426 }
427 early_param("etr", early_parse_etr);
428 
429 enum etr_event {
436 };
437 
438 /*
439  * Valid bit combinations of the eacr register are (x = don't care):
440  * e0 e1 dp p0 p1 ea es sl
441  * 0 0 x 0 0 0 0 0 initial, disabled state
442  * 0 0 x 0 1 1 0 0 port 1 online
443  * 0 0 x 1 0 1 0 0 port 0 online
444  * 0 0 x 1 1 1 0 0 both ports online
445  * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
446  * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
447  * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
448  * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
449  * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
450  * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
451  * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
452  * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
453  * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
454  * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
455  * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
456  * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
457  * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
458  * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
459  * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
460  * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
461  */
462 static struct etr_eacr etr_eacr;
463 static u64 etr_tolec; /* time of last eacr update */
464 static struct etr_aib etr_port0;
465 static int etr_port0_uptodate;
466 static struct etr_aib etr_port1;
467 static int etr_port1_uptodate;
468 static unsigned long etr_events;
469 static struct timer_list etr_timer;
470 
471 static void etr_timeout(unsigned long dummy);
472 static void etr_work_fn(struct work_struct *work);
473 static DEFINE_MUTEX(etr_work_mutex);
474 static DECLARE_WORK(etr_work, etr_work_fn);
475 
476 /*
477  * Reset ETR attachment.
478  */
479 static void etr_reset(void)
480 {
481  etr_eacr = (struct etr_eacr) {
482  .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
483  .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
484  .es = 0, .sl = 0 };
485  if (etr_setr(&etr_eacr) == 0) {
486  etr_tolec = get_clock();
487  set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
488  if (etr_port0_online && etr_port1_online)
489  set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
490  } else if (etr_port0_online || etr_port1_online) {
491  pr_warning("The real or virtual hardware system does "
492  "not provide an ETR interface\n");
493  etr_port0_online = etr_port1_online = 0;
494  }
495 }
496 
497 static int __init etr_init(void)
498 {
499  struct etr_aib aib;
500 
501  if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
502  return 0;
503  time_init_wq();
504  /* Check if this machine has the steai instruction. */
505  if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
506  etr_steai_available = 1;
507  setup_timer(&etr_timer, etr_timeout, 0UL);
508  if (etr_port0_online) {
509  set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
510  queue_work(time_sync_wq, &etr_work);
511  }
512  if (etr_port1_online) {
513  set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
514  queue_work(time_sync_wq, &etr_work);
515  }
516  return 0;
517 }
518 
519 arch_initcall(etr_init);
520 
521 /*
522  * Two sorts of ETR machine checks. The architecture reads:
523  * "When a machine-check niterruption occurs and if a switch-to-local or
524  * ETR-sync-check interrupt request is pending but disabled, this pending
525  * disabled interruption request is indicated and is cleared".
526  * Which means that we can get etr_switch_to_local events from the machine
527  * check handler although the interruption condition is disabled. Lovely..
528  */
529 
530 /*
531  * Switch to local machine check. This is called when the last usable
532  * ETR port goes inactive. After switch to local the clock is not in sync.
533  */
535 {
536  if (!etr_eacr.sl)
537  return;
538  disable_sync_clock(NULL);
539  if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
540  etr_eacr.es = etr_eacr.sl = 0;
541  etr_setr(&etr_eacr);
542  queue_work(time_sync_wq, &etr_work);
543  }
544 }
545 
546 /*
547  * ETR sync check machine check. This is called when the ETR OTE and the
548  * local clock OTE are farther apart than the ETR sync check tolerance.
549  * After a ETR sync check the clock is not in sync. The machine check
550  * is broadcasted to all cpus at the same time.
551  */
552 void etr_sync_check(void)
553 {
554  if (!etr_eacr.es)
555  return;
556  disable_sync_clock(NULL);
557  if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
558  etr_eacr.es = 0;
559  etr_setr(&etr_eacr);
560  queue_work(time_sync_wq, &etr_work);
561  }
562 }
563 
564 /*
565  * ETR timing alert. There are two causes:
566  * 1) port state change, check the usability of the port
567  * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
568  * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
569  * or ETR-data word 4 (edf4) has changed.
570  */
571 static void etr_timing_alert(struct etr_irq_parm *intparm)
572 {
573  if (intparm->pc0)
574  /* ETR port 0 state change. */
575  set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
576  if (intparm->pc1)
577  /* ETR port 1 state change. */
578  set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
579  if (intparm->eai)
580  /*
581  * ETR port alert on either port 0, 1 or both.
582  * Both ports are not up-to-date now.
583  */
584  set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
585  queue_work(time_sync_wq, &etr_work);
586 }
587 
588 static void etr_timeout(unsigned long dummy)
589 {
590  set_bit(ETR_EVENT_UPDATE, &etr_events);
591  queue_work(time_sync_wq, &etr_work);
592 }
593 
594 /*
595  * Check if the etr mode is pss.
596  */
597 static inline int etr_mode_is_pps(struct etr_eacr eacr)
598 {
599  return eacr.es && !eacr.sl;
600 }
601 
602 /*
603  * Check if the etr mode is etr.
604  */
605 static inline int etr_mode_is_etr(struct etr_eacr eacr)
606 {
607  return eacr.es && eacr.sl;
608 }
609 
610 /*
611  * Check if the port can be used for TOD synchronization.
612  * For PPS mode the port has to receive OTEs. For ETR mode
613  * the port has to receive OTEs, the ETR stepping bit has to
614  * be zero and the validity bits for data frame 1, 2, and 3
615  * have to be 1.
616  */
617 static int etr_port_valid(struct etr_aib *aib, int port)
618 {
619  unsigned int psc;
620 
621  /* Check that this port is receiving OTEs. */
622  if (aib->tsp == 0)
623  return 0;
624 
625  psc = port ? aib->esw.psc1 : aib->esw.psc0;
626  if (psc == etr_lpsc_pps_mode)
627  return 1;
628  if (psc == etr_lpsc_operational_step)
629  return !aib->esw.y && aib->slsw.v1 &&
630  aib->slsw.v2 && aib->slsw.v3;
631  return 0;
632 }
633 
634 /*
635  * Check if two ports are on the same network.
636  */
637 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
638 {
639  // FIXME: any other fields we have to compare?
640  return aib1->edf1.net_id == aib2->edf1.net_id;
641 }
642 
643 /*
644  * Wrapper for etr_stei that converts physical port states
645  * to logical port states to be consistent with the output
646  * of stetr (see etr_psc vs. etr_lpsc).
647  */
648 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
649 {
650  BUG_ON(etr_steai(aib, func) != 0);
651  /* Convert port state to logical port state. */
652  if (aib->esw.psc0 == 1)
653  aib->esw.psc0 = 2;
654  else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
655  aib->esw.psc0 = 1;
656  if (aib->esw.psc1 == 1)
657  aib->esw.psc1 = 2;
658  else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
659  aib->esw.psc1 = 1;
660 }
661 
662 /*
663  * Check if the aib a2 is still connected to the same attachment as
664  * aib a1, the etv values differ by one and a2 is valid.
665  */
666 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
667 {
668  int state_a1, state_a2;
669 
670  /* Paranoia check: e0/e1 should better be the same. */
671  if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
672  a1->esw.eacr.e1 != a2->esw.eacr.e1)
673  return 0;
674 
675  /* Still connected to the same etr ? */
676  state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
677  state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
678  if (state_a1 == etr_lpsc_operational_step) {
679  if (state_a2 != etr_lpsc_operational_step ||
680  a1->edf1.net_id != a2->edf1.net_id ||
681  a1->edf1.etr_id != a2->edf1.etr_id ||
682  a1->edf1.etr_pn != a2->edf1.etr_pn)
683  return 0;
684  } else if (state_a2 != etr_lpsc_pps_mode)
685  return 0;
686 
687  /* The ETV value of a2 needs to be ETV of a1 + 1. */
688  if (a1->edf2.etv + 1 != a2->edf2.etv)
689  return 0;
690 
691  if (!etr_port_valid(a2, p))
692  return 0;
693 
694  return 1;
695 }
696 
699  int in_sync;
700  unsigned long long fixup_cc;
701  int etr_port;
702  struct etr_aib *etr_aib;
703 };
704 
705 static void clock_sync_cpu(struct clock_sync_data *sync)
706 {
707  atomic_dec(&sync->cpus);
708  enable_sync_clock();
709  /*
710  * This looks like a busy wait loop but it isn't. etr_sync_cpus
711  * is called on all other cpus while the TOD clocks is stopped.
712  * __udelay will stop the cpu on an enabled wait psw until the
713  * TOD is running again.
714  */
715  while (sync->in_sync == 0) {
716  __udelay(1);
717  /*
718  * A different cpu changes *in_sync. Therefore use
719  * barrier() to force memory access.
720  */
721  barrier();
722  }
723  if (sync->in_sync != 1)
724  /* Didn't work. Clear per-cpu in sync bit again. */
725  disable_sync_clock(NULL);
726  /*
727  * This round of TOD syncing is done. Set the clock comparator
728  * to the next tick and let the processor continue.
729  */
730  fixup_clock_comparator(sync->fixup_cc);
731 }
732 
733 /*
734  * Sync the TOD clock using the port referred to by aibp. This port
735  * has to be enabled and the other port has to be disabled. The
736  * last eacr update has to be more than 1.6 seconds in the past.
737  */
738 static int etr_sync_clock(void *data)
739 {
740  static int first;
741  unsigned long long clock, old_clock, delay, delta;
742  struct clock_sync_data *etr_sync;
743  struct etr_aib *sync_port, *aib;
744  int port;
745  int rc;
746 
747  etr_sync = data;
748 
749  if (xchg(&first, 1) == 1) {
750  /* Slave */
751  clock_sync_cpu(etr_sync);
752  return 0;
753  }
754 
755  /* Wait until all other cpus entered the sync function. */
756  while (atomic_read(&etr_sync->cpus) != 0)
757  cpu_relax();
758 
759  port = etr_sync->etr_port;
760  aib = etr_sync->etr_aib;
761  sync_port = (port == 0) ? &etr_port0 : &etr_port1;
762  enable_sync_clock();
763 
764  /* Set clock to next OTE. */
765  __ctl_set_bit(14, 21);
766  __ctl_set_bit(0, 29);
767  clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
768  old_clock = get_clock();
769  if (set_clock(clock) == 0) {
770  __udelay(1); /* Wait for the clock to start. */
771  __ctl_clear_bit(0, 29);
772  __ctl_clear_bit(14, 21);
773  etr_stetr(aib);
774  /* Adjust Linux timing variables. */
775  delay = (unsigned long long)
776  (aib->edf2.etv - sync_port->edf2.etv) << 32;
777  delta = adjust_time(old_clock, clock, delay);
778  etr_sync->fixup_cc = delta;
779  fixup_clock_comparator(delta);
780  /* Verify that the clock is properly set. */
781  if (!etr_aib_follows(sync_port, aib, port)) {
782  /* Didn't work. */
783  disable_sync_clock(NULL);
784  etr_sync->in_sync = -EAGAIN;
785  rc = -EAGAIN;
786  } else {
787  etr_sync->in_sync = 1;
788  rc = 0;
789  }
790  } else {
791  /* Could not set the clock ?!? */
792  __ctl_clear_bit(0, 29);
793  __ctl_clear_bit(14, 21);
794  disable_sync_clock(NULL);
795  etr_sync->in_sync = -EAGAIN;
796  rc = -EAGAIN;
797  }
798  xchg(&first, 0);
799  return rc;
800 }
801 
802 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
803 {
804  struct clock_sync_data etr_sync;
805  struct etr_aib *sync_port;
806  int follows;
807  int rc;
808 
809  /* Check if the current aib is adjacent to the sync port aib. */
810  sync_port = (port == 0) ? &etr_port0 : &etr_port1;
811  follows = etr_aib_follows(sync_port, aib, port);
812  memcpy(sync_port, aib, sizeof(*aib));
813  if (!follows)
814  return -EAGAIN;
815  memset(&etr_sync, 0, sizeof(etr_sync));
816  etr_sync.etr_aib = aib;
817  etr_sync.etr_port = port;
818  get_online_cpus();
819  atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
820  rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
821  put_online_cpus();
822  return rc;
823 }
824 
825 /*
826  * Handle the immediate effects of the different events.
827  * The port change event is used for online/offline changes.
828  */
829 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
830 {
831  if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
832  eacr.es = 0;
833  if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
834  eacr.es = eacr.sl = 0;
835  if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
836  etr_port0_uptodate = etr_port1_uptodate = 0;
837 
838  if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
839  if (eacr.e0)
840  /*
841  * Port change of an enabled port. We have to
842  * assume that this can have caused an stepping
843  * port switch.
844  */
845  etr_tolec = get_clock();
846  eacr.p0 = etr_port0_online;
847  if (!eacr.p0)
848  eacr.e0 = 0;
849  etr_port0_uptodate = 0;
850  }
851  if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
852  if (eacr.e1)
853  /*
854  * Port change of an enabled port. We have to
855  * assume that this can have caused an stepping
856  * port switch.
857  */
858  etr_tolec = get_clock();
859  eacr.p1 = etr_port1_online;
860  if (!eacr.p1)
861  eacr.e1 = 0;
862  etr_port1_uptodate = 0;
863  }
864  clear_bit(ETR_EVENT_UPDATE, &etr_events);
865  return eacr;
866 }
867 
868 /*
869  * Set up a timer that expires after the etr_tolec + 1.6 seconds if
870  * one of the ports needs an update.
871  */
872 static void etr_set_tolec_timeout(unsigned long long now)
873 {
874  unsigned long micros;
875 
876  if ((!etr_eacr.p0 || etr_port0_uptodate) &&
877  (!etr_eacr.p1 || etr_port1_uptodate))
878  return;
879  micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
880  micros = (micros > 1600000) ? 0 : 1600000 - micros;
881  mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
882 }
883 
884 /*
885  * Set up a time that expires after 1/2 second.
886  */
887 static void etr_set_sync_timeout(void)
888 {
889  mod_timer(&etr_timer, jiffies + HZ/2);
890 }
891 
892 /*
893  * Update the aib information for one or both ports.
894  */
895 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
896  struct etr_eacr eacr)
897 {
898  /* With both ports disabled the aib information is useless. */
899  if (!eacr.e0 && !eacr.e1)
900  return eacr;
901 
902  /* Update port0 or port1 with aib stored in etr_work_fn. */
903  if (aib->esw.q == 0) {
904  /* Information for port 0 stored. */
905  if (eacr.p0 && !etr_port0_uptodate) {
906  etr_port0 = *aib;
907  if (etr_port0_online)
908  etr_port0_uptodate = 1;
909  }
910  } else {
911  /* Information for port 1 stored. */
912  if (eacr.p1 && !etr_port1_uptodate) {
913  etr_port1 = *aib;
914  if (etr_port0_online)
915  etr_port1_uptodate = 1;
916  }
917  }
918 
919  /*
920  * Do not try to get the alternate port aib if the clock
921  * is not in sync yet.
922  */
923  if (!eacr.es || !check_sync_clock())
924  return eacr;
925 
926  /*
927  * If steai is available we can get the information about
928  * the other port immediately. If only stetr is available the
929  * data-port bit toggle has to be used.
930  */
931  if (etr_steai_available) {
932  if (eacr.p0 && !etr_port0_uptodate) {
933  etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
934  etr_port0_uptodate = 1;
935  }
936  if (eacr.p1 && !etr_port1_uptodate) {
937  etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
938  etr_port1_uptodate = 1;
939  }
940  } else {
941  /*
942  * One port was updated above, if the other
943  * port is not uptodate toggle dp bit.
944  */
945  if ((eacr.p0 && !etr_port0_uptodate) ||
946  (eacr.p1 && !etr_port1_uptodate))
947  eacr.dp ^= 1;
948  else
949  eacr.dp = 0;
950  }
951  return eacr;
952 }
953 
954 /*
955  * Write new etr control register if it differs from the current one.
956  * Return 1 if etr_tolec has been updated as well.
957  */
958 static void etr_update_eacr(struct etr_eacr eacr)
959 {
960  int dp_changed;
961 
962  if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
963  /* No change, return. */
964  return;
965  /*
966  * The disable of an active port of the change of the data port
967  * bit can/will cause a change in the data port.
968  */
969  dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
970  (etr_eacr.dp ^ eacr.dp) != 0;
971  etr_eacr = eacr;
972  etr_setr(&etr_eacr);
973  if (dp_changed)
974  etr_tolec = get_clock();
975 }
976 
977 /*
978  * ETR work. In this function you'll find the main logic. In
979  * particular this is the only function that calls etr_update_eacr(),
980  * it "controls" the etr control register.
981  */
982 static void etr_work_fn(struct work_struct *work)
983 {
984  unsigned long long now;
985  struct etr_eacr eacr;
986  struct etr_aib aib;
987  int sync_port;
988 
989  /* prevent multiple execution. */
990  mutex_lock(&etr_work_mutex);
991 
992  /* Create working copy of etr_eacr. */
993  eacr = etr_eacr;
994 
995  /* Check for the different events and their immediate effects. */
996  eacr = etr_handle_events(eacr);
997 
998  /* Check if ETR is supposed to be active. */
999  eacr.ea = eacr.p0 || eacr.p1;
1000  if (!eacr.ea) {
1001  /* Both ports offline. Reset everything. */
1002  eacr.dp = eacr.es = eacr.sl = 0;
1003  on_each_cpu(disable_sync_clock, NULL, 1);
1004  del_timer_sync(&etr_timer);
1005  etr_update_eacr(eacr);
1006  goto out_unlock;
1007  }
1008 
1009  /* Store aib to get the current ETR status word. */
1010  BUG_ON(etr_stetr(&aib) != 0);
1011  etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
1012  now = get_clock();
1013 
1014  /*
1015  * Update the port information if the last stepping port change
1016  * or data port change is older than 1.6 seconds.
1017  */
1018  if (now >= etr_tolec + (1600000 << 12))
1019  eacr = etr_handle_update(&aib, eacr);
1020 
1021  /*
1022  * Select ports to enable. The preferred synchronization mode is PPS.
1023  * If a port can be enabled depends on a number of things:
1024  * 1) The port needs to be online and uptodate. A port is not
1025  * disabled just because it is not uptodate, but it is only
1026  * enabled if it is uptodate.
1027  * 2) The port needs to have the same mode (pps / etr).
1028  * 3) The port needs to be usable -> etr_port_valid() == 1
1029  * 4) To enable the second port the clock needs to be in sync.
1030  * 5) If both ports are useable and are ETR ports, the network id
1031  * has to be the same.
1032  * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1033  */
1034  if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1035  eacr.sl = 0;
1036  eacr.e0 = 1;
1037  if (!etr_mode_is_pps(etr_eacr))
1038  eacr.es = 0;
1039  if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1040  eacr.e1 = 0;
1041  // FIXME: uptodate checks ?
1042  else if (etr_port0_uptodate && etr_port1_uptodate)
1043  eacr.e1 = 1;
1044  sync_port = (etr_port0_uptodate &&
1045  etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1046  } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1047  eacr.sl = 0;
1048  eacr.e0 = 0;
1049  eacr.e1 = 1;
1050  if (!etr_mode_is_pps(etr_eacr))
1051  eacr.es = 0;
1052  sync_port = (etr_port1_uptodate &&
1053  etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1054  } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1055  eacr.sl = 1;
1056  eacr.e0 = 1;
1057  if (!etr_mode_is_etr(etr_eacr))
1058  eacr.es = 0;
1059  if (!eacr.es || !eacr.p1 ||
1060  aib.esw.psc1 != etr_lpsc_operational_alt)
1061  eacr.e1 = 0;
1062  else if (etr_port0_uptodate && etr_port1_uptodate &&
1063  etr_compare_network(&etr_port0, &etr_port1))
1064  eacr.e1 = 1;
1065  sync_port = (etr_port0_uptodate &&
1066  etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1067  } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1068  eacr.sl = 1;
1069  eacr.e0 = 0;
1070  eacr.e1 = 1;
1071  if (!etr_mode_is_etr(etr_eacr))
1072  eacr.es = 0;
1073  sync_port = (etr_port1_uptodate &&
1074  etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1075  } else {
1076  /* Both ports not usable. */
1077  eacr.es = eacr.sl = 0;
1078  sync_port = -1;
1079  }
1080 
1081  /*
1082  * If the clock is in sync just update the eacr and return.
1083  * If there is no valid sync port wait for a port update.
1084  */
1085  if ((eacr.es && check_sync_clock()) || sync_port < 0) {
1086  etr_update_eacr(eacr);
1087  etr_set_tolec_timeout(now);
1088  goto out_unlock;
1089  }
1090 
1091  /*
1092  * Prepare control register for clock syncing
1093  * (reset data port bit, set sync check control.
1094  */
1095  eacr.dp = 0;
1096  eacr.es = 1;
1097 
1098  /*
1099  * Update eacr and try to synchronize the clock. If the update
1100  * of eacr caused a stepping port switch (or if we have to
1101  * assume that a stepping port switch has occurred) or the
1102  * clock syncing failed, reset the sync check control bit
1103  * and set up a timer to try again after 0.5 seconds
1104  */
1105  etr_update_eacr(eacr);
1106  if (now < etr_tolec + (1600000 << 12) ||
1107  etr_sync_clock_stop(&aib, sync_port) != 0) {
1108  /* Sync failed. Try again in 1/2 second. */
1109  eacr.es = 0;
1110  etr_update_eacr(eacr);
1111  etr_set_sync_timeout();
1112  } else
1113  etr_set_tolec_timeout(now);
1114 out_unlock:
1115  mutex_unlock(&etr_work_mutex);
1116 }
1117 
1118 /*
1119  * Sysfs interface functions
1120  */
1121 static struct bus_type etr_subsys = {
1122  .name = "etr",
1123  .dev_name = "etr",
1124 };
1125 
1126 static struct device etr_port0_dev = {
1127  .id = 0,
1128  .bus = &etr_subsys,
1129 };
1130 
1131 static struct device etr_port1_dev = {
1132  .id = 1,
1133  .bus = &etr_subsys,
1134 };
1135 
1136 /*
1137  * ETR subsys attributes
1138  */
1139 static ssize_t etr_stepping_port_show(struct device *dev,
1140  struct device_attribute *attr,
1141  char *buf)
1142 {
1143  return sprintf(buf, "%i\n", etr_port0.esw.p);
1144 }
1145 
1146 static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1147 
1148 static ssize_t etr_stepping_mode_show(struct device *dev,
1149  struct device_attribute *attr,
1150  char *buf)
1151 {
1152  char *mode_str;
1153 
1154  if (etr_mode_is_pps(etr_eacr))
1155  mode_str = "pps";
1156  else if (etr_mode_is_etr(etr_eacr))
1157  mode_str = "etr";
1158  else
1159  mode_str = "local";
1160  return sprintf(buf, "%s\n", mode_str);
1161 }
1162 
1163 static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1164 
1165 /*
1166  * ETR port attributes
1167  */
1168 static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
1169 {
1170  if (dev == &etr_port0_dev)
1171  return etr_port0_online ? &etr_port0 : NULL;
1172  else
1173  return etr_port1_online ? &etr_port1 : NULL;
1174 }
1175 
1176 static ssize_t etr_online_show(struct device *dev,
1177  struct device_attribute *attr,
1178  char *buf)
1179 {
1180  unsigned int online;
1181 
1182  online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1183  return sprintf(buf, "%i\n", online);
1184 }
1185 
1186 static ssize_t etr_online_store(struct device *dev,
1187  struct device_attribute *attr,
1188  const char *buf, size_t count)
1189 {
1190  unsigned int value;
1191 
1192  value = simple_strtoul(buf, NULL, 0);
1193  if (value != 0 && value != 1)
1194  return -EINVAL;
1195  if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1196  return -EOPNOTSUPP;
1197  mutex_lock(&clock_sync_mutex);
1198  if (dev == &etr_port0_dev) {
1199  if (etr_port0_online == value)
1200  goto out; /* Nothing to do. */
1201  etr_port0_online = value;
1202  if (etr_port0_online && etr_port1_online)
1203  set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1204  else
1205  clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1206  set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1207  queue_work(time_sync_wq, &etr_work);
1208  } else {
1209  if (etr_port1_online == value)
1210  goto out; /* Nothing to do. */
1211  etr_port1_online = value;
1212  if (etr_port0_online && etr_port1_online)
1213  set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1214  else
1215  clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1216  set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1217  queue_work(time_sync_wq, &etr_work);
1218  }
1219 out:
1220  mutex_unlock(&clock_sync_mutex);
1221  return count;
1222 }
1223 
1224 static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
1225 
1226 static ssize_t etr_stepping_control_show(struct device *dev,
1227  struct device_attribute *attr,
1228  char *buf)
1229 {
1230  return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1231  etr_eacr.e0 : etr_eacr.e1);
1232 }
1233 
1234 static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1235 
1236 static ssize_t etr_mode_code_show(struct device *dev,
1237  struct device_attribute *attr, char *buf)
1238 {
1239  if (!etr_port0_online && !etr_port1_online)
1240  /* Status word is not uptodate if both ports are offline. */
1241  return -ENODATA;
1242  return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1243  etr_port0.esw.psc0 : etr_port0.esw.psc1);
1244 }
1245 
1246 static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1247 
1248 static ssize_t etr_untuned_show(struct device *dev,
1249  struct device_attribute *attr, char *buf)
1250 {
1251  struct etr_aib *aib = etr_aib_from_dev(dev);
1252 
1253  if (!aib || !aib->slsw.v1)
1254  return -ENODATA;
1255  return sprintf(buf, "%i\n", aib->edf1.u);
1256 }
1257 
1258 static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
1259 
1260 static ssize_t etr_network_id_show(struct device *dev,
1261  struct device_attribute *attr, char *buf)
1262 {
1263  struct etr_aib *aib = etr_aib_from_dev(dev);
1264 
1265  if (!aib || !aib->slsw.v1)
1266  return -ENODATA;
1267  return sprintf(buf, "%i\n", aib->edf1.net_id);
1268 }
1269 
1270 static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
1271 
1272 static ssize_t etr_id_show(struct device *dev,
1273  struct device_attribute *attr, char *buf)
1274 {
1275  struct etr_aib *aib = etr_aib_from_dev(dev);
1276 
1277  if (!aib || !aib->slsw.v1)
1278  return -ENODATA;
1279  return sprintf(buf, "%i\n", aib->edf1.etr_id);
1280 }
1281 
1282 static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
1283 
1284 static ssize_t etr_port_number_show(struct device *dev,
1285  struct device_attribute *attr, char *buf)
1286 {
1287  struct etr_aib *aib = etr_aib_from_dev(dev);
1288 
1289  if (!aib || !aib->slsw.v1)
1290  return -ENODATA;
1291  return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1292 }
1293 
1294 static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
1295 
1296 static ssize_t etr_coupled_show(struct device *dev,
1297  struct device_attribute *attr, char *buf)
1298 {
1299  struct etr_aib *aib = etr_aib_from_dev(dev);
1300 
1301  if (!aib || !aib->slsw.v3)
1302  return -ENODATA;
1303  return sprintf(buf, "%i\n", aib->edf3.c);
1304 }
1305 
1306 static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
1307 
1308 static ssize_t etr_local_time_show(struct device *dev,
1309  struct device_attribute *attr, char *buf)
1310 {
1311  struct etr_aib *aib = etr_aib_from_dev(dev);
1312 
1313  if (!aib || !aib->slsw.v3)
1314  return -ENODATA;
1315  return sprintf(buf, "%i\n", aib->edf3.blto);
1316 }
1317 
1318 static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
1319 
1320 static ssize_t etr_utc_offset_show(struct device *dev,
1321  struct device_attribute *attr, char *buf)
1322 {
1323  struct etr_aib *aib = etr_aib_from_dev(dev);
1324 
1325  if (!aib || !aib->slsw.v3)
1326  return -ENODATA;
1327  return sprintf(buf, "%i\n", aib->edf3.buo);
1328 }
1329 
1330 static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1331 
1332 static struct device_attribute *etr_port_attributes[] = {
1333  &dev_attr_online,
1334  &dev_attr_stepping_control,
1335  &dev_attr_state_code,
1336  &dev_attr_untuned,
1337  &dev_attr_network,
1338  &dev_attr_id,
1339  &dev_attr_port,
1340  &dev_attr_coupled,
1341  &dev_attr_local_time,
1342  &dev_attr_utc_offset,
1343  NULL
1344 };
1345 
1346 static int __init etr_register_port(struct device *dev)
1347 {
1348  struct device_attribute **attr;
1349  int rc;
1350 
1351  rc = device_register(dev);
1352  if (rc)
1353  goto out;
1354  for (attr = etr_port_attributes; *attr; attr++) {
1355  rc = device_create_file(dev, *attr);
1356  if (rc)
1357  goto out_unreg;
1358  }
1359  return 0;
1360 out_unreg:
1361  for (; attr >= etr_port_attributes; attr--)
1362  device_remove_file(dev, *attr);
1363  device_unregister(dev);
1364 out:
1365  return rc;
1366 }
1367 
1368 static void __init etr_unregister_port(struct device *dev)
1369 {
1370  struct device_attribute **attr;
1371 
1372  for (attr = etr_port_attributes; *attr; attr++)
1373  device_remove_file(dev, *attr);
1374  device_unregister(dev);
1375 }
1376 
1377 static int __init etr_init_sysfs(void)
1378 {
1379  int rc;
1380 
1381  rc = subsys_system_register(&etr_subsys, NULL);
1382  if (rc)
1383  goto out;
1384  rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1385  if (rc)
1386  goto out_unreg_subsys;
1387  rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1388  if (rc)
1389  goto out_remove_stepping_port;
1390  rc = etr_register_port(&etr_port0_dev);
1391  if (rc)
1392  goto out_remove_stepping_mode;
1393  rc = etr_register_port(&etr_port1_dev);
1394  if (rc)
1395  goto out_remove_port0;
1396  return 0;
1397 
1398 out_remove_port0:
1399  etr_unregister_port(&etr_port0_dev);
1400 out_remove_stepping_mode:
1401  device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1402 out_remove_stepping_port:
1403  device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1404 out_unreg_subsys:
1405  bus_unregister(&etr_subsys);
1406 out:
1407  return rc;
1408 }
1409 
1410 device_initcall(etr_init_sysfs);
1411 
1412 /*
1413  * Server Time Protocol (STP) code.
1414  */
1415 static int stp_online;
1416 static struct stp_sstpi stp_info;
1417 static void *stp_page;
1418 
1419 static void stp_work_fn(struct work_struct *work);
1420 static DEFINE_MUTEX(stp_work_mutex);
1421 static DECLARE_WORK(stp_work, stp_work_fn);
1422 static struct timer_list stp_timer;
1423 
1424 static int __init early_parse_stp(char *p)
1425 {
1426  if (strncmp(p, "off", 3) == 0)
1427  stp_online = 0;
1428  else if (strncmp(p, "on", 2) == 0)
1429  stp_online = 1;
1430  return 0;
1431 }
1432 early_param("stp", early_parse_stp);
1433 
1434 /*
1435  * Reset STP attachment.
1436  */
1437 static void __init stp_reset(void)
1438 {
1439  int rc;
1440 
1441  stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
1442  rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1443  if (rc == 0)
1444  set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1445  else if (stp_online) {
1446  pr_warning("The real or virtual hardware system does "
1447  "not provide an STP interface\n");
1448  free_page((unsigned long) stp_page);
1449  stp_page = NULL;
1450  stp_online = 0;
1451  }
1452 }
1453 
1454 static void stp_timeout(unsigned long dummy)
1455 {
1456  queue_work(time_sync_wq, &stp_work);
1457 }
1458 
1459 static int __init stp_init(void)
1460 {
1461  if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1462  return 0;
1463  setup_timer(&stp_timer, stp_timeout, 0UL);
1464  time_init_wq();
1465  if (!stp_online)
1466  return 0;
1467  queue_work(time_sync_wq, &stp_work);
1468  return 0;
1469 }
1470 
1471 arch_initcall(stp_init);
1472 
1473 /*
1474  * STP timing alert. There are three causes:
1475  * 1) timing status change
1476  * 2) link availability change
1477  * 3) time control parameter change
1478  * In all three cases we are only interested in the clock source state.
1479  * If a STP clock source is now available use it.
1480  */
1481 static void stp_timing_alert(struct stp_irq_parm *intparm)
1482 {
1483  if (intparm->tsc || intparm->lac || intparm->tcpc)
1484  queue_work(time_sync_wq, &stp_work);
1485 }
1486 
1487 /*
1488  * STP sync check machine check. This is called when the timing state
1489  * changes from the synchronized state to the unsynchronized state.
1490  * After a STP sync check the clock is not in sync. The machine check
1491  * is broadcasted to all cpus at the same time.
1492  */
1493 void stp_sync_check(void)
1494 {
1495  disable_sync_clock(NULL);
1496  queue_work(time_sync_wq, &stp_work);
1497 }
1498 
1499 /*
1500  * STP island condition machine check. This is called when an attached
1501  * server attempts to communicate over an STP link and the servers
1502  * have matching CTN ids and have a valid stratum-1 configuration
1503  * but the configurations do not match.
1504  */
1506 {
1507  disable_sync_clock(NULL);
1508  queue_work(time_sync_wq, &stp_work);
1509 }
1510 
1511 
1512 static int stp_sync_clock(void *data)
1513 {
1514  static int first;
1515  unsigned long long old_clock, delta;
1516  struct clock_sync_data *stp_sync;
1517  int rc;
1518 
1519  stp_sync = data;
1520 
1521  if (xchg(&first, 1) == 1) {
1522  /* Slave */
1523  clock_sync_cpu(stp_sync);
1524  return 0;
1525  }
1526 
1527  /* Wait until all other cpus entered the sync function. */
1528  while (atomic_read(&stp_sync->cpus) != 0)
1529  cpu_relax();
1530 
1531  enable_sync_clock();
1532 
1533  rc = 0;
1534  if (stp_info.todoff[0] || stp_info.todoff[1] ||
1535  stp_info.todoff[2] || stp_info.todoff[3] ||
1536  stp_info.tmd != 2) {
1537  old_clock = get_clock();
1538  rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1539  if (rc == 0) {
1540  delta = adjust_time(old_clock, get_clock(), 0);
1541  fixup_clock_comparator(delta);
1542  rc = chsc_sstpi(stp_page, &stp_info,
1543  sizeof(struct stp_sstpi));
1544  if (rc == 0 && stp_info.tmd != 2)
1545  rc = -EAGAIN;
1546  }
1547  }
1548  if (rc) {
1549  disable_sync_clock(NULL);
1550  stp_sync->in_sync = -EAGAIN;
1551  } else
1552  stp_sync->in_sync = 1;
1553  xchg(&first, 0);
1554  return 0;
1555 }
1556 
1557 /*
1558  * STP work. Check for the STP state and take over the clock
1559  * synchronization if the STP clock source is usable.
1560  */
1561 static void stp_work_fn(struct work_struct *work)
1562 {
1563  struct clock_sync_data stp_sync;
1564  int rc;
1565 
1566  /* prevent multiple execution. */
1567  mutex_lock(&stp_work_mutex);
1568 
1569  if (!stp_online) {
1570  chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1571  del_timer_sync(&stp_timer);
1572  goto out_unlock;
1573  }
1574 
1575  rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1576  if (rc)
1577  goto out_unlock;
1578 
1579  rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1580  if (rc || stp_info.c == 0)
1581  goto out_unlock;
1582 
1583  /* Skip synchronization if the clock is already in sync. */
1584  if (check_sync_clock())
1585  goto out_unlock;
1586 
1587  memset(&stp_sync, 0, sizeof(stp_sync));
1588  get_online_cpus();
1589  atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1590  stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
1591  put_online_cpus();
1592 
1593  if (!check_sync_clock())
1594  /*
1595  * There is a usable clock but the synchonization failed.
1596  * Retry after a second.
1597  */
1598  mod_timer(&stp_timer, jiffies + HZ);
1599 
1600 out_unlock:
1601  mutex_unlock(&stp_work_mutex);
1602 }
1603 
1604 /*
1605  * STP subsys sysfs interface functions
1606  */
1607 static struct bus_type stp_subsys = {
1608  .name = "stp",
1609  .dev_name = "stp",
1610 };
1611 
1612 static ssize_t stp_ctn_id_show(struct device *dev,
1613  struct device_attribute *attr,
1614  char *buf)
1615 {
1616  if (!stp_online)
1617  return -ENODATA;
1618  return sprintf(buf, "%016llx\n",
1619  *(unsigned long long *) stp_info.ctnid);
1620 }
1621 
1622 static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1623 
1624 static ssize_t stp_ctn_type_show(struct device *dev,
1625  struct device_attribute *attr,
1626  char *buf)
1627 {
1628  if (!stp_online)
1629  return -ENODATA;
1630  return sprintf(buf, "%i\n", stp_info.ctn);
1631 }
1632 
1633 static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1634 
1635 static ssize_t stp_dst_offset_show(struct device *dev,
1636  struct device_attribute *attr,
1637  char *buf)
1638 {
1639  if (!stp_online || !(stp_info.vbits & 0x2000))
1640  return -ENODATA;
1641  return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1642 }
1643 
1644 static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1645 
1646 static ssize_t stp_leap_seconds_show(struct device *dev,
1647  struct device_attribute *attr,
1648  char *buf)
1649 {
1650  if (!stp_online || !(stp_info.vbits & 0x8000))
1651  return -ENODATA;
1652  return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1653 }
1654 
1655 static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1656 
1657 static ssize_t stp_stratum_show(struct device *dev,
1658  struct device_attribute *attr,
1659  char *buf)
1660 {
1661  if (!stp_online)
1662  return -ENODATA;
1663  return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1664 }
1665 
1666 static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
1667 
1668 static ssize_t stp_time_offset_show(struct device *dev,
1669  struct device_attribute *attr,
1670  char *buf)
1671 {
1672  if (!stp_online || !(stp_info.vbits & 0x0800))
1673  return -ENODATA;
1674  return sprintf(buf, "%i\n", (int) stp_info.tto);
1675 }
1676 
1677 static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1678 
1679 static ssize_t stp_time_zone_offset_show(struct device *dev,
1680  struct device_attribute *attr,
1681  char *buf)
1682 {
1683  if (!stp_online || !(stp_info.vbits & 0x4000))
1684  return -ENODATA;
1685  return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1686 }
1687 
1688 static DEVICE_ATTR(time_zone_offset, 0400,
1689  stp_time_zone_offset_show, NULL);
1690 
1691 static ssize_t stp_timing_mode_show(struct device *dev,
1692  struct device_attribute *attr,
1693  char *buf)
1694 {
1695  if (!stp_online)
1696  return -ENODATA;
1697  return sprintf(buf, "%i\n", stp_info.tmd);
1698 }
1699 
1700 static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1701 
1702 static ssize_t stp_timing_state_show(struct device *dev,
1703  struct device_attribute *attr,
1704  char *buf)
1705 {
1706  if (!stp_online)
1707  return -ENODATA;
1708  return sprintf(buf, "%i\n", stp_info.tst);
1709 }
1710 
1711 static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1712 
1713 static ssize_t stp_online_show(struct device *dev,
1714  struct device_attribute *attr,
1715  char *buf)
1716 {
1717  return sprintf(buf, "%i\n", stp_online);
1718 }
1719 
1720 static ssize_t stp_online_store(struct device *dev,
1721  struct device_attribute *attr,
1722  const char *buf, size_t count)
1723 {
1724  unsigned int value;
1725 
1726  value = simple_strtoul(buf, NULL, 0);
1727  if (value != 0 && value != 1)
1728  return -EINVAL;
1729  if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1730  return -EOPNOTSUPP;
1731  mutex_lock(&clock_sync_mutex);
1732  stp_online = value;
1733  if (stp_online)
1734  set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1735  else
1736  clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1737  queue_work(time_sync_wq, &stp_work);
1738  mutex_unlock(&clock_sync_mutex);
1739  return count;
1740 }
1741 
1742 /*
1743  * Can't use DEVICE_ATTR because the attribute should be named
1744  * stp/online but dev_attr_online already exists in this file ..
1745  */
1746 static struct device_attribute dev_attr_stp_online = {
1747  .attr = { .name = "online", .mode = 0600 },
1748  .show = stp_online_show,
1749  .store = stp_online_store,
1750 };
1751 
1752 static struct device_attribute *stp_attributes[] = {
1753  &dev_attr_ctn_id,
1754  &dev_attr_ctn_type,
1755  &dev_attr_dst_offset,
1756  &dev_attr_leap_seconds,
1757  &dev_attr_stp_online,
1758  &dev_attr_stratum,
1759  &dev_attr_time_offset,
1760  &dev_attr_time_zone_offset,
1761  &dev_attr_timing_mode,
1762  &dev_attr_timing_state,
1763  NULL
1764 };
1765 
1766 static int __init stp_init_sysfs(void)
1767 {
1768  struct device_attribute **attr;
1769  int rc;
1770 
1771  rc = subsys_system_register(&stp_subsys, NULL);
1772  if (rc)
1773  goto out;
1774  for (attr = stp_attributes; *attr; attr++) {
1775  rc = device_create_file(stp_subsys.dev_root, *attr);
1776  if (rc)
1777  goto out_unreg;
1778  }
1779  return 0;
1780 out_unreg:
1781  for (; attr >= stp_attributes; attr--)
1782  device_remove_file(stp_subsys.dev_root, *attr);
1783  bus_unregister(&stp_subsys);
1784 out:
1785  return rc;
1786 }
1787 
1788 device_initcall(stp_init_sysfs);