#include "PPC.h"
#include "MCTargetDesc/PPCPredicates.h"
#include "PPCMachineFunctionInfo.h"
#include "PPCTargetMachine.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalAlias.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h"
#include "PPCGenDAGISel.inc"

Include dependency graph for PPCISelDAGToDAG.cpp:

Namespaces
namespace	llvm
	List of target independent CodeGen pass IDs.
Defines
#define	DEBUG_TYPE "ppc-codegen"
Functions
void	llvm::initializePPCDAGToDAGISelPass (PassRegistry &)
static bool	isIntS16Immediate (SDNode *N, short &Imm)
static bool	isIntS16Immediate (SDValue Op, short &Imm)
static bool	isInt32Immediate (SDNode *N, unsigned &Imm)
static bool	isInt64Immediate (SDNode *N, uint64_t &Imm)
static bool	isInt32Immediate (SDValue N, unsigned &Imm)
static bool	isOpcWithIntImmediate (SDNode *N, unsigned Opc, unsigned &Imm)
static PPC::Predicate	getPredicateForSetCC (ISD::CondCode CC)
static unsigned	getCRIdxForSetCC (ISD::CondCode CC, bool &Invert)
static unsigned int	getVCmpInst (MVT VecVT, ISD::CondCode CC, bool HasVSX, bool &Swap, bool &Negate)
static void	initializePassOnce (PassRegistry &Registry)
Variables
cl::opt< bool >	ANDIGlueBug ("expose-ppc-andi-glue-bug", cl::desc("expose the ANDI glue bug on PPC"), cl::Hidden)

Define Documentation

#define DEBUG_TYPE "ppc-codegen"

Definition at line 38 of file PPCISelDAGToDAG.cpp.

Function Documentation

static unsigned getCRIdxForSetCC	(	ISD::CondCode	CC,
		bool &	Invert
	)		`[static]`

getCRIdxForSetCC - Return the index of the condition register field associated with the SetCC condition, and whether or not the field is treated as inverted. That is, lt = 0; ge = 0 inverted.

Definition at line 634 of file PPCISelDAGToDAG.cpp.

References llvm_unreachable, llvm::ISD::SETEQ, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, and llvm::ISD::SETUO.

static unsigned int getVCmpInst	(	MVT	VecVT,
		ISD::CondCode	CC,
		bool	HasVSX,
		bool &	Swap,
		bool &	Negate
	)		`[static]`

static void initializePassOnce ( PassRegistry & Registry ) [static]

Definition at line 2202 of file PPCISelDAGToDAG.cpp.

References llvm::SelectionDAGISel::ID, Name, and llvm::PassRegistry::registerPass().

Referenced by llvm::initializePPCDAGToDAGISelPass().

static bool isInt32Immediate	(	SDNode *	N,
		unsigned &	Imm
	)		`[static]`

isInt32Immediate - This method tests to see if the node is a 32-bit constant operand. If so Imm will receive the 32-bit value.

Definition at line 326 of file PPCISelDAGToDAG.cpp.

References llvm::ISD::Constant, llvm::SDNode::getOpcode(), llvm::SDNode::getValueType(), and llvm::MVT::i32.

static bool isInt32Immediate	(	SDValue	N,
		unsigned &	Imm
	)		`[static]`

Definition at line 346 of file PPCISelDAGToDAG.cpp.

References llvm::SDValue::getNode(), and isInt32Immediate().

static bool isInt64Immediate	(	SDNode *	N,
		uint64_t &	Imm
	)		`[static]`

isInt64Immediate - This method tests to see if the node is a 64-bit constant operand. If so Imm will receive the 64-bit value.

Definition at line 336 of file PPCISelDAGToDAG.cpp.

References llvm::ISD::Constant, llvm::SDNode::getOpcode(), llvm::SDNode::getValueType(), and llvm::MVT::i64.

static bool isIntS16Immediate	(	SDNode *	N,
		short &	Imm
	)		`[static]`

isIntS16Immediate - This method tests to see if the node is either a 32-bit or 64-bit immediate, and if the value can be accurately represented as a sign extension from a 16-bit value. If so, this returns true and the immediate.

Definition at line 308 of file PPCISelDAGToDAG.cpp.

References llvm::ISD::Constant, llvm::SDNode::getOpcode(), llvm::SDNode::getValueType(), and llvm::MVT::i32.

Referenced by isIntS16Immediate(), llvm::PPCTargetLowering::SelectAddressRegImm(), and llvm::PPCTargetLowering::SelectAddressRegReg().