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matroxfb_base.c
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1 /*
2  *
3  * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4  *
5  * (c) 1998-2002 Petr Vandrovec <[email protected]>
6  *
7  * Portions Copyright (c) 2001 Matrox Graphics Inc.
8  *
9  * Version: 1.65 2002/08/14
10  *
11  * MTRR stuff: 1998 Tom Rini <[email protected]>
12  *
13  * Contributors: "menion?" <[email protected]>
14  * Betatesting, fixes, ideas
15  *
16  * "Kurt Garloff" <[email protected]>
17  * Betatesting, fixes, ideas, videomodes, videomodes timmings
18  *
19  * "Tom Rini" <[email protected]>
20  * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21  *
22  * "Bibek Sahu" <[email protected]>
23  * Access device through readb|w|l and write b|w|l
24  * Extensive debugging stuff
25  *
26  * "Daniel Haun" <[email protected]>
27  * Testing, hardware cursor fixes
28  *
29  * "Scott Wood" <[email protected]>
30  * Fixes
31  *
32  * "Gerd Knorr" <[email protected]>
33  * Betatesting
34  *
35  * "Kelly French" <[email protected]>
36  * "Fernando Herrera" <[email protected]>
37  * Betatesting, bug reporting
38  *
39  * "Pablo Bianucci" <[email protected]>
40  * Fixes, ideas, betatesting
41  *
42  * "Inaky Perez Gonzalez" <[email protected]>
43  * Fixes, enhandcements, ideas, betatesting
44  *
45  * "Ryuichi Oikawa" <[email protected]>
46  * PPC betatesting, PPC support, backward compatibility
47  *
48  * "Paul Womar" <[email protected]>
49  * "Owen Waller" <[email protected]>
50  * PPC betatesting
51  *
52  * "Thomas Pornin" <[email protected]>
53  * Alpha betatesting
54  *
55  * "Pieter van Leuven" <[email protected]>
56  * "Ulf Jaenicke-Roessler" <[email protected]>
57  * G100 testing
58  *
59  * "H. Peter Arvin" <[email protected]>
60  * Ideas
61  *
62  * "Cort Dougan" <[email protected]>
63  * CHRP fixes and PReP cleanup
64  *
65  * "Mark Vojkovich" <[email protected]>
66  * G400 support
67  *
68  * "Samuel Hocevar" <[email protected]>
69  * Fixes
70  *
71  * "Anton Altaparmakov" <[email protected]>
72  * G400 MAX/non-MAX distinction
73  *
74  * "Ken Aaker" <[email protected]>
75  * memtype extension (needed for GXT130P RS/6000 adapter)
76  *
77  * "Uns Lider" <[email protected]>
78  * G100 PLNWT fixes
79  *
80  * "Denis Zaitsev" <[email protected]>
81  * Fixes
82  *
83  * "Mike Pieper" <[email protected]>
84  * TVOut enhandcements, V4L2 control interface.
85  *
86  * "Diego Biurrun" <[email protected]>
87  * DFP testing
88  *
89  * (following author is not in any relation with this code, but his code
90  * is included in this driver)
91  *
92  * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93  * (c) 1998 Gerd Knorr <[email protected]>
94  *
95  * (following author is not in any relation with this code, but his ideas
96  * were used when writing this driver)
97  *
98  * FreeVBE/AF (Matrox), "Shawn Hargreaves" <[email protected]>
99  *
100  */
101 
102 #include <linux/version.h>
103 
104 #include "matroxfb_base.h"
105 #include "matroxfb_misc.h"
106 #include "matroxfb_accel.h"
107 #include "matroxfb_DAC1064.h"
108 #include "matroxfb_Ti3026.h"
109 #include "matroxfb_maven.h"
110 #include "matroxfb_crtc2.h"
111 #include "matroxfb_g450.h"
112 #include <linux/matroxfb.h>
113 #include <linux/interrupt.h>
114 #include <linux/slab.h>
115 #include <linux/uaccess.h>
116 
117 #ifdef CONFIG_PPC_PMAC
118 #include <asm/machdep.h>
119 unsigned char nvram_read_byte(int);
120 static int default_vmode = VMODE_NVRAM;
121 static int default_cmode = CMODE_NVRAM;
122 #endif
123 
124 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
125 
126 /* --------------------------------------------------------------------- */
127 
128 /*
129  * card parameters
130  */
131 
132 /* --------------------------------------------------------------------- */
133 
134 static struct fb_var_screeninfo vesafb_defined = {
135  640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
136  0,0, /* virtual -> visible no offset */
137  8, /* depth -> load bits_per_pixel */
138  0, /* greyscale ? */
139  {0,0,0}, /* R */
140  {0,0,0}, /* G */
141  {0,0,0}, /* B */
142  {0,0,0}, /* transparency */
143  0, /* standard pixel format */
144  FB_ACTIVATE_NOW,
145  -1,-1,
146  FB_ACCELF_TEXT, /* accel flags */
147  39721L,48L,16L,33L,10L,
148  96L,2L,~0, /* No sync info */
149  FB_VMODE_NONINTERLACED,
150 };
151 
152 
153 
154 /* --------------------------------------------------------------------- */
155 static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
156 {
157  struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
158 
159  /* Make sure that displays are compatible */
160  if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel)
161  && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual)
162  && (info->fbcon.var.green.length == minfo->fbcon.var.green.length)
163  ) {
164  switch (minfo->fbcon.var.bits_per_pixel) {
165  case 16:
166  case 32:
167  pos = pos * 8;
168  if (info->interlaced) {
169  mga_outl(0x3C2C, pos);
170  mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);
171  } else {
172  mga_outl(0x3C28, pos);
173  }
174  break;
175  }
176  }
177 }
178 
179 static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
180 {
181  if (minfo->crtc1.panpos >= 0) {
182  unsigned long flags;
183  int panpos;
184 
185  matroxfb_DAC_lock_irqsave(flags);
186  panpos = minfo->crtc1.panpos;
187  if (panpos >= 0) {
188  unsigned int extvga_reg;
189 
190  minfo->crtc1.panpos = -1; /* No update pending anymore */
191  extvga_reg = mga_inb(M_EXTVGA_INDEX);
192  mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
193  if (extvga_reg != 0x00) {
194  mga_outb(M_EXTVGA_INDEX, extvga_reg);
195  }
196  }
197  matroxfb_DAC_unlock_irqrestore(flags);
198  }
199 }
200 
201 static irqreturn_t matrox_irq(int irq, void *dev_id)
202 {
203  u_int32_t status;
204  int handled = 0;
205  struct matrox_fb_info *minfo = dev_id;
206 
207  status = mga_inl(M_STATUS);
208 
209  if (status & 0x20) {
210  mga_outl(M_ICLEAR, 0x20);
211  minfo->crtc1.vsync.cnt++;
212  matroxfb_crtc1_panpos(minfo);
213  wake_up_interruptible(&minfo->crtc1.vsync.wait);
214  handled = 1;
215  }
216  if (status & 0x200) {
217  mga_outl(M_ICLEAR, 0x200);
218  minfo->crtc2.vsync.cnt++;
219  wake_up_interruptible(&minfo->crtc2.vsync.wait);
220  handled = 1;
221  }
222  return IRQ_RETVAL(handled);
223 }
224 
225 int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
226 {
227  u_int32_t bm;
228 
229  if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
230  bm = 0x220;
231  else
232  bm = 0x020;
233 
234  if (!test_and_set_bit(0, &minfo->irq_flags)) {
235  if (request_irq(minfo->pcidev->irq, matrox_irq,
236  IRQF_SHARED, "matroxfb", minfo)) {
237  clear_bit(0, &minfo->irq_flags);
238  return -EINVAL;
239  }
240  /* Clear any pending field interrupts */
241  mga_outl(M_ICLEAR, bm);
242  mga_outl(M_IEN, mga_inl(M_IEN) | bm);
243  } else if (reenable) {
244  u_int32_t ien;
245 
246  ien = mga_inl(M_IEN);
247  if ((ien & bm) != bm) {
248  printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
249  mga_outl(M_IEN, ien | bm);
250  }
251  }
252  return 0;
253 }
254 
255 static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
256 {
257  if (test_and_clear_bit(0, &minfo->irq_flags)) {
258  /* Flush pending pan-at-vbl request... */
259  matroxfb_crtc1_panpos(minfo);
260  if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
261  mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
262  else
263  mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
264  free_irq(minfo->pcidev->irq, minfo);
265  }
266 }
267 
268 int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
269 {
270  struct matrox_vsync *vs;
271  unsigned int cnt;
272  int ret;
273 
274  switch (crtc) {
275  case 0:
276  vs = &minfo->crtc1.vsync;
277  break;
278  case 1:
279  if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) {
280  return -ENODEV;
281  }
282  vs = &minfo->crtc2.vsync;
283  break;
284  default:
285  return -ENODEV;
286  }
287  ret = matroxfb_enable_irq(minfo, 0);
288  if (ret) {
289  return ret;
290  }
291 
292  cnt = vs->cnt;
293  ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
294  if (ret < 0) {
295  return ret;
296  }
297  if (ret == 0) {
298  matroxfb_enable_irq(minfo, 1);
299  return -ETIMEDOUT;
300  }
301  return 0;
302 }
303 
304 /* --------------------------------------------------------------------- */
305 
306 static void matrox_pan_var(struct matrox_fb_info *minfo,
307  struct fb_var_screeninfo *var)
308 {
309  unsigned int pos;
310  unsigned short p0, p1, p2;
311  unsigned int p3;
312  int vbl;
313  unsigned long flags;
314 
315  CRITFLAGS
316 
317  DBG(__func__)
318 
319  if (minfo->dead)
320  return;
321 
322  minfo->fbcon.var.xoffset = var->xoffset;
323  minfo->fbcon.var.yoffset = var->yoffset;
324  pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32;
325  pos += minfo->curr.ydstorg.chunks;
326  p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;
327  p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;
328  p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
329  p3 = minfo->hw.CRTCEXT[8] = pos >> 21;
330 
331  /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
332  vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
333 
334  CRITBEGIN
335 
336  matroxfb_DAC_lock_irqsave(flags);
337  mga_setr(M_CRTC_INDEX, 0x0D, p0);
338  mga_setr(M_CRTC_INDEX, 0x0C, p1);
339  if (minfo->devflags.support32MB)
340  mga_setr(M_EXTVGA_INDEX, 0x08, p3);
341  if (vbl) {
342  minfo->crtc1.panpos = p2;
343  } else {
344  /* Abort any pending change */
345  minfo->crtc1.panpos = -1;
346  mga_setr(M_EXTVGA_INDEX, 0x00, p2);
347  }
348  matroxfb_DAC_unlock_irqrestore(flags);
349 
350  update_crtc2(minfo, pos);
351 
352  CRITEND
353 }
354 
355 static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
356 {
357  /* Currently we are holding big kernel lock on all dead & usecount updates.
358  * Destroy everything after all users release it. Especially do not unregister
359  * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
360  * for device unplugged when in use.
361  * In future we should point mmio.vbase & video.vbase somewhere where we can
362  * write data without causing too much damage...
363  */
364 
365  minfo->dead = 1;
366  if (minfo->usecount) {
367  /* destroy it later */
368  return;
369  }
370  matroxfb_unregister_device(minfo);
371  unregister_framebuffer(&minfo->fbcon);
372  matroxfb_g450_shutdown(minfo);
373 #ifdef CONFIG_MTRR
374  if (minfo->mtrr.vram_valid)
375  mtrr_del(minfo->mtrr.vram, minfo->video.base, minfo->video.len);
376 #endif
377  mga_iounmap(minfo->mmio.vbase);
378  mga_iounmap(minfo->video.vbase);
379  release_mem_region(minfo->video.base, minfo->video.len_maximum);
380  release_mem_region(minfo->mmio.base, 16384);
381  kfree(minfo);
382 }
383 
384  /*
385  * Open/Release the frame buffer device
386  */
387 
388 static int matroxfb_open(struct fb_info *info, int user)
389 {
390  struct matrox_fb_info *minfo = info2minfo(info);
391 
392  DBG_LOOP(__func__)
393 
394  if (minfo->dead) {
395  return -ENXIO;
396  }
397  minfo->usecount++;
398  if (user) {
399  minfo->userusecount++;
400  }
401  return(0);
402 }
403 
404 static int matroxfb_release(struct fb_info *info, int user)
405 {
406  struct matrox_fb_info *minfo = info2minfo(info);
407 
408  DBG_LOOP(__func__)
409 
410  if (user) {
411  if (0 == --minfo->userusecount) {
412  matroxfb_disable_irq(minfo);
413  }
414  }
415  if (!(--minfo->usecount) && minfo->dead) {
416  matroxfb_remove(minfo, 0);
417  }
418  return(0);
419 }
420 
421 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
422  struct fb_info* info) {
423  struct matrox_fb_info *minfo = info2minfo(info);
424 
425  DBG(__func__)
426 
427  matrox_pan_var(minfo, var);
428  return 0;
429 }
430 
431 static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
432  int bpp)
433 {
434  int bppshft2;
435 
436  DBG(__func__)
437 
438  bppshft2 = bpp;
439  if (!bppshft2) {
440  return 8;
441  }
442  if (isInterleave(minfo))
443  bppshft2 >>= 1;
444  if (minfo->devflags.video64bits)
445  bppshft2 >>= 1;
446  return bppshft2;
447 }
448 
449 static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
450  int xres, int bpp)
451 {
452  int over;
453  int rounding;
454 
455  DBG(__func__)
456 
457  switch (bpp) {
458  case 0: return xres;
459  case 4: rounding = 128;
460  break;
461  case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
462  break;
463  case 16: rounding = 32;
464  break;
465  case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
466  break;
467  default: rounding = 16;
468  /* on G400, 16 really does not work */
469  if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
470  rounding = 32;
471  break;
472  }
473  if (isInterleave(minfo)) {
474  rounding *= 2;
475  }
476  over = xres % rounding;
477  if (over)
478  xres += rounding-over;
479  return xres;
480 }
481 
482 static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
483  int bpp)
484 {
485  const int* width;
486  int xres_new;
487 
488  DBG(__func__)
489 
490  if (!bpp) return xres;
491 
492  width = minfo->capable.vxres;
493 
494  if (minfo->devflags.precise_width) {
495  while (*width) {
496  if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
497  break;
498  }
499  width++;
500  }
501  xres_new = *width;
502  } else {
503  xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
504  }
505  return xres_new;
506 }
507 
508 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
509 
510  DBG(__func__)
511 
512  switch (var->bits_per_pixel) {
513  case 4:
514  return 16; /* pseudocolor... 16 entries HW palette */
515  case 8:
516  return 256; /* pseudocolor... 256 entries HW palette */
517  case 16:
518  return 16; /* directcolor... 16 entries SW palette */
519  /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
520  case 24:
521  return 16; /* directcolor... 16 entries SW palette */
522  /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
523  case 32:
524  return 16; /* directcolor... 16 entries SW palette */
525  /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
526  }
527  return 16; /* return something reasonable... or panic()? */
528 }
529 
530 static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
531  struct fb_var_screeninfo *var, int *visual,
532  int *video_cmap_len, unsigned int* ydstorg)
533 {
534  struct RGBT {
535  unsigned char bpp;
536  struct {
537  unsigned char offset,
538  length;
539  } red,
540  green,
541  blue,
542  transp;
543  signed char visual;
544  };
545  static const struct RGBT table[]= {
546  { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
547  {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
548  {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
549  {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
550  {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
551  };
552  struct RGBT const *rgbt;
553  unsigned int bpp = var->bits_per_pixel;
554  unsigned int vramlen;
555  unsigned int memlen;
556 
557  DBG(__func__)
558 
559  switch (bpp) {
560  case 4: if (!minfo->capable.cfb4) return -EINVAL;
561  break;
562  case 8: break;
563  case 16: break;
564  case 24: break;
565  case 32: break;
566  default: return -EINVAL;
567  }
568  *ydstorg = 0;
569  vramlen = minfo->video.len_usable;
570  if (var->yres_virtual < var->yres)
571  var->yres_virtual = var->yres;
572  if (var->xres_virtual < var->xres)
573  var->xres_virtual = var->xres;
574 
575  var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
576  memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
577  if (memlen > vramlen) {
578  var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
579  memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
580  }
581  /* There is hardware bug that no line can cross 4MB boundary */
582  /* give up for CFB24, it is impossible to easy workaround it */
583  /* for other try to do something */
584  if (!minfo->capable.cross4MB && (memlen > 0x400000)) {
585  if (bpp == 24) {
586  /* sorry */
587  } else {
588  unsigned int linelen;
589  unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
590  unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
591  unsigned int max_yres;
592 
593  while (m1) {
594  int t;
595 
596  while (m2 >= m1) m2 -= m1;
597  t = m1;
598  m1 = m2;
599  m2 = t;
600  }
601  m2 = linelen * PAGE_SIZE / m2;
602  *ydstorg = m2 = 0x400000 % m2;
603  max_yres = (vramlen - m2) / linelen;
604  if (var->yres_virtual > max_yres)
605  var->yres_virtual = max_yres;
606  }
607  }
608  /* YDSTLEN contains only signed 16bit value */
609  if (var->yres_virtual > 32767)
610  var->yres_virtual = 32767;
611  /* we must round yres/xres down, we already rounded y/xres_virtual up
612  if it was possible. We should return -EINVAL, but I disagree */
613  if (var->yres_virtual < var->yres)
614  var->yres = var->yres_virtual;
615  if (var->xres_virtual < var->xres)
616  var->xres = var->xres_virtual;
617  if (var->xoffset + var->xres > var->xres_virtual)
618  var->xoffset = var->xres_virtual - var->xres;
619  if (var->yoffset + var->yres > var->yres_virtual)
620  var->yoffset = var->yres_virtual - var->yres;
621 
622  if (bpp == 16 && var->green.length == 5) {
623  bpp--; /* an artificial value - 15 */
624  }
625 
626  for (rgbt = table; rgbt->bpp < bpp; rgbt++);
627 #define SETCLR(clr)\
628  var->clr.offset = rgbt->clr.offset;\
629  var->clr.length = rgbt->clr.length
630  SETCLR(red);
631  SETCLR(green);
632  SETCLR(blue);
633  SETCLR(transp);
634 #undef SETCLR
635  *visual = rgbt->visual;
636 
637  if (bpp > 8)
638  dprintk("matroxfb: truecolor: "
639  "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
640  var->transp.length, var->red.length, var->green.length, var->blue.length,
641  var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
642 
643  *video_cmap_len = matroxfb_get_cmap_len(var);
644  dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
645  var->xres_virtual, var->yres_virtual);
646  return 0;
647 }
648 
649 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
650  unsigned blue, unsigned transp,
651  struct fb_info *fb_info)
652 {
653  struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
654 
655  DBG(__func__)
656 
657  /*
658  * Set a single color register. The values supplied are
659  * already rounded down to the hardware's capabilities
660  * (according to the entries in the `var' structure). Return
661  * != 0 for invalid regno.
662  */
663 
664  if (regno >= minfo->curr.cmap_len)
665  return 1;
666 
667  if (minfo->fbcon.var.grayscale) {
668  /* gray = 0.30*R + 0.59*G + 0.11*B */
669  red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
670  }
671 
672  red = CNVT_TOHW(red, minfo->fbcon.var.red.length);
673  green = CNVT_TOHW(green, minfo->fbcon.var.green.length);
674  blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length);
675  transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length);
676 
677  switch (minfo->fbcon.var.bits_per_pixel) {
678  case 4:
679  case 8:
680  mga_outb(M_DAC_REG, regno);
681  mga_outb(M_DAC_VAL, red);
682  mga_outb(M_DAC_VAL, green);
683  mga_outb(M_DAC_VAL, blue);
684  break;
685  case 16:
686  if (regno >= 16)
687  break;
688  {
689  u_int16_t col =
690  (red << minfo->fbcon.var.red.offset) |
691  (green << minfo->fbcon.var.green.offset) |
692  (blue << minfo->fbcon.var.blue.offset) |
693  (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */
694  minfo->cmap[regno] = col | (col << 16);
695  }
696  break;
697  case 24:
698  case 32:
699  if (regno >= 16)
700  break;
701  minfo->cmap[regno] =
702  (red << minfo->fbcon.var.red.offset) |
703  (green << minfo->fbcon.var.green.offset) |
704  (blue << minfo->fbcon.var.blue.offset) |
705  (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */
706  break;
707  }
708  return 0;
709 }
710 
711 static void matroxfb_init_fix(struct matrox_fb_info *minfo)
712 {
713  struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
714  DBG(__func__)
715 
716  strcpy(fix->id,"MATROX");
717 
718  fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
719  fix->ypanstep = 1;
720  fix->ywrapstep = 0;
721  fix->mmio_start = minfo->mmio.base;
722  fix->mmio_len = minfo->mmio.len;
723  fix->accel = minfo->devflags.accelerator;
724 }
725 
726 static void matroxfb_update_fix(struct matrox_fb_info *minfo)
727 {
728  struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
729  DBG(__func__)
730 
731  mutex_lock(&minfo->fbcon.mm_lock);
732  fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes;
733  fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes;
734  mutex_unlock(&minfo->fbcon.mm_lock);
735 }
736 
737 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
738 {
739  int err;
740  int visual;
741  int cmap_len;
742  unsigned int ydstorg;
743  struct matrox_fb_info *minfo = info2minfo(info);
744 
745  if (minfo->dead) {
746  return -ENXIO;
747  }
748  if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
749  return err;
750  return 0;
751 }
752 
753 static int matroxfb_set_par(struct fb_info *info)
754 {
755  int err;
756  int visual;
757  int cmap_len;
758  unsigned int ydstorg;
759  struct fb_var_screeninfo *var;
760  struct matrox_fb_info *minfo = info2minfo(info);
761 
762  DBG(__func__)
763 
764  if (minfo->dead) {
765  return -ENXIO;
766  }
767 
768  var = &info->var;
769  if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
770  return err;
771  minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
772  matroxfb_update_fix(minfo);
773  minfo->fbcon.fix.visual = visual;
774  minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
775  minfo->fbcon.fix.type_aux = 0;
776  minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
777  {
778  unsigned int pos;
779 
780  minfo->curr.cmap_len = cmap_len;
781  ydstorg += minfo->devflags.ydstorg;
782  minfo->curr.ydstorg.bytes = ydstorg;
783  minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2);
784  if (var->bits_per_pixel == 4)
785  minfo->curr.ydstorg.pixels = ydstorg;
786  else
787  minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
788  minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
789  { struct my_timming mt;
790  struct matrox_hw_state* hw;
791  int out;
792 
793  matroxfb_var2my(var, &mt);
794  mt.crtc = MATROXFB_SRC_CRTC1;
795  /* CRTC1 delays */
796  switch (var->bits_per_pixel) {
797  case 0: mt.delay = 31 + 0; break;
798  case 16: mt.delay = 21 + 8; break;
799  case 24: mt.delay = 17 + 8; break;
800  case 32: mt.delay = 16 + 8; break;
801  default: mt.delay = 31 + 8; break;
802  }
803 
804  hw = &minfo->hw;
805 
806  down_read(&minfo->altout.lock);
807  for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
808  if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
809  minfo->outputs[out].output->compute) {
810  minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
811  }
812  }
813  up_read(&minfo->altout.lock);
814  minfo->crtc1.pixclock = mt.pixclock;
815  minfo->crtc1.mnp = mt.mnp;
816  minfo->hw_switch->init(minfo, &mt);
817  pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
818  pos += minfo->curr.ydstorg.chunks;
819 
820  hw->CRTC[0x0D] = pos & 0xFF;
821  hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
822  hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
823  hw->CRTCEXT[8] = pos >> 21;
824  minfo->hw_switch->restore(minfo);
825  update_crtc2(minfo, pos);
826  down_read(&minfo->altout.lock);
827  for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
828  if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
829  minfo->outputs[out].output->program) {
830  minfo->outputs[out].output->program(minfo->outputs[out].data);
831  }
832  }
833  for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
834  if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
835  minfo->outputs[out].output->start) {
836  minfo->outputs[out].output->start(minfo->outputs[out].data);
837  }
838  }
839  up_read(&minfo->altout.lock);
840  matrox_cfbX_init(minfo);
841  }
842  }
843  minfo->initialized = 1;
844  return 0;
845 }
846 
847 static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
848  struct fb_vblank *vblank)
849 {
850  unsigned int sts1;
851 
852  matroxfb_enable_irq(minfo, 0);
853  memset(vblank, 0, sizeof(*vblank));
854  vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
855  FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
856  sts1 = mga_inb(M_INSTS1);
857  vblank->vcount = mga_inl(M_VCOUNT);
858  /* BTW, on my PIII/450 with G400, reading M_INSTS1
859  byte makes this call about 12% slower (1.70 vs. 2.05 us
860  per ioctl()) */
861  if (sts1 & 1)
862  vblank->flags |= FB_VBLANK_HBLANKING;
863  if (sts1 & 8)
864  vblank->flags |= FB_VBLANK_VSYNCING;
865  if (vblank->vcount >= minfo->fbcon.var.yres)
866  vblank->flags |= FB_VBLANK_VBLANKING;
867  if (test_bit(0, &minfo->irq_flags)) {
868  vblank->flags |= FB_VBLANK_HAVE_COUNT;
869  /* Only one writer, aligned int value...
870  it should work without lock and without atomic_t */
871  vblank->count = minfo->crtc1.vsync.cnt;
872  }
873  return 0;
874 }
875 
876 static struct matrox_altout panellink_output = {
877  .name = "Panellink output",
878 };
879 
880 static int matroxfb_ioctl(struct fb_info *info,
881  unsigned int cmd, unsigned long arg)
882 {
883  void __user *argp = (void __user *)arg;
884  struct matrox_fb_info *minfo = info2minfo(info);
885 
886  DBG(__func__)
887 
888  if (minfo->dead) {
889  return -ENXIO;
890  }
891 
892  switch (cmd) {
893  case FBIOGET_VBLANK:
894  {
895  struct fb_vblank vblank;
896  int err;
897 
898  err = matroxfb_get_vblank(minfo, &vblank);
899  if (err)
900  return err;
901  if (copy_to_user(argp, &vblank, sizeof(vblank)))
902  return -EFAULT;
903  return 0;
904  }
905  case FBIO_WAITFORVSYNC:
906  {
907  u_int32_t crt;
908 
909  if (get_user(crt, (u_int32_t __user *)arg))
910  return -EFAULT;
911 
912  return matroxfb_wait_for_sync(minfo, crt);
913  }
914  case MATROXFB_SET_OUTPUT_MODE:
915  {
916  struct matroxioc_output_mode mom;
917  struct matrox_altout *oproc;
918  int val;
919 
920  if (copy_from_user(&mom, argp, sizeof(mom)))
921  return -EFAULT;
922  if (mom.output >= MATROXFB_MAX_OUTPUTS)
923  return -ENXIO;
924  down_read(&minfo->altout.lock);
925  oproc = minfo->outputs[mom.output].output;
926  if (!oproc) {
927  val = -ENXIO;
928  } else if (!oproc->verifymode) {
929  if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
930  val = 0;
931  } else {
932  val = -EINVAL;
933  }
934  } else {
935  val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode);
936  }
937  if (!val) {
938  if (minfo->outputs[mom.output].mode != mom.mode) {
939  minfo->outputs[mom.output].mode = mom.mode;
940  val = 1;
941  }
942  }
943  up_read(&minfo->altout.lock);
944  if (val != 1)
945  return val;
946  switch (minfo->outputs[mom.output].src) {
947  case MATROXFB_SRC_CRTC1:
948  matroxfb_set_par(info);
949  break;
950  case MATROXFB_SRC_CRTC2:
951  {
952  struct matroxfb_dh_fb_info* crtc2;
953 
954  down_read(&minfo->crtc2.lock);
955  crtc2 = minfo->crtc2.info;
956  if (crtc2)
957  crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
958  up_read(&minfo->crtc2.lock);
959  }
960  break;
961  }
962  return 0;
963  }
964  case MATROXFB_GET_OUTPUT_MODE:
965  {
966  struct matroxioc_output_mode mom;
967  struct matrox_altout *oproc;
968  int val;
969 
970  if (copy_from_user(&mom, argp, sizeof(mom)))
971  return -EFAULT;
972  if (mom.output >= MATROXFB_MAX_OUTPUTS)
973  return -ENXIO;
974  down_read(&minfo->altout.lock);
975  oproc = minfo->outputs[mom.output].output;
976  if (!oproc) {
977  val = -ENXIO;
978  } else {
979  mom.mode = minfo->outputs[mom.output].mode;
980  val = 0;
981  }
982  up_read(&minfo->altout.lock);
983  if (val)
984  return val;
985  if (copy_to_user(argp, &mom, sizeof(mom)))
986  return -EFAULT;
987  return 0;
988  }
989  case MATROXFB_SET_OUTPUT_CONNECTION:
990  {
991  u_int32_t tmp;
992  int i;
993  int changes;
994 
995  if (copy_from_user(&tmp, argp, sizeof(tmp)))
996  return -EFAULT;
997  for (i = 0; i < 32; i++) {
998  if (tmp & (1 << i)) {
999  if (i >= MATROXFB_MAX_OUTPUTS)
1000  return -ENXIO;
1001  if (!minfo->outputs[i].output)
1002  return -ENXIO;
1003  switch (minfo->outputs[i].src) {
1004  case MATROXFB_SRC_NONE:
1005  case MATROXFB_SRC_CRTC1:
1006  break;
1007  default:
1008  return -EBUSY;
1009  }
1010  }
1011  }
1012  if (minfo->devflags.panellink) {
1013  if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1014  if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1015  return -EINVAL;
1016  for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1017  if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) {
1018  return -EBUSY;
1019  }
1020  }
1021  }
1022  }
1023  changes = 0;
1024  for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1025  if (tmp & (1 << i)) {
1026  if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) {
1027  changes = 1;
1028  minfo->outputs[i].src = MATROXFB_SRC_CRTC1;
1029  }
1030  } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1031  changes = 1;
1032  minfo->outputs[i].src = MATROXFB_SRC_NONE;
1033  }
1034  }
1035  if (!changes)
1036  return 0;
1037  matroxfb_set_par(info);
1038  return 0;
1039  }
1040  case MATROXFB_GET_OUTPUT_CONNECTION:
1041  {
1042  u_int32_t conn = 0;
1043  int i;
1044 
1045  for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1046  if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1047  conn |= 1 << i;
1048  }
1049  }
1050  if (put_user(conn, (u_int32_t __user *)arg))
1051  return -EFAULT;
1052  return 0;
1053  }
1054  case MATROXFB_GET_AVAILABLE_OUTPUTS:
1055  {
1056  u_int32_t conn = 0;
1057  int i;
1058 
1059  for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1060  if (minfo->outputs[i].output) {
1061  switch (minfo->outputs[i].src) {
1062  case MATROXFB_SRC_NONE:
1063  case MATROXFB_SRC_CRTC1:
1064  conn |= 1 << i;
1065  break;
1066  }
1067  }
1068  }
1069  if (minfo->devflags.panellink) {
1070  if (conn & MATROXFB_OUTPUT_CONN_DFP)
1071  conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1072  if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1073  conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1074  }
1075  if (put_user(conn, (u_int32_t __user *)arg))
1076  return -EFAULT;
1077  return 0;
1078  }
1079  case MATROXFB_GET_ALL_OUTPUTS:
1080  {
1081  u_int32_t conn = 0;
1082  int i;
1083 
1084  for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1085  if (minfo->outputs[i].output) {
1086  conn |= 1 << i;
1087  }
1088  }
1089  if (put_user(conn, (u_int32_t __user *)arg))
1090  return -EFAULT;
1091  return 0;
1092  }
1093  case VIDIOC_QUERYCAP:
1094  {
1095  struct v4l2_capability r;
1096 
1097  memset(&r, 0, sizeof(r));
1098  strcpy(r.driver, "matroxfb");
1099  strcpy(r.card, "Matrox");
1100  sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev));
1101  r.version = KERNEL_VERSION(1,0,0);
1102  r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1103  if (copy_to_user(argp, &r, sizeof(r)))
1104  return -EFAULT;
1105  return 0;
1106 
1107  }
1108  case VIDIOC_QUERYCTRL:
1109  {
1110  struct v4l2_queryctrl qctrl;
1111  int err;
1112 
1113  if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1114  return -EFAULT;
1115 
1116  down_read(&minfo->altout.lock);
1117  if (!minfo->outputs[1].output) {
1118  err = -ENXIO;
1119  } else if (minfo->outputs[1].output->getqueryctrl) {
1120  err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl);
1121  } else {
1122  err = -EINVAL;
1123  }
1124  up_read(&minfo->altout.lock);
1125  if (err >= 0 &&
1126  copy_to_user(argp, &qctrl, sizeof(qctrl)))
1127  return -EFAULT;
1128  return err;
1129  }
1130  case VIDIOC_G_CTRL:
1131  {
1132  struct v4l2_control ctrl;
1133  int err;
1134 
1135  if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1136  return -EFAULT;
1137 
1138  down_read(&minfo->altout.lock);
1139  if (!minfo->outputs[1].output) {
1140  err = -ENXIO;
1141  } else if (minfo->outputs[1].output->getctrl) {
1142  err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl);
1143  } else {
1144  err = -EINVAL;
1145  }
1146  up_read(&minfo->altout.lock);
1147  if (err >= 0 &&
1148  copy_to_user(argp, &ctrl, sizeof(ctrl)))
1149  return -EFAULT;
1150  return err;
1151  }
1152  case VIDIOC_S_CTRL:
1153  {
1154  struct v4l2_control ctrl;
1155  int err;
1156 
1157  if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1158  return -EFAULT;
1159 
1160  down_read(&minfo->altout.lock);
1161  if (!minfo->outputs[1].output) {
1162  err = -ENXIO;
1163  } else if (minfo->outputs[1].output->setctrl) {
1164  err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl);
1165  } else {
1166  err = -EINVAL;
1167  }
1168  up_read(&minfo->altout.lock);
1169  return err;
1170  }
1171  }
1172  return -ENOTTY;
1173 }
1174 
1175 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1176 
1177 static int matroxfb_blank(int blank, struct fb_info *info)
1178 {
1179  int seq;
1180  int crtc;
1181  CRITFLAGS
1182  struct matrox_fb_info *minfo = info2minfo(info);
1183 
1184  DBG(__func__)
1185 
1186  if (minfo->dead)
1187  return 1;
1188 
1189  switch (blank) {
1190  case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1191  case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1192  case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1193  case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1194  default: seq = 0x00; crtc = 0x00; break;
1195  }
1196 
1197  CRITBEGIN
1198 
1199  mga_outb(M_SEQ_INDEX, 1);
1200  mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1201  mga_outb(M_EXTVGA_INDEX, 1);
1202  mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1203 
1204  CRITEND
1205  return 0;
1206 }
1207 
1208 static struct fb_ops matroxfb_ops = {
1209  .owner = THIS_MODULE,
1210  .fb_open = matroxfb_open,
1211  .fb_release = matroxfb_release,
1212  .fb_check_var = matroxfb_check_var,
1213  .fb_set_par = matroxfb_set_par,
1214  .fb_setcolreg = matroxfb_setcolreg,
1215  .fb_pan_display =matroxfb_pan_display,
1216  .fb_blank = matroxfb_blank,
1217  .fb_ioctl = matroxfb_ioctl,
1218 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1219 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1220 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1221 /* .fb_cursor = <set by matrox_cfbX_init>, */
1222 };
1223 
1224 #define RSDepth(X) (((X) >> 8) & 0x0F)
1225 #define RS8bpp 0x1
1226 #define RS15bpp 0x2
1227 #define RS16bpp 0x3
1228 #define RS32bpp 0x4
1229 #define RS4bpp 0x5
1230 #define RS24bpp 0x6
1231 #define RSText 0x7
1232 #define RSText8 0x8
1233 /* 9-F */
1234 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1235  { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1236  { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1237  { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1238  { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1239  { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1240  { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1241  { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1242  { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1243 };
1244 
1245 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1246 static unsigned int mem; /* "matroxfb:mem:xxxxxM" */
1247 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1248 static int inv24; /* "matroxfb:inv24" */
1249 static int cross4MB = -1; /* "matroxfb:cross4MB" */
1250 static int disabled; /* "matroxfb:disabled" */
1251 static int noaccel; /* "matroxfb:noaccel" */
1252 static int nopan; /* "matroxfb:nopan" */
1253 static int no_pci_retry; /* "matroxfb:nopciretry" */
1254 static int novga; /* "matroxfb:novga" */
1255 static int nobios; /* "matroxfb:nobios" */
1256 static int noinit = 1; /* "matroxfb:init" */
1257 static int inverse; /* "matroxfb:inverse" */
1258 static int sgram; /* "matroxfb:sgram" */
1259 #ifdef CONFIG_MTRR
1260 static int mtrr = 1; /* "matroxfb:nomtrr" */
1261 #endif
1262 static int grayscale; /* "matroxfb:grayscale" */
1263 static int dev = -1; /* "matroxfb:dev:xxxxx" */
1264 static unsigned int vesa = ~0; /* "matroxfb:vesa:xxxxx" */
1265 static int depth = -1; /* "matroxfb:depth:xxxxx" */
1266 static unsigned int xres; /* "matroxfb:xres:xxxxx" */
1267 static unsigned int yres; /* "matroxfb:yres:xxxxx" */
1268 static unsigned int upper = ~0; /* "matroxfb:upper:xxxxx" */
1269 static unsigned int lower = ~0; /* "matroxfb:lower:xxxxx" */
1270 static unsigned int vslen; /* "matroxfb:vslen:xxxxx" */
1271 static unsigned int left = ~0; /* "matroxfb:left:xxxxx" */
1272 static unsigned int right = ~0; /* "matroxfb:right:xxxxx" */
1273 static unsigned int hslen; /* "matroxfb:hslen:xxxxx" */
1274 static unsigned int pixclock; /* "matroxfb:pixclock:xxxxx" */
1275 static int sync = -1; /* "matroxfb:sync:xxxxx" */
1276 static unsigned int fv; /* "matroxfb:fv:xxxxx" */
1277 static unsigned int fh; /* "matroxfb:fh:xxxxxk" */
1278 static unsigned int maxclk; /* "matroxfb:maxclk:xxxxM" */
1279 static int dfp; /* "matroxfb:dfp */
1280 static int dfp_type = -1; /* "matroxfb:dfp:xxx */
1281 static int memtype = -1; /* "matroxfb:memtype:xxx" */
1282 static char outputs[8]; /* "matroxfb:outputs:xxx" */
1283 
1284 #ifndef MODULE
1285 static char videomode[64]; /* "matroxfb:mode:xxxxx" or "matroxfb:xxxxx" */
1286 #endif
1287 
1288 static int matroxfb_getmemory(struct matrox_fb_info *minfo,
1289  unsigned int maxSize, unsigned int *realSize)
1290 {
1291  vaddr_t vm;
1292  unsigned int offs;
1293  unsigned int offs2;
1294  unsigned char orig;
1295  unsigned char bytes[32];
1296  unsigned char* tmp;
1297 
1298  DBG(__func__)
1299 
1300  vm = minfo->video.vbase;
1301  maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1302  /* at least 2MB */
1303  if (maxSize < 0x0200000) return 0;
1304  if (maxSize > 0x2000000) maxSize = 0x2000000;
1305 
1306  mga_outb(M_EXTVGA_INDEX, 0x03);
1307  orig = mga_inb(M_EXTVGA_DATA);
1308  mga_outb(M_EXTVGA_DATA, orig | 0x80);
1309 
1310  tmp = bytes;
1311  for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1312  *tmp++ = mga_readb(vm, offs);
1313  for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1314  mga_writeb(vm, offs, 0x02);
1315  mga_outb(M_CACHEFLUSH, 0x00);
1316  for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1317  if (mga_readb(vm, offs) != 0x02)
1318  break;
1319  mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1320  if (mga_readb(vm, offs))
1321  break;
1322  }
1323  tmp = bytes;
1324  for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1325  mga_writeb(vm, offs2, *tmp++);
1326 
1327  mga_outb(M_EXTVGA_INDEX, 0x03);
1328  mga_outb(M_EXTVGA_DATA, orig);
1329 
1330  *realSize = offs - 0x100000;
1331 #ifdef CONFIG_FB_MATROX_MILLENIUM
1332  minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF));
1333 #endif
1334  return 1;
1335 }
1336 
1337 struct video_board {
1338  int maxvram;
1339  int maxdisplayable;
1340  int accelID;
1341  struct matrox_switch* lowlevel;
1342  };
1343 #ifdef CONFIG_FB_MATROX_MILLENIUM
1344 static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1345 static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1346 static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1347 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1348 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1349 static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1350 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1351 #ifdef CONFIG_FB_MATROX_G
1352 static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1353 static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1354 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1355  whole 32MB */
1356 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1357 #endif
1358 
1359 #define DEVF_VIDEO64BIT 0x0001
1360 #define DEVF_SWAPS 0x0002
1361 #define DEVF_SRCORG 0x0004
1362 #define DEVF_DUALHEAD 0x0008
1363 #define DEVF_CROSS4MB 0x0010
1364 #define DEVF_TEXT4B 0x0020
1365 /* #define DEVF_recycled 0x0040 */
1366 /* #define DEVF_recycled 0x0080 */
1367 #define DEVF_SUPPORT32MB 0x0100
1368 #define DEVF_ANY_VXRES 0x0200
1369 #define DEVF_TEXT16B 0x0400
1370 #define DEVF_CRTC2 0x0800
1371 #define DEVF_MAVEN_CAPABLE 0x1000
1372 #define DEVF_PANELLINK_CAPABLE 0x2000
1373 #define DEVF_G450DAC 0x4000
1374 
1375 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1376 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1377 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1378 #define DEVF_G200 (DEVF_G2CORE)
1379 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1380 /* if you'll find how to drive DFP... */
1381 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1382 #define DEVF_G550 (DEVF_G450)
1383 
1384 static struct board {
1385  unsigned short vendor, device, rev, svid, sid;
1386  unsigned int flags;
1387  unsigned int maxclk;
1388  enum mga_chip chip;
1389  struct video_board* base;
1390  const char* name;
1391  } dev_list[] = {
1392 #ifdef CONFIG_FB_MATROX_MILLENIUM
1393  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1394  0, 0,
1395  DEVF_TEXT4B,
1396  230000,
1397  MGA_2064,
1398  &vbMillennium,
1399  "Millennium (PCI)"},
1400  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1401  0, 0,
1402  DEVF_SWAPS,
1403  220000,
1404  MGA_2164,
1405  &vbMillennium2,
1406  "Millennium II (PCI)"},
1407  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1408  0, 0,
1409  DEVF_SWAPS,
1410  250000,
1411  MGA_2164,
1412  &vbMillennium2A,
1413  "Millennium II (AGP)"},
1414 #endif
1415 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1416  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1417  0, 0,
1418  DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1419  180000,
1420  MGA_1064,
1421  &vbMystique,
1422  "Mystique (PCI)"},
1423  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1424  0, 0,
1425  DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1426  220000,
1427  MGA_1164,
1428  &vbMystique,
1429  "Mystique 220 (PCI)"},
1430  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
1431  0, 0,
1432  DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1433  180000,
1434  MGA_1064,
1435  &vbMystique,
1436  "Mystique (AGP)"},
1437  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
1438  0, 0,
1439  DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1440  220000,
1441  MGA_1164,
1442  &vbMystique,
1443  "Mystique 220 (AGP)"},
1444 #endif
1445 #ifdef CONFIG_FB_MATROX_G
1446  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1447  0, 0,
1448  DEVF_G100,
1449  230000,
1450  MGA_G100,
1451  &vbG100,
1452  "MGA-G100 (PCI)"},
1453  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1454  0, 0,
1455  DEVF_G100,
1456  230000,
1457  MGA_G100,
1458  &vbG100,
1459  "MGA-G100 (AGP)"},
1460  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1461  0, 0,
1462  DEVF_G200,
1463  250000,
1464  MGA_G200,
1465  &vbG200,
1466  "MGA-G200 (PCI)"},
1467  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1468  PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1469  DEVF_G200,
1470  220000,
1471  MGA_G200,
1472  &vbG200,
1473  "MGA-G200 (AGP)"},
1474  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1475  PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1476  DEVF_G200,
1477  230000,
1478  MGA_G200,
1479  &vbG200,
1480  "Mystique G200 (AGP)"},
1481  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1482  PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1483  DEVF_G200,
1484  250000,
1485  MGA_G200,
1486  &vbG200,
1487  "Millennium G200 (AGP)"},
1488  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1489  PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1490  DEVF_G200,
1491  230000,
1492  MGA_G200,
1493  &vbG200,
1494  "Marvel G200 (AGP)"},
1495  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1496  PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1497  DEVF_G200,
1498  230000,
1499  MGA_G200,
1500  &vbG200,
1501  "MGA-G200 (AGP)"},
1502  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1503  0, 0,
1504  DEVF_G200,
1505  230000,
1506  MGA_G200,
1507  &vbG200,
1508  "G200 (AGP)"},
1509  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1510  PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1511  DEVF_G400,
1512  360000,
1513  MGA_G400,
1514  &vbG400,
1515  "Millennium G400 MAX (AGP)"},
1516  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1517  0, 0,
1518  DEVF_G400,
1519  300000,
1520  MGA_G400,
1521  &vbG400,
1522  "G400 (AGP)"},
1523  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1524  0, 0,
1525  DEVF_G450,
1526  360000,
1527  MGA_G450,
1528  &vbG400,
1529  "G450"},
1530  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1531  0, 0,
1532  DEVF_G550,
1533  360000,
1534  MGA_G550,
1535  &vbG400,
1536  "G550"},
1537 #endif
1538  {0, 0, 0xFF,
1539  0, 0,
1540  0,
1541  0,
1542  0,
1543  NULL,
1544  NULL}};
1545 
1546 #ifndef MODULE
1547 static struct fb_videomode defaultmode = {
1548  /* 640x480 @ 60Hz, 31.5 kHz */
1549  NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1550  0, FB_VMODE_NONINTERLACED
1551 };
1552 #endif /* !MODULE */
1553 
1554 static int hotplug = 0;
1555 
1556 static void setDefaultOutputs(struct matrox_fb_info *minfo)
1557 {
1558  unsigned int i;
1559  const char* ptr;
1560 
1561  minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1;
1562  if (minfo->devflags.g450dac) {
1563  minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1;
1564  minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1565  } else if (dfp) {
1566  minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1567  }
1568  ptr = outputs;
1569  for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1570  char c = *ptr++;
1571 
1572  if (c == 0) {
1573  break;
1574  }
1575  if (c == '0') {
1576  minfo->outputs[i].default_src = MATROXFB_SRC_NONE;
1577  } else if (c == '1') {
1578  minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1;
1579  } else if (c == '2' && minfo->devflags.crtc2) {
1580  minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2;
1581  } else {
1582  printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1583  break;
1584  }
1585  }
1586  /* Nullify this option for subsequent adapters */
1587  outputs[0] = 0;
1588 }
1589 
1590 static int initMatrox2(struct matrox_fb_info *minfo, struct board *b)
1591 {
1592  unsigned long ctrlptr_phys = 0;
1593  unsigned long video_base_phys = 0;
1594  unsigned int memsize;
1595  int err;
1596 
1597  static struct pci_device_id intel_82437[] = {
1598  { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1599  { },
1600  };
1601 
1602  DBG(__func__)
1603 
1604  /* set default values... */
1605  vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1606 
1607  minfo->hw_switch = b->base->lowlevel;
1608  minfo->devflags.accelerator = b->base->accelID;
1609  minfo->max_pixel_clock = b->maxclk;
1610 
1611  printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1612  minfo->capable.plnwt = 1;
1613  minfo->chip = b->chip;
1614  minfo->capable.srcorg = b->flags & DEVF_SRCORG;
1615  minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT;
1616  if (b->flags & DEVF_TEXT4B) {
1617  minfo->devflags.vgastep = 4;
1618  minfo->devflags.textmode = 4;
1619  minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1620  } else if (b->flags & DEVF_TEXT16B) {
1621  minfo->devflags.vgastep = 16;
1622  minfo->devflags.textmode = 1;
1623  minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1624  } else {
1625  minfo->devflags.vgastep = 8;
1626  minfo->devflags.textmode = 1;
1627  minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8;
1628  }
1629  minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0;
1630  minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES);
1631  minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0;
1632  minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1633  minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0;
1634  minfo->devflags.dfp_type = dfp_type;
1635  minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;
1636  minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode;
1637  minfo->devflags.textvram = 65536 / minfo->devflags.textmode;
1638  setDefaultOutputs(minfo);
1639  if (b->flags & DEVF_PANELLINK_CAPABLE) {
1640  minfo->outputs[2].data = minfo;
1641  minfo->outputs[2].output = &panellink_output;
1642  minfo->outputs[2].src = minfo->outputs[2].default_src;
1643  minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR;
1644  minfo->devflags.panellink = 1;
1645  }
1646 
1647  if (minfo->capable.cross4MB < 0)
1648  minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB;
1649  if (b->flags & DEVF_SWAPS) {
1650  ctrlptr_phys = pci_resource_start(minfo->pcidev, 1);
1651  video_base_phys = pci_resource_start(minfo->pcidev, 0);
1652  minfo->devflags.fbResource = PCI_BASE_ADDRESS_0;
1653  } else {
1654  ctrlptr_phys = pci_resource_start(minfo->pcidev, 0);
1655  video_base_phys = pci_resource_start(minfo->pcidev, 1);
1656  minfo->devflags.fbResource = PCI_BASE_ADDRESS_1;
1657  }
1658  err = -EINVAL;
1659  if (!ctrlptr_phys) {
1660  printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1661  goto fail;
1662  }
1663  if (!video_base_phys) {
1664  printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1665  goto fail;
1666  }
1667  memsize = b->base->maxvram;
1668  if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1669  goto fail;
1670  }
1671  if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1672  goto failCtrlMR;
1673  }
1674  minfo->video.len_maximum = memsize;
1675  /* convert mem (autodetect k, M) */
1676  if (mem < 1024) mem *= 1024;
1677  if (mem < 0x00100000) mem *= 1024;
1678 
1679  if (mem && (mem < memsize))
1680  memsize = mem;
1681  err = -ENOMEM;
1682  if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &minfo->mmio.vbase)) {
1683  printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1684  goto failVideoMR;
1685  }
1686  minfo->mmio.base = ctrlptr_phys;
1687  minfo->mmio.len = 16384;
1688  minfo->video.base = video_base_phys;
1689  if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &minfo->video.vbase)) {
1690  printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1691  video_base_phys, memsize);
1692  goto failCtrlIO;
1693  }
1694  {
1695  u_int32_t cmd;
1696  u_int32_t mga_option;
1697 
1698  pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option);
1699  pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd);
1700  mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1701  mga_option |= MX_OPTION_BSWAP;
1702  /* disable palette snooping */
1703  cmd &= ~PCI_COMMAND_VGA_PALETTE;
1704  if (pci_dev_present(intel_82437)) {
1705  if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) {
1706  printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1707  }
1708  mga_option |= 0x20000000;
1709  minfo->devflags.nopciretry = 1;
1710  }
1711  pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd);
1712  pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option);
1713  minfo->hw.MXoptionReg = mga_option;
1714 
1715  /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1716  /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1717  pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00);
1718  }
1719 
1720  err = -ENXIO;
1721  matroxfb_read_pins(minfo);
1722  if (minfo->hw_switch->preinit(minfo)) {
1723  goto failVideoIO;
1724  }
1725 
1726  err = -ENOMEM;
1727  if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) {
1728  printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1729  goto failVideoIO;
1730  }
1731  minfo->devflags.ydstorg = 0;
1732 
1733  minfo->video.base = video_base_phys;
1734  minfo->video.len_usable = minfo->video.len;
1735  if (minfo->video.len_usable > b->base->maxdisplayable)
1736  minfo->video.len_usable = b->base->maxdisplayable;
1737 #ifdef CONFIG_MTRR
1738  if (mtrr) {
1739  minfo->mtrr.vram = mtrr_add(video_base_phys, minfo->video.len, MTRR_TYPE_WRCOMB, 1);
1740  minfo->mtrr.vram_valid = 1;
1741  printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1742  }
1743 #endif /* CONFIG_MTRR */
1744 
1745  if (!minfo->devflags.novga)
1746  request_region(0x3C0, 32, "matrox");
1747  matroxfb_g450_connect(minfo);
1748  minfo->hw_switch->reset(minfo);
1749 
1750  minfo->fbcon.monspecs.hfmin = 0;
1751  minfo->fbcon.monspecs.hfmax = fh;
1752  minfo->fbcon.monspecs.vfmin = 0;
1753  minfo->fbcon.monspecs.vfmax = fv;
1754  minfo->fbcon.monspecs.dpms = 0; /* TBD */
1755 
1756  /* static settings */
1757  vesafb_defined.red = colors[depth-1].red;
1758  vesafb_defined.green = colors[depth-1].green;
1759  vesafb_defined.blue = colors[depth-1].blue;
1760  vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1761  vesafb_defined.grayscale = grayscale;
1762  vesafb_defined.vmode = 0;
1763  if (noaccel)
1764  vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1765 
1766  minfo->fbops = matroxfb_ops;
1767  minfo->fbcon.fbops = &minfo->fbops;
1768  minfo->fbcon.pseudo_palette = minfo->cmap;
1769  /* after __init time we are like module... no logo */
1770  minfo->fbcon.flags = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1771  minfo->fbcon.flags |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1772  FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1773  FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1774  FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1775  FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1776  FBINFO_HWACCEL_YPAN; /* And vertical panning */
1777  minfo->video.len_usable &= PAGE_MASK;
1778  fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1);
1779 
1780 #ifndef MODULE
1781  /* mode database is marked __init!!! */
1782  if (!hotplug) {
1783  fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL,
1784  NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1785  }
1786 #endif /* !MODULE */
1787 
1788  /* mode modifiers */
1789  if (hslen)
1790  vesafb_defined.hsync_len = hslen;
1791  if (vslen)
1792  vesafb_defined.vsync_len = vslen;
1793  if (left != ~0)
1794  vesafb_defined.left_margin = left;
1795  if (right != ~0)
1796  vesafb_defined.right_margin = right;
1797  if (upper != ~0)
1798  vesafb_defined.upper_margin = upper;
1799  if (lower != ~0)
1800  vesafb_defined.lower_margin = lower;
1801  if (xres)
1802  vesafb_defined.xres = xres;
1803  if (yres)
1804  vesafb_defined.yres = yres;
1805  if (sync != -1)
1806  vesafb_defined.sync = sync;
1807  else if (vesafb_defined.sync == ~0) {
1808  vesafb_defined.sync = 0;
1809  if (yres < 400)
1810  vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1811  else if (yres < 480)
1812  vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1813  }
1814 
1815  /* fv, fh, maxclk limits was specified */
1816  {
1817  unsigned int tmp;
1818 
1819  if (fv) {
1820  tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1821  + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1822  if ((tmp < fh) || (fh == 0)) fh = tmp;
1823  }
1824  if (fh) {
1825  tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1826  + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1827  if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1828  }
1829  tmp = (maxclk + 499) / 500;
1830  if (tmp) {
1831  tmp = (2000000000 + tmp) / tmp;
1832  if (tmp > pixclock) pixclock = tmp;
1833  }
1834  }
1835  if (pixclock) {
1836  if (pixclock < 2000) /* > 500MHz */
1837  pixclock = 4000; /* 250MHz */
1838  if (pixclock > 1000000)
1839  pixclock = 1000000; /* 1MHz */
1840  vesafb_defined.pixclock = pixclock;
1841  }
1842 
1843  /* FIXME: Where to move this?! */
1844 #if defined(CONFIG_PPC_PMAC)
1845 #ifndef MODULE
1846  if (machine_is(powermac)) {
1847  struct fb_var_screeninfo var;
1848  if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1849  default_vmode = VMODE_640_480_60;
1850 #ifdef CONFIG_NVRAM
1851  if (default_cmode == CMODE_NVRAM)
1852  default_cmode = nvram_read_byte(NV_CMODE);
1853 #endif
1854  if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1855  default_cmode = CMODE_8;
1856  if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1857  var.accel_flags = vesafb_defined.accel_flags;
1858  var.xoffset = var.yoffset = 0;
1859  /* Note: mac_vmode_to_var() does not set all parameters */
1860  vesafb_defined = var;
1861  }
1862  }
1863 #endif /* !MODULE */
1864 #endif /* CONFIG_PPC_PMAC */
1865  vesafb_defined.xres_virtual = vesafb_defined.xres;
1866  if (nopan) {
1867  vesafb_defined.yres_virtual = vesafb_defined.yres;
1868  } else {
1869  vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1870  to yres_virtual * xres_virtual < 2^32 */
1871  }
1872  matroxfb_init_fix(minfo);
1873  minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase);
1874  /* Normalize values (namely yres_virtual) */
1875  matroxfb_check_var(&vesafb_defined, &minfo->fbcon);
1876  /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1877  * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1878  * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1879  * anyway. But we at least tried... */
1880  minfo->fbcon.var = vesafb_defined;
1881  err = -EINVAL;
1882 
1883  printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1884  vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1885  vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1886  printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1887  minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len);
1888 
1889 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1890  * and we do not want currcon == 0 for subsequent framebuffers */
1891 
1892  minfo->fbcon.device = &minfo->pcidev->dev;
1893  if (register_framebuffer(&minfo->fbcon) < 0) {
1894  goto failVideoIO;
1895  }
1896  printk("fb%d: %s frame buffer device\n",
1897  minfo->fbcon.node, minfo->fbcon.fix.id);
1898 
1899  /* there is no console on this fb... but we have to initialize hardware
1900  * until someone tells me what is proper thing to do */
1901  if (!minfo->initialized) {
1902  printk(KERN_INFO "fb%d: initializing hardware\n",
1903  minfo->fbcon.node);
1904  /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1905  * already before, so register_framebuffer works correctly. */
1906  vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1907  fb_set_var(&minfo->fbcon, &vesafb_defined);
1908  }
1909 
1910  return 0;
1911 failVideoIO:;
1912  matroxfb_g450_shutdown(minfo);
1913  mga_iounmap(minfo->video.vbase);
1914 failCtrlIO:;
1915  mga_iounmap(minfo->mmio.vbase);
1916 failVideoMR:;
1917  release_mem_region(video_base_phys, minfo->video.len_maximum);
1918 failCtrlMR:;
1919  release_mem_region(ctrlptr_phys, 16384);
1920 fail:;
1921  return err;
1922 }
1923 
1924 static LIST_HEAD(matroxfb_list);
1925 static LIST_HEAD(matroxfb_driver_list);
1926 
1927 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1928 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1929 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1930  struct matrox_fb_info* minfo;
1931 
1932  list_add(&drv->node, &matroxfb_driver_list);
1933  for (minfo = matroxfb_l(matroxfb_list.next);
1934  minfo != matroxfb_l(&matroxfb_list);
1935  minfo = matroxfb_l(minfo->next_fb.next)) {
1936  void* p;
1937 
1938  if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1939  continue;
1940  p = drv->probe(minfo);
1941  if (p) {
1942  minfo->drivers_data[minfo->drivers_count] = p;
1943  minfo->drivers[minfo->drivers_count++] = drv;
1944  }
1945  }
1946  return 0;
1947 }
1948 
1949 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1950  struct matrox_fb_info* minfo;
1951 
1952  list_del(&drv->node);
1953  for (minfo = matroxfb_l(matroxfb_list.next);
1954  minfo != matroxfb_l(&matroxfb_list);
1955  minfo = matroxfb_l(minfo->next_fb.next)) {
1956  int i;
1957 
1958  for (i = 0; i < minfo->drivers_count; ) {
1959  if (minfo->drivers[i] == drv) {
1960  if (drv && drv->remove)
1961  drv->remove(minfo, minfo->drivers_data[i]);
1962  minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1963  minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1964  } else
1965  i++;
1966  }
1967  }
1968 }
1969 
1970 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1971  struct matroxfb_driver* drv;
1972  int i = 0;
1973  list_add(&minfo->next_fb, &matroxfb_list);
1974  for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1975  drv != matroxfb_driver_l(&matroxfb_driver_list);
1976  drv = matroxfb_driver_l(drv->node.next)) {
1977  if (drv && drv->probe) {
1978  void *p = drv->probe(minfo);
1979  if (p) {
1980  minfo->drivers_data[i] = p;
1981  minfo->drivers[i++] = drv;
1982  if (i == MATROXFB_MAX_FB_DRIVERS)
1983  break;
1984  }
1985  }
1986  }
1987  minfo->drivers_count = i;
1988 }
1989 
1990 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
1991  int i;
1992 
1993  list_del(&minfo->next_fb);
1994  for (i = 0; i < minfo->drivers_count; i++) {
1995  struct matroxfb_driver* drv = minfo->drivers[i];
1996 
1997  if (drv && drv->remove)
1998  drv->remove(minfo, minfo->drivers_data[i]);
1999  }
2000 }
2001 
2002 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
2003  struct board* b;
2004  u_int16_t svid;
2005  u_int16_t sid;
2006  struct matrox_fb_info* minfo;
2007  int err;
2008  u_int32_t cmd;
2009  DBG(__func__)
2010 
2011  svid = pdev->subsystem_vendor;
2012  sid = pdev->subsystem_device;
2013  for (b = dev_list; b->vendor; b++) {
2014  if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
2015  if (b->svid)
2016  if ((b->svid != svid) || (b->sid != sid)) continue;
2017  break;
2018  }
2019  /* not match... */
2020  if (!b->vendor)
2021  return -ENODEV;
2022  if (dev > 0) {
2023  /* not requested one... */
2024  dev--;
2025  return -ENODEV;
2026  }
2027  pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2028  if (pci_enable_device(pdev)) {
2029  return -1;
2030  }
2031 
2032  minfo = kmalloc(sizeof(*minfo), GFP_KERNEL);
2033  if (!minfo)
2034  return -1;
2035  memset(minfo, 0, sizeof(*minfo));
2036 
2037  minfo->pcidev = pdev;
2038  minfo->dead = 0;
2039  minfo->usecount = 0;
2040  minfo->userusecount = 0;
2041 
2042  pci_set_drvdata(pdev, minfo);
2043  /* DEVFLAGS */
2044  minfo->devflags.memtype = memtype;
2045  if (memtype != -1)
2046  noinit = 0;
2047  if (cmd & PCI_COMMAND_MEMORY) {
2048  minfo->devflags.novga = novga;
2049  minfo->devflags.nobios = nobios;
2050  minfo->devflags.noinit = noinit;
2051  /* subsequent heads always needs initialization and must not enable BIOS */
2052  novga = 1;
2053  nobios = 1;
2054  noinit = 0;
2055  } else {
2056  minfo->devflags.novga = 1;
2057  minfo->devflags.nobios = 1;
2058  minfo->devflags.noinit = 0;
2059  }
2060 
2061  minfo->devflags.nopciretry = no_pci_retry;
2062  minfo->devflags.mga_24bpp_fix = inv24;
2063  minfo->devflags.precise_width = option_precise_width;
2064  minfo->devflags.sgram = sgram;
2065  minfo->capable.cross4MB = cross4MB;
2066 
2067  spin_lock_init(&minfo->lock.DAC);
2068  spin_lock_init(&minfo->lock.accel);
2069  init_rwsem(&minfo->crtc2.lock);
2070  init_rwsem(&minfo->altout.lock);
2071  mutex_init(&minfo->fbcon.mm_lock);
2072  minfo->irq_flags = 0;
2073  init_waitqueue_head(&minfo->crtc1.vsync.wait);
2074  init_waitqueue_head(&minfo->crtc2.vsync.wait);
2075  minfo->crtc1.panpos = -1;
2076 
2077  err = initMatrox2(minfo, b);
2078  if (!err) {
2079  matroxfb_register_device(minfo);
2080  return 0;
2081  }
2082  kfree(minfo);
2083  return -1;
2084 }
2085 
2086 static void pci_remove_matrox(struct pci_dev* pdev) {
2087  struct matrox_fb_info* minfo;
2088 
2089  minfo = pci_get_drvdata(pdev);
2090  matroxfb_remove(minfo, 1);
2091 }
2092 
2093 static struct pci_device_id matroxfb_devices[] = {
2094 #ifdef CONFIG_FB_MATROX_MILLENIUM
2095  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2096  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2097  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2098  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2099  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2100  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2101 #endif
2102 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2103  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2104  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2105 #endif
2106 #ifdef CONFIG_FB_MATROX_G
2107  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2108  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2109  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2110  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2111  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2112  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2113  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2114  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2115  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2116  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2117  {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2118  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2119 #endif
2120  {0, 0,
2121  0, 0, 0, 0, 0}
2122 };
2123 
2124 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2125 
2126 
2127 static struct pci_driver matroxfb_driver = {
2128  .name = "matroxfb",
2129  .id_table = matroxfb_devices,
2130  .probe = matroxfb_probe,
2131  .remove = pci_remove_matrox,
2132 };
2133 
2134 /* **************************** init-time only **************************** */
2135 
2136 #define RSResolution(X) ((X) & 0x0F)
2137 #define RS640x400 1
2138 #define RS640x480 2
2139 #define RS800x600 3
2140 #define RS1024x768 4
2141 #define RS1280x1024 5
2142 #define RS1600x1200 6
2143 #define RS768x576 7
2144 #define RS960x720 8
2145 #define RS1152x864 9
2146 #define RS1408x1056 10
2147 #define RS640x350 11
2148 #define RS1056x344 12 /* 132 x 43 text */
2149 #define RS1056x400 13 /* 132 x 50 text */
2150 #define RS1056x480 14 /* 132 x 60 text */
2151 #define RSNoxNo 15
2152 /* 10-FF */
2153 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2154  { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2155  { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2156  { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2157  { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2158  { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2159  { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2160  { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2161  { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2162  { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2163  { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2164  { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2165  { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2166  { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2167  { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2168  { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2169 };
2170 
2171 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2172 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2173 /* default must be first */
2174  { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2175  { 0x101, RSCreate(RS640x480, RS8bpp ) },
2176  { 0x100, RSCreate(RS640x400, RS8bpp ) },
2177  { 0x180, RSCreate(RS768x576, RS8bpp ) },
2178  { 0x103, RSCreate(RS800x600, RS8bpp ) },
2179  { 0x188, RSCreate(RS960x720, RS8bpp ) },
2180  { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2181  { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2182  { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2183  { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2184  { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2185  { 0x110, RSCreate(RS640x480, RS15bpp) },
2186  { 0x181, RSCreate(RS768x576, RS15bpp) },
2187  { 0x113, RSCreate(RS800x600, RS15bpp) },
2188  { 0x189, RSCreate(RS960x720, RS15bpp) },
2189  { 0x116, RSCreate(RS1024x768, RS15bpp) },
2190  { 0x191, RSCreate(RS1152x864, RS15bpp) },
2191  { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2192  { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2193  { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2194  { 0x111, RSCreate(RS640x480, RS16bpp) },
2195  { 0x182, RSCreate(RS768x576, RS16bpp) },
2196  { 0x114, RSCreate(RS800x600, RS16bpp) },
2197  { 0x18A, RSCreate(RS960x720, RS16bpp) },
2198  { 0x117, RSCreate(RS1024x768, RS16bpp) },
2199  { 0x192, RSCreate(RS1152x864, RS16bpp) },
2200  { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2201  { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2202  { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2203  { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2204  { 0x184, RSCreate(RS768x576, RS24bpp) },
2205  { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2206  { 0x18C, RSCreate(RS960x720, RS24bpp) },
2207  { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2208  { 0x194, RSCreate(RS1152x864, RS24bpp) },
2209  { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2210  { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2211  { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2212  { 0x112, RSCreate(RS640x480, RS32bpp) },
2213  { 0x183, RSCreate(RS768x576, RS32bpp) },
2214  { 0x115, RSCreate(RS800x600, RS32bpp) },
2215  { 0x18B, RSCreate(RS960x720, RS32bpp) },
2216  { 0x118, RSCreate(RS1024x768, RS32bpp) },
2217  { 0x193, RSCreate(RS1152x864, RS32bpp) },
2218  { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2219  { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2220  { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2221  { 0x010, RSCreate(RS640x350, RS4bpp ) },
2222  { 0x012, RSCreate(RS640x480, RS4bpp ) },
2223  { 0x102, RSCreate(RS800x600, RS4bpp ) },
2224  { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2225  { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2226  { 0, 0 }};
2227 
2228 static void __init matroxfb_init_params(void) {
2229  /* fh from kHz to Hz */
2230  if (fh < 1000)
2231  fh *= 1000; /* 1kHz minimum */
2232  /* maxclk */
2233  if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2234  if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2235  /* fix VESA number */
2236  if (vesa != ~0)
2237  vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2238 
2239  /* static settings */
2240  for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2241  if (RSptr->vesa == vesa) break;
2242  }
2243  if (!RSptr->vesa) {
2244  printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2245  RSptr = vesamap;
2246  }
2247  {
2248  int res = RSResolution(RSptr->info)-1;
2249  if (left == ~0)
2250  left = timmings[res].left;
2251  if (!xres)
2252  xres = timmings[res].xres;
2253  if (right == ~0)
2254  right = timmings[res].right;
2255  if (!hslen)
2256  hslen = timmings[res].hslen;
2257  if (upper == ~0)
2258  upper = timmings[res].upper;
2259  if (!yres)
2260  yres = timmings[res].yres;
2261  if (lower == ~0)
2262  lower = timmings[res].lower;
2263  if (!vslen)
2264  vslen = timmings[res].vslen;
2265  if (!(fv||fh||maxclk||pixclock))
2266  fv = timmings[res].vfreq;
2267  if (depth == -1)
2268  depth = RSDepth(RSptr->info);
2269  }
2270 }
2271 
2272 static int __init matrox_init(void) {
2273  int err;
2274 
2275  matroxfb_init_params();
2276  err = pci_register_driver(&matroxfb_driver);
2277  dev = -1; /* accept all new devices... */
2278  return err;
2279 }
2280 
2281 /* **************************** exit-time only **************************** */
2282 
2283 static void __exit matrox_done(void) {
2284  pci_unregister_driver(&matroxfb_driver);
2285 }
2286 
2287 #ifndef MODULE
2288 
2289 /* ************************* init in-kernel code ************************** */
2290 
2291 static int __init matroxfb_setup(char *options) {
2292  char *this_opt;
2293 
2294  DBG(__func__)
2295 
2296  if (!options || !*options)
2297  return 0;
2298 
2299  while ((this_opt = strsep(&options, ",")) != NULL) {
2300  if (!*this_opt) continue;
2301 
2302  dprintk("matroxfb_setup: option %s\n", this_opt);
2303 
2304  if (!strncmp(this_opt, "dev:", 4))
2305  dev = simple_strtoul(this_opt+4, NULL, 0);
2306  else if (!strncmp(this_opt, "depth:", 6)) {
2307  switch (simple_strtoul(this_opt+6, NULL, 0)) {
2308  case 0: depth = RSText; break;
2309  case 4: depth = RS4bpp; break;
2310  case 8: depth = RS8bpp; break;
2311  case 15:depth = RS15bpp; break;
2312  case 16:depth = RS16bpp; break;
2313  case 24:depth = RS24bpp; break;
2314  case 32:depth = RS32bpp; break;
2315  default:
2316  printk(KERN_ERR "matroxfb: unsupported color depth\n");
2317  }
2318  } else if (!strncmp(this_opt, "xres:", 5))
2319  xres = simple_strtoul(this_opt+5, NULL, 0);
2320  else if (!strncmp(this_opt, "yres:", 5))
2321  yres = simple_strtoul(this_opt+5, NULL, 0);
2322  else if (!strncmp(this_opt, "vslen:", 6))
2323  vslen = simple_strtoul(this_opt+6, NULL, 0);
2324  else if (!strncmp(this_opt, "hslen:", 6))
2325  hslen = simple_strtoul(this_opt+6, NULL, 0);
2326  else if (!strncmp(this_opt, "left:", 5))
2327  left = simple_strtoul(this_opt+5, NULL, 0);
2328  else if (!strncmp(this_opt, "right:", 6))
2329  right = simple_strtoul(this_opt+6, NULL, 0);
2330  else if (!strncmp(this_opt, "upper:", 6))
2331  upper = simple_strtoul(this_opt+6, NULL, 0);
2332  else if (!strncmp(this_opt, "lower:", 6))
2333  lower = simple_strtoul(this_opt+6, NULL, 0);
2334  else if (!strncmp(this_opt, "pixclock:", 9))
2335  pixclock = simple_strtoul(this_opt+9, NULL, 0);
2336  else if (!strncmp(this_opt, "sync:", 5))
2337  sync = simple_strtoul(this_opt+5, NULL, 0);
2338  else if (!strncmp(this_opt, "vesa:", 5))
2339  vesa = simple_strtoul(this_opt+5, NULL, 0);
2340  else if (!strncmp(this_opt, "maxclk:", 7))
2341  maxclk = simple_strtoul(this_opt+7, NULL, 0);
2342  else if (!strncmp(this_opt, "fh:", 3))
2343  fh = simple_strtoul(this_opt+3, NULL, 0);
2344  else if (!strncmp(this_opt, "fv:", 3))
2345  fv = simple_strtoul(this_opt+3, NULL, 0);
2346  else if (!strncmp(this_opt, "mem:", 4))
2347  mem = simple_strtoul(this_opt+4, NULL, 0);
2348  else if (!strncmp(this_opt, "mode:", 5))
2349  strlcpy(videomode, this_opt+5, sizeof(videomode));
2350  else if (!strncmp(this_opt, "outputs:", 8))
2351  strlcpy(outputs, this_opt+8, sizeof(outputs));
2352  else if (!strncmp(this_opt, "dfp:", 4)) {
2353  dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2354  dfp = 1;
2355  }
2356 #ifdef CONFIG_PPC_PMAC
2357  else if (!strncmp(this_opt, "vmode:", 6)) {
2358  unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2359  if (vmode > 0 && vmode <= VMODE_MAX)
2360  default_vmode = vmode;
2361  } else if (!strncmp(this_opt, "cmode:", 6)) {
2362  unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2363  switch (cmode) {
2364  case 0:
2365  case 8:
2366  default_cmode = CMODE_8;
2367  break;
2368  case 15:
2369  case 16:
2370  default_cmode = CMODE_16;
2371  break;
2372  case 24:
2373  case 32:
2374  default_cmode = CMODE_32;
2375  break;
2376  }
2377  }
2378 #endif
2379  else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2380  disabled = 1;
2381  else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2382  disabled = 0;
2383  else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2384  sgram = 1;
2385  else if (!strcmp(this_opt, "sdram"))
2386  sgram = 0;
2387  else if (!strncmp(this_opt, "memtype:", 8))
2388  memtype = simple_strtoul(this_opt+8, NULL, 0);
2389  else {
2390  int value = 1;
2391 
2392  if (!strncmp(this_opt, "no", 2)) {
2393  value = 0;
2394  this_opt += 2;
2395  }
2396  if (! strcmp(this_opt, "inverse"))
2397  inverse = value;
2398  else if (!strcmp(this_opt, "accel"))
2399  noaccel = !value;
2400  else if (!strcmp(this_opt, "pan"))
2401  nopan = !value;
2402  else if (!strcmp(this_opt, "pciretry"))
2403  no_pci_retry = !value;
2404  else if (!strcmp(this_opt, "vga"))
2405  novga = !value;
2406  else if (!strcmp(this_opt, "bios"))
2407  nobios = !value;
2408  else if (!strcmp(this_opt, "init"))
2409  noinit = !value;
2410 #ifdef CONFIG_MTRR
2411  else if (!strcmp(this_opt, "mtrr"))
2412  mtrr = value;
2413 #endif
2414  else if (!strcmp(this_opt, "inv24"))
2415  inv24 = value;
2416  else if (!strcmp(this_opt, "cross4MB"))
2417  cross4MB = value;
2418  else if (!strcmp(this_opt, "grayscale"))
2419  grayscale = value;
2420  else if (!strcmp(this_opt, "dfp"))
2421  dfp = value;
2422  else {
2423  strlcpy(videomode, this_opt, sizeof(videomode));
2424  }
2425  }
2426  }
2427  return 0;
2428 }
2429 
2430 static int __initdata initialized = 0;
2431 
2432 static int __init matroxfb_init(void)
2433 {
2434  char *option = NULL;
2435  int err = 0;
2436 
2437  DBG(__func__)
2438 
2439  if (fb_get_options("matroxfb", &option))
2440  return -ENODEV;
2441  matroxfb_setup(option);
2442 
2443  if (disabled)
2444  return -ENXIO;
2445  if (!initialized) {
2446  initialized = 1;
2447  err = matrox_init();
2448  }
2449  hotplug = 1;
2450  /* never return failure, user can hotplug matrox later... */
2451  return err;
2452 }
2453 
2454 module_init(matroxfb_init);
2455 
2456 #else
2457 
2458 /* *************************** init module code **************************** */
2459 
2460 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <[email protected]>");
2461 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2462 MODULE_LICENSE("GPL");
2463 
2464 module_param(mem, int, 0);
2465 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2466 module_param(disabled, int, 0);
2467 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2468 module_param(noaccel, int, 0);
2469 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2470 module_param(nopan, int, 0);
2471 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2472 module_param(no_pci_retry, int, 0);
2473 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2474 module_param(novga, int, 0);
2475 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2476 module_param(nobios, int, 0);
2477 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2478 module_param(noinit, int, 0);
2479 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2480 module_param(memtype, int, 0);
2481 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2482 #ifdef CONFIG_MTRR
2483 module_param(mtrr, int, 0);
2484 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2485 #endif
2486 module_param(sgram, int, 0);
2487 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2488 module_param(inv24, int, 0);
2489 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2490 module_param(inverse, int, 0);
2491 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2492 module_param(dev, int, 0);
2493 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2494 module_param(vesa, int, 0);
2495 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2496 module_param(xres, int, 0);
2497 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2498 module_param(yres, int, 0);
2499 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2500 module_param(upper, int, 0);
2501 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2502 module_param(lower, int, 0);
2503 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2504 module_param(vslen, int, 0);
2505 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2506 module_param(left, int, 0);
2507 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2508 module_param(right, int, 0);
2509 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2510 module_param(hslen, int, 0);
2511 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2512 module_param(pixclock, int, 0);
2513 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2514 module_param(sync, int, 0);
2515 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2516 module_param(depth, int, 0);
2517 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2518 module_param(maxclk, int, 0);
2519 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2520 module_param(fh, int, 0);
2521 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2522 module_param(fv, int, 0);
2523 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2524 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"");
2525 module_param(grayscale, int, 0);
2526 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2527 module_param(cross4MB, int, 0);
2528 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2529 module_param(dfp, int, 0);
2530 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2531 module_param(dfp_type, int, 0);
2532 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2533 module_param_string(outputs, outputs, sizeof(outputs), 0);
2534 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2535 #ifdef CONFIG_PPC_PMAC
2536 module_param_named(vmode, default_vmode, int, 0);
2537 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2538 module_param_named(cmode, default_cmode, int, 0);
2539 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2540 #endif
2541 
2542 int __init init_module(void){
2543 
2544  DBG(__func__)
2545 
2546  if (disabled)
2547  return -ENXIO;
2548 
2549  if (depth == 0)
2550  depth = RSText;
2551  else if (depth == 4)
2552  depth = RS4bpp;
2553  else if (depth == 8)
2554  depth = RS8bpp;
2555  else if (depth == 15)
2556  depth = RS15bpp;
2557  else if (depth == 16)
2558  depth = RS16bpp;
2559  else if (depth == 24)
2560  depth = RS24bpp;
2561  else if (depth == 32)
2562  depth = RS32bpp;
2563  else if (depth != -1) {
2564  printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2565  depth = -1;
2566  }
2567  matrox_init();
2568  /* never return failure; user can hotplug matrox later... */
2569  return 0;
2570 }
2571 #endif /* MODULE */
2572 
2573 module_exit(matrox_done);
2574 EXPORT_SYMBOL(matroxfb_register_driver);
2575 EXPORT_SYMBOL(matroxfb_unregister_driver);
2576 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2577 EXPORT_SYMBOL(matroxfb_enable_irq);
2578 
2579 /*
2580  * Overrides for Emacs so that we follow Linus's tabbing style.
2581  * ---------------------------------------------------------------------------
2582  * Local variables:
2583  * c-basic-offset: 8
2584  * End:
2585  */
2586 
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