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mxser.c
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1 /*
2  * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3  *
4  * Copyright (C) 1999-2006 Moxa Technologies ([email protected]).
5  * Copyright (C) 2006-2008 Jiri Slaby <[email protected]>
6  *
7  * This code is loosely based on the 1.8 moxa driver which is based on
8  * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9  * others.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17  * <[email protected]>. The original 1.8 code is available on
18  * www.moxa.com.
19  * - Fixed x86_64 cleanness
20  */
21 
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/serial_reg.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/ioport.h>
37 #include <linux/mm.h>
38 #include <linux/delay.h>
39 #include <linux/pci.h>
40 #include <linux/bitops.h>
41 #include <linux/slab.h>
42 #include <linux/ratelimit.h>
43 
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/uaccess.h>
47 
48 #include "mxser.h"
49 
50 #define MXSER_VERSION "2.0.5" /* 1.14 */
51 #define MXSERMAJOR 174
52 
53 #define MXSER_BOARDS 4 /* Max. boards */
54 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
55 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56 #define MXSER_ISR_PASS_LIMIT 100
57 
58 /*CheckIsMoxaMust return value*/
59 #define MOXA_OTHER_UART 0x00
60 #define MOXA_MUST_MU150_HWID 0x01
61 #define MOXA_MUST_MU860_HWID 0x02
62 
63 #define WAKEUP_CHARS 256
64 
65 #define UART_MCR_AFE 0x20
66 #define UART_LSR_SPECIAL 0x1E
67 
68 #define PCI_DEVICE_ID_POS104UL 0x1044
69 #define PCI_DEVICE_ID_CB108 0x1080
70 #define PCI_DEVICE_ID_CP102UF 0x1023
71 #define PCI_DEVICE_ID_CP112UL 0x1120
72 #define PCI_DEVICE_ID_CB114 0x1142
73 #define PCI_DEVICE_ID_CP114UL 0x1143
74 #define PCI_DEVICE_ID_CB134I 0x1341
75 #define PCI_DEVICE_ID_CP138U 0x1380
76 
77 
78 #define C168_ASIC_ID 1
79 #define C104_ASIC_ID 2
80 #define C102_ASIC_ID 0xB
81 #define CI132_ASIC_ID 4
82 #define CI134_ASIC_ID 3
83 #define CI104J_ASIC_ID 5
84 
85 #define MXSER_HIGHBAUD 1
86 #define MXSER_HAS2 2
87 
88 /* This is only for PCI */
89 static const struct {
90  int type;
91  int tx_fifo;
92  int rx_fifo;
93  int xmit_fifo_size;
94  int rx_high_water;
95  int rx_trigger;
96  int rx_low_water;
97  long max_baud;
98 } Gpci_uart_info[] = {
99  {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
100  {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
101  {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
102 };
103 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
104 
105 struct mxser_cardinfo {
106  char *name;
107  unsigned int nports;
108  unsigned int flags;
109 };
110 
111 static const struct mxser_cardinfo mxser_cards[] = {
112 /* 0*/ { "C168 series", 8, },
113  { "C104 series", 4, },
114  { "CI-104J series", 4, },
115  { "C168H/PCI series", 8, },
116  { "C104H/PCI series", 4, },
117 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
118  { "CI-132 series", 4, MXSER_HAS2 },
119  { "CI-134 series", 4, },
120  { "CP-132 series", 2, },
121  { "CP-114 series", 4, },
122 /*10*/ { "CT-114 series", 4, },
123  { "CP-102 series", 2, MXSER_HIGHBAUD },
124  { "CP-104U series", 4, },
125  { "CP-168U series", 8, },
126  { "CP-132U series", 2, },
127 /*15*/ { "CP-134U series", 4, },
128  { "CP-104JU series", 4, },
129  { "Moxa UC7000 Serial", 8, }, /* RC7000 */
130  { "CP-118U series", 8, },
131  { "CP-102UL series", 2, },
132 /*20*/ { "CP-102U series", 2, },
133  { "CP-118EL series", 8, },
134  { "CP-168EL series", 8, },
135  { "CP-104EL series", 4, },
136  { "CB-108 series", 8, },
137 /*25*/ { "CB-114 series", 4, },
138  { "CB-134I series", 4, },
139  { "CP-138U series", 8, },
140  { "POS-104UL series", 4, },
141  { "CP-114UL series", 4, },
142 /*30*/ { "CP-102UF series", 2, },
143  { "CP-112UL series", 2, },
144 };
145 
146 /* driver_data correspond to the lines in the structure above
147  see also ISA probe function before you change something */
148 static struct pci_device_id mxser_pcibrds[] = {
149  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
150  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
151  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
152  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
153  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
154  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
155  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
156  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
157  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
158  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
159  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
160  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
161  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
162  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
163  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
164  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
165  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
166  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
167  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
168  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
169  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
170  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
171  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
172  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
173  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
174  { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
175  { }
176 };
177 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
178 
179 static unsigned long ioaddr[MXSER_BOARDS];
180 static int ttymajor = MXSERMAJOR;
181 
182 /* Variables for insmod */
183 
184 MODULE_AUTHOR("Casper Yang");
185 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
186 module_param_array(ioaddr, ulong, NULL, 0);
187 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
188 module_param(ttymajor, int, 0);
189 MODULE_LICENSE("GPL");
190 
191 struct mxser_log {
192  int tick;
193  unsigned long rxcnt[MXSER_PORTS];
194  unsigned long txcnt[MXSER_PORTS];
195 };
196 
197 struct mxser_mon {
198  unsigned long rxcnt;
199  unsigned long txcnt;
200  unsigned long up_rxcnt;
201  unsigned long up_txcnt;
202  int modem_status;
203  unsigned char hold_reason;
204 };
205 
206 struct mxser_mon_ext {
207  unsigned long rx_cnt[32];
208  unsigned long tx_cnt[32];
209  unsigned long up_rxcnt[32];
210  unsigned long up_txcnt[32];
211  int modem_status[32];
212 
213  long baudrate[32];
214  int databits[32];
215  int stopbits[32];
216  int parity[32];
217  int flowctrl[32];
218  int fifo[32];
219  int iftype[32];
220 };
221 
222 struct mxser_board;
223 
224 struct mxser_port {
225  struct tty_port port;
226  struct mxser_board *board;
227 
228  unsigned long ioaddr;
229  unsigned long opmode_ioaddr;
230  int max_baud;
231 
232  int rx_high_water;
233  int rx_trigger; /* Rx fifo trigger level */
234  int rx_low_water;
235  int baud_base; /* max. speed */
236  int type; /* UART type */
237 
238  int x_char; /* xon/xoff character */
239  int IER; /* Interrupt Enable Register */
240  int MCR; /* Modem control register */
241 
242  unsigned char stop_rx;
243  unsigned char ldisc_stop_rx;
244 
245  int custom_divisor;
246  unsigned char err_shadow;
247 
248  struct async_icount icount; /* kernel counters for 4 input interrupts */
249  int timeout;
250 
251  int read_status_mask;
252  int ignore_status_mask;
253  int xmit_fifo_size;
254  int xmit_head;
255  int xmit_tail;
256  int xmit_cnt;
257 
258  struct ktermios normal_termios;
259 
260  struct mxser_mon mon_data;
261 
262  spinlock_t slock;
263 };
264 
265 struct mxser_board {
266  unsigned int idx;
267  int irq;
268  const struct mxser_cardinfo *info;
269  unsigned long vector;
270  unsigned long vector_mask;
271 
272  int chip_flag;
273  int uart_type;
274 
275  struct mxser_port ports[MXSER_PORTS_PER_BOARD];
276 };
277 
278 struct mxser_mstatus {
279  tcflag_t cflag;
280  int cts;
281  int dsr;
282  int ri;
283  int dcd;
284 };
285 
286 static struct mxser_board mxser_boards[MXSER_BOARDS];
287 static struct tty_driver *mxvar_sdriver;
288 static struct mxser_log mxvar_log;
289 static int mxser_set_baud_method[MXSER_PORTS + 1];
290 
291 static void mxser_enable_must_enchance_mode(unsigned long baseio)
292 {
293  u8 oldlcr;
294  u8 efr;
295 
296  oldlcr = inb(baseio + UART_LCR);
297  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
298 
299  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
300  efr |= MOXA_MUST_EFR_EFRB_ENABLE;
301 
302  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
303  outb(oldlcr, baseio + UART_LCR);
304 }
305 
306 #ifdef CONFIG_PCI
307 static void mxser_disable_must_enchance_mode(unsigned long baseio)
308 {
309  u8 oldlcr;
310  u8 efr;
311 
312  oldlcr = inb(baseio + UART_LCR);
313  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
314 
315  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
316  efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
317 
318  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
319  outb(oldlcr, baseio + UART_LCR);
320 }
321 #endif
322 
323 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
324 {
325  u8 oldlcr;
326  u8 efr;
327 
328  oldlcr = inb(baseio + UART_LCR);
329  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
330 
331  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
332  efr &= ~MOXA_MUST_EFR_BANK_MASK;
333  efr |= MOXA_MUST_EFR_BANK0;
334 
335  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
336  outb(value, baseio + MOXA_MUST_XON1_REGISTER);
337  outb(oldlcr, baseio + UART_LCR);
338 }
339 
340 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
341 {
342  u8 oldlcr;
343  u8 efr;
344 
345  oldlcr = inb(baseio + UART_LCR);
346  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
347 
348  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
349  efr &= ~MOXA_MUST_EFR_BANK_MASK;
350  efr |= MOXA_MUST_EFR_BANK0;
351 
352  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
353  outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
354  outb(oldlcr, baseio + UART_LCR);
355 }
356 
357 static void mxser_set_must_fifo_value(struct mxser_port *info)
358 {
359  u8 oldlcr;
360  u8 efr;
361 
362  oldlcr = inb(info->ioaddr + UART_LCR);
363  outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
364 
365  efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
366  efr &= ~MOXA_MUST_EFR_BANK_MASK;
367  efr |= MOXA_MUST_EFR_BANK1;
368 
369  outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
370  outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
371  outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
372  outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
373  outb(oldlcr, info->ioaddr + UART_LCR);
374 }
375 
376 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
377 {
378  u8 oldlcr;
379  u8 efr;
380 
381  oldlcr = inb(baseio + UART_LCR);
382  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
383 
384  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
385  efr &= ~MOXA_MUST_EFR_BANK_MASK;
386  efr |= MOXA_MUST_EFR_BANK2;
387 
388  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
389  outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
390  outb(oldlcr, baseio + UART_LCR);
391 }
392 
393 #ifdef CONFIG_PCI
394 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
395 {
396  u8 oldlcr;
397  u8 efr;
398 
399  oldlcr = inb(baseio + UART_LCR);
400  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
401 
402  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
403  efr &= ~MOXA_MUST_EFR_BANK_MASK;
404  efr |= MOXA_MUST_EFR_BANK2;
405 
406  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
407  *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
408  outb(oldlcr, baseio + UART_LCR);
409 }
410 #endif
411 
412 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
413 {
414  u8 oldlcr;
415  u8 efr;
416 
417  oldlcr = inb(baseio + UART_LCR);
418  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
419 
420  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
421  efr &= ~MOXA_MUST_EFR_SF_MASK;
422 
423  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
424  outb(oldlcr, baseio + UART_LCR);
425 }
426 
427 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
428 {
429  u8 oldlcr;
430  u8 efr;
431 
432  oldlcr = inb(baseio + UART_LCR);
433  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
434 
435  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
436  efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
437  efr |= MOXA_MUST_EFR_SF_TX1;
438 
439  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
440  outb(oldlcr, baseio + UART_LCR);
441 }
442 
443 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
444 {
445  u8 oldlcr;
446  u8 efr;
447 
448  oldlcr = inb(baseio + UART_LCR);
449  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
450 
451  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
452  efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
453 
454  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
455  outb(oldlcr, baseio + UART_LCR);
456 }
457 
458 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
459 {
460  u8 oldlcr;
461  u8 efr;
462 
463  oldlcr = inb(baseio + UART_LCR);
464  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
465 
466  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
467  efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
468  efr |= MOXA_MUST_EFR_SF_RX1;
469 
470  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
471  outb(oldlcr, baseio + UART_LCR);
472 }
473 
474 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
475 {
476  u8 oldlcr;
477  u8 efr;
478 
479  oldlcr = inb(baseio + UART_LCR);
480  outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
481 
482  efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
483  efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
484 
485  outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
486  outb(oldlcr, baseio + UART_LCR);
487 }
488 
489 #ifdef CONFIG_PCI
490 static int __devinit CheckIsMoxaMust(unsigned long io)
491 {
492  u8 oldmcr, hwid;
493  int i;
494 
495  outb(0, io + UART_LCR);
496  mxser_disable_must_enchance_mode(io);
497  oldmcr = inb(io + UART_MCR);
498  outb(0, io + UART_MCR);
499  mxser_set_must_xon1_value(io, 0x11);
500  if ((hwid = inb(io + UART_MCR)) != 0) {
501  outb(oldmcr, io + UART_MCR);
502  return MOXA_OTHER_UART;
503  }
504 
505  mxser_get_must_hardware_id(io, &hwid);
506  for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
507  if (hwid == Gpci_uart_info[i].type)
508  return (int)hwid;
509  }
510  return MOXA_OTHER_UART;
511 }
512 #endif
513 
514 static void process_txrx_fifo(struct mxser_port *info)
515 {
516  int i;
517 
518  if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
519  info->rx_trigger = 1;
520  info->rx_high_water = 1;
521  info->rx_low_water = 1;
522  info->xmit_fifo_size = 1;
523  } else
524  for (i = 0; i < UART_INFO_NUM; i++)
525  if (info->board->chip_flag == Gpci_uart_info[i].type) {
526  info->rx_trigger = Gpci_uart_info[i].rx_trigger;
527  info->rx_low_water = Gpci_uart_info[i].rx_low_water;
528  info->rx_high_water = Gpci_uart_info[i].rx_high_water;
529  info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
530  break;
531  }
532 }
533 
534 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
535 {
536  static unsigned char mxser_msr[MXSER_PORTS + 1];
537  unsigned char status = 0;
538 
539  status = inb(baseaddr + UART_MSR);
540 
541  mxser_msr[port] &= 0x0F;
542  mxser_msr[port] |= status;
543  status = mxser_msr[port];
544  if (mode)
545  mxser_msr[port] = 0;
546 
547  return status;
548 }
549 
550 static int mxser_carrier_raised(struct tty_port *port)
551 {
552  struct mxser_port *mp = container_of(port, struct mxser_port, port);
553  return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
554 }
555 
556 static void mxser_dtr_rts(struct tty_port *port, int on)
557 {
558  struct mxser_port *mp = container_of(port, struct mxser_port, port);
559  unsigned long flags;
560 
561  spin_lock_irqsave(&mp->slock, flags);
562  if (on)
563  outb(inb(mp->ioaddr + UART_MCR) |
564  UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
565  else
566  outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
567  mp->ioaddr + UART_MCR);
568  spin_unlock_irqrestore(&mp->slock, flags);
569 }
570 
571 static int mxser_set_baud(struct tty_struct *tty, long newspd)
572 {
573  struct mxser_port *info = tty->driver_data;
574  int quot = 0, baud;
575  unsigned char cval;
576 
577  if (!info->ioaddr)
578  return -1;
579 
580  if (newspd > info->max_baud)
581  return -1;
582 
583  if (newspd == 134) {
584  quot = 2 * info->baud_base / 269;
585  tty_encode_baud_rate(tty, 134, 134);
586  } else if (newspd) {
587  quot = info->baud_base / newspd;
588  if (quot == 0)
589  quot = 1;
590  baud = info->baud_base/quot;
591  tty_encode_baud_rate(tty, baud, baud);
592  } else {
593  quot = 0;
594  }
595 
596  info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
597  info->timeout += HZ / 50; /* Add .02 seconds of slop */
598 
599  if (quot) {
600  info->MCR |= UART_MCR_DTR;
601  outb(info->MCR, info->ioaddr + UART_MCR);
602  } else {
603  info->MCR &= ~UART_MCR_DTR;
604  outb(info->MCR, info->ioaddr + UART_MCR);
605  return 0;
606  }
607 
608  cval = inb(info->ioaddr + UART_LCR);
609 
610  outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
611 
612  outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
613  outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
614  outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
615 
616 #ifdef BOTHER
617  if (C_BAUD(tty) == BOTHER) {
618  quot = info->baud_base % newspd;
619  quot *= 8;
620  if (quot % newspd > newspd / 2) {
621  quot /= newspd;
622  quot++;
623  } else
624  quot /= newspd;
625 
626  mxser_set_must_enum_value(info->ioaddr, quot);
627  } else
628 #endif
629  mxser_set_must_enum_value(info->ioaddr, 0);
630 
631  return 0;
632 }
633 
634 /*
635  * This routine is called to set the UART divisor registers to match
636  * the specified baud rate for a serial port.
637  */
638 static int mxser_change_speed(struct tty_struct *tty,
639  struct ktermios *old_termios)
640 {
641  struct mxser_port *info = tty->driver_data;
642  unsigned cflag, cval, fcr;
643  int ret = 0;
644  unsigned char status;
645 
646  cflag = tty->termios.c_cflag;
647  if (!info->ioaddr)
648  return ret;
649 
650  if (mxser_set_baud_method[tty->index] == 0)
651  mxser_set_baud(tty, tty_get_baud_rate(tty));
652 
653  /* byte size and parity */
654  switch (cflag & CSIZE) {
655  case CS5:
656  cval = 0x00;
657  break;
658  case CS6:
659  cval = 0x01;
660  break;
661  case CS7:
662  cval = 0x02;
663  break;
664  case CS8:
665  cval = 0x03;
666  break;
667  default:
668  cval = 0x00;
669  break; /* too keep GCC shut... */
670  }
671  if (cflag & CSTOPB)
672  cval |= 0x04;
673  if (cflag & PARENB)
674  cval |= UART_LCR_PARITY;
675  if (!(cflag & PARODD))
676  cval |= UART_LCR_EPAR;
677  if (cflag & CMSPAR)
678  cval |= UART_LCR_SPAR;
679 
680  if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
681  if (info->board->chip_flag) {
682  fcr = UART_FCR_ENABLE_FIFO;
683  fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
684  mxser_set_must_fifo_value(info);
685  } else
686  fcr = 0;
687  } else {
688  fcr = UART_FCR_ENABLE_FIFO;
689  if (info->board->chip_flag) {
690  fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
691  mxser_set_must_fifo_value(info);
692  } else {
693  switch (info->rx_trigger) {
694  case 1:
695  fcr |= UART_FCR_TRIGGER_1;
696  break;
697  case 4:
698  fcr |= UART_FCR_TRIGGER_4;
699  break;
700  case 8:
701  fcr |= UART_FCR_TRIGGER_8;
702  break;
703  default:
704  fcr |= UART_FCR_TRIGGER_14;
705  break;
706  }
707  }
708  }
709 
710  /* CTS flow control flag and modem status interrupts */
711  info->IER &= ~UART_IER_MSI;
712  info->MCR &= ~UART_MCR_AFE;
713  if (cflag & CRTSCTS) {
714  info->port.flags |= ASYNC_CTS_FLOW;
715  info->IER |= UART_IER_MSI;
716  if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
717  info->MCR |= UART_MCR_AFE;
718  } else {
719  status = inb(info->ioaddr + UART_MSR);
720  if (tty->hw_stopped) {
721  if (status & UART_MSR_CTS) {
722  tty->hw_stopped = 0;
723  if (info->type != PORT_16550A &&
724  !info->board->chip_flag) {
725  outb(info->IER & ~UART_IER_THRI,
726  info->ioaddr +
727  UART_IER);
728  info->IER |= UART_IER_THRI;
729  outb(info->IER, info->ioaddr +
730  UART_IER);
731  }
732  tty_wakeup(tty);
733  }
734  } else {
735  if (!(status & UART_MSR_CTS)) {
736  tty->hw_stopped = 1;
737  if ((info->type != PORT_16550A) &&
738  (!info->board->chip_flag)) {
739  info->IER &= ~UART_IER_THRI;
740  outb(info->IER, info->ioaddr +
741  UART_IER);
742  }
743  }
744  }
745  }
746  } else {
747  info->port.flags &= ~ASYNC_CTS_FLOW;
748  }
749  outb(info->MCR, info->ioaddr + UART_MCR);
750  if (cflag & CLOCAL) {
751  info->port.flags &= ~ASYNC_CHECK_CD;
752  } else {
753  info->port.flags |= ASYNC_CHECK_CD;
754  info->IER |= UART_IER_MSI;
755  }
756  outb(info->IER, info->ioaddr + UART_IER);
757 
758  /*
759  * Set up parity check flag
760  */
761  info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
762  if (I_INPCK(tty))
763  info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
764  if (I_BRKINT(tty) || I_PARMRK(tty))
765  info->read_status_mask |= UART_LSR_BI;
766 
767  info->ignore_status_mask = 0;
768 
769  if (I_IGNBRK(tty)) {
770  info->ignore_status_mask |= UART_LSR_BI;
771  info->read_status_mask |= UART_LSR_BI;
772  /*
773  * If we're ignore parity and break indicators, ignore
774  * overruns too. (For real raw support).
775  */
776  if (I_IGNPAR(tty)) {
777  info->ignore_status_mask |=
778  UART_LSR_OE |
779  UART_LSR_PE |
780  UART_LSR_FE;
781  info->read_status_mask |=
782  UART_LSR_OE |
783  UART_LSR_PE |
784  UART_LSR_FE;
785  }
786  }
787  if (info->board->chip_flag) {
788  mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
789  mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
790  if (I_IXON(tty)) {
791  mxser_enable_must_rx_software_flow_control(
792  info->ioaddr);
793  } else {
794  mxser_disable_must_rx_software_flow_control(
795  info->ioaddr);
796  }
797  if (I_IXOFF(tty)) {
798  mxser_enable_must_tx_software_flow_control(
799  info->ioaddr);
800  } else {
801  mxser_disable_must_tx_software_flow_control(
802  info->ioaddr);
803  }
804  }
805 
806 
807  outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
808  outb(cval, info->ioaddr + UART_LCR);
809 
810  return ret;
811 }
812 
813 static void mxser_check_modem_status(struct tty_struct *tty,
814  struct mxser_port *port, int status)
815 {
816  /* update input line counters */
817  if (status & UART_MSR_TERI)
818  port->icount.rng++;
819  if (status & UART_MSR_DDSR)
820  port->icount.dsr++;
821  if (status & UART_MSR_DDCD)
822  port->icount.dcd++;
823  if (status & UART_MSR_DCTS)
824  port->icount.cts++;
825  port->mon_data.modem_status = status;
826  wake_up_interruptible(&port->port.delta_msr_wait);
827 
828  if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
829  if (status & UART_MSR_DCD)
830  wake_up_interruptible(&port->port.open_wait);
831  }
832 
833  if (tty_port_cts_enabled(&port->port)) {
834  if (tty->hw_stopped) {
835  if (status & UART_MSR_CTS) {
836  tty->hw_stopped = 0;
837 
838  if ((port->type != PORT_16550A) &&
839  (!port->board->chip_flag)) {
840  outb(port->IER & ~UART_IER_THRI,
841  port->ioaddr + UART_IER);
842  port->IER |= UART_IER_THRI;
843  outb(port->IER, port->ioaddr +
844  UART_IER);
845  }
846  tty_wakeup(tty);
847  }
848  } else {
849  if (!(status & UART_MSR_CTS)) {
850  tty->hw_stopped = 1;
851  if (port->type != PORT_16550A &&
852  !port->board->chip_flag) {
853  port->IER &= ~UART_IER_THRI;
854  outb(port->IER, port->ioaddr +
855  UART_IER);
856  }
857  }
858  }
859  }
860 }
861 
862 static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
863 {
864  struct mxser_port *info = container_of(port, struct mxser_port, port);
865  unsigned long page;
866  unsigned long flags;
867 
868  page = __get_free_page(GFP_KERNEL);
869  if (!page)
870  return -ENOMEM;
871 
872  spin_lock_irqsave(&info->slock, flags);
873 
874  if (!info->ioaddr || !info->type) {
875  set_bit(TTY_IO_ERROR, &tty->flags);
876  free_page(page);
877  spin_unlock_irqrestore(&info->slock, flags);
878  return 0;
879  }
880  info->port.xmit_buf = (unsigned char *) page;
881 
882  /*
883  * Clear the FIFO buffers and disable them
884  * (they will be reenabled in mxser_change_speed())
885  */
886  if (info->board->chip_flag)
887  outb((UART_FCR_CLEAR_RCVR |
888  UART_FCR_CLEAR_XMIT |
889  MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
890  else
891  outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
892  info->ioaddr + UART_FCR);
893 
894  /*
895  * At this point there's no way the LSR could still be 0xFF;
896  * if it is, then bail out, because there's likely no UART
897  * here.
898  */
899  if (inb(info->ioaddr + UART_LSR) == 0xff) {
900  spin_unlock_irqrestore(&info->slock, flags);
901  if (capable(CAP_SYS_ADMIN)) {
902  set_bit(TTY_IO_ERROR, &tty->flags);
903  return 0;
904  } else
905  return -ENODEV;
906  }
907 
908  /*
909  * Clear the interrupt registers.
910  */
911  (void) inb(info->ioaddr + UART_LSR);
912  (void) inb(info->ioaddr + UART_RX);
913  (void) inb(info->ioaddr + UART_IIR);
914  (void) inb(info->ioaddr + UART_MSR);
915 
916  /*
917  * Now, initialize the UART
918  */
919  outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
920  info->MCR = UART_MCR_DTR | UART_MCR_RTS;
921  outb(info->MCR, info->ioaddr + UART_MCR);
922 
923  /*
924  * Finally, enable interrupts
925  */
926  info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
927 
928  if (info->board->chip_flag)
929  info->IER |= MOXA_MUST_IER_EGDAI;
930  outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
931 
932  /*
933  * And clear the interrupt registers again for luck.
934  */
935  (void) inb(info->ioaddr + UART_LSR);
936  (void) inb(info->ioaddr + UART_RX);
937  (void) inb(info->ioaddr + UART_IIR);
938  (void) inb(info->ioaddr + UART_MSR);
939 
940  clear_bit(TTY_IO_ERROR, &tty->flags);
941  info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
942 
943  /*
944  * and set the speed of the serial port
945  */
946  mxser_change_speed(tty, NULL);
947  spin_unlock_irqrestore(&info->slock, flags);
948 
949  return 0;
950 }
951 
952 /*
953  * This routine will shutdown a serial port
954  */
955 static void mxser_shutdown_port(struct tty_port *port)
956 {
957  struct mxser_port *info = container_of(port, struct mxser_port, port);
958  unsigned long flags;
959 
960  spin_lock_irqsave(&info->slock, flags);
961 
962  /*
963  * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
964  * here so the queue might never be waken up
965  */
966  wake_up_interruptible(&info->port.delta_msr_wait);
967 
968  /*
969  * Free the xmit buffer, if necessary
970  */
971  if (info->port.xmit_buf) {
972  free_page((unsigned long) info->port.xmit_buf);
973  info->port.xmit_buf = NULL;
974  }
975 
976  info->IER = 0;
977  outb(0x00, info->ioaddr + UART_IER);
978 
979  /* clear Rx/Tx FIFO's */
980  if (info->board->chip_flag)
981  outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
982  MOXA_MUST_FCR_GDA_MODE_ENABLE,
983  info->ioaddr + UART_FCR);
984  else
985  outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
986  info->ioaddr + UART_FCR);
987 
988  /* read data port to reset things */
989  (void) inb(info->ioaddr + UART_RX);
990 
991 
992  if (info->board->chip_flag)
993  SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
994 
995  spin_unlock_irqrestore(&info->slock, flags);
996 }
997 
998 /*
999  * This routine is called whenever a serial port is opened. It
1000  * enables interrupts for a serial port, linking in its async structure into
1001  * the IRQ chain. It also performs the serial-specific
1002  * initialization for the tty structure.
1003  */
1004 static int mxser_open(struct tty_struct *tty, struct file *filp)
1005 {
1006  struct mxser_port *info;
1007  int line;
1008 
1009  line = tty->index;
1010  if (line == MXSER_PORTS)
1011  return 0;
1012  info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1013  if (!info->ioaddr)
1014  return -ENODEV;
1015 
1016  tty->driver_data = info;
1017  return tty_port_open(&info->port, tty, filp);
1018 }
1019 
1020 static void mxser_flush_buffer(struct tty_struct *tty)
1021 {
1022  struct mxser_port *info = tty->driver_data;
1023  char fcr;
1024  unsigned long flags;
1025 
1026 
1027  spin_lock_irqsave(&info->slock, flags);
1028  info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1029 
1030  fcr = inb(info->ioaddr + UART_FCR);
1031  outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1032  info->ioaddr + UART_FCR);
1033  outb(fcr, info->ioaddr + UART_FCR);
1034 
1035  spin_unlock_irqrestore(&info->slock, flags);
1036 
1037  tty_wakeup(tty);
1038 }
1039 
1040 
1041 static void mxser_close_port(struct tty_port *port)
1042 {
1043  struct mxser_port *info = container_of(port, struct mxser_port, port);
1044  unsigned long timeout;
1045  /*
1046  * At this point we stop accepting input. To do this, we
1047  * disable the receive line status interrupts, and tell the
1048  * interrupt driver to stop checking the data ready bit in the
1049  * line status register.
1050  */
1051  info->IER &= ~UART_IER_RLSI;
1052  if (info->board->chip_flag)
1053  info->IER &= ~MOXA_MUST_RECV_ISR;
1054 
1055  outb(info->IER, info->ioaddr + UART_IER);
1056  /*
1057  * Before we drop DTR, make sure the UART transmitter
1058  * has completely drained; this is especially
1059  * important if there is a transmit FIFO!
1060  */
1061  timeout = jiffies + HZ;
1062  while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1063  schedule_timeout_interruptible(5);
1064  if (time_after(jiffies, timeout))
1065  break;
1066  }
1067 }
1068 
1069 /*
1070  * This routine is called when the serial port gets closed. First, we
1071  * wait for the last remaining data to be sent. Then, we unlink its
1072  * async structure from the interrupt chain if necessary, and we free
1073  * that IRQ if nothing is left in the chain.
1074  */
1075 static void mxser_close(struct tty_struct *tty, struct file *filp)
1076 {
1077  struct mxser_port *info = tty->driver_data;
1078  struct tty_port *port = &info->port;
1079 
1080  if (tty->index == MXSER_PORTS || info == NULL)
1081  return;
1082  if (tty_port_close_start(port, tty, filp) == 0)
1083  return;
1084  mutex_lock(&port->mutex);
1085  mxser_close_port(port);
1086  mxser_flush_buffer(tty);
1087  mxser_shutdown_port(port);
1088  clear_bit(ASYNCB_INITIALIZED, &port->flags);
1089  mutex_unlock(&port->mutex);
1090  /* Right now the tty_port set is done outside of the close_end helper
1091  as we don't yet have everyone using refcounts */
1092  tty_port_close_end(port, tty);
1093  tty_port_tty_set(port, NULL);
1094 }
1095 
1096 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1097 {
1098  int c, total = 0;
1099  struct mxser_port *info = tty->driver_data;
1100  unsigned long flags;
1101 
1102  if (!info->port.xmit_buf)
1103  return 0;
1104 
1105  while (1) {
1106  c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1107  SERIAL_XMIT_SIZE - info->xmit_head));
1108  if (c <= 0)
1109  break;
1110 
1111  memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1112  spin_lock_irqsave(&info->slock, flags);
1113  info->xmit_head = (info->xmit_head + c) &
1114  (SERIAL_XMIT_SIZE - 1);
1115  info->xmit_cnt += c;
1116  spin_unlock_irqrestore(&info->slock, flags);
1117 
1118  buf += c;
1119  count -= c;
1120  total += c;
1121  }
1122 
1123  if (info->xmit_cnt && !tty->stopped) {
1124  if (!tty->hw_stopped ||
1125  (info->type == PORT_16550A) ||
1126  (info->board->chip_flag)) {
1127  spin_lock_irqsave(&info->slock, flags);
1128  outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1129  UART_IER);
1130  info->IER |= UART_IER_THRI;
1131  outb(info->IER, info->ioaddr + UART_IER);
1132  spin_unlock_irqrestore(&info->slock, flags);
1133  }
1134  }
1135  return total;
1136 }
1137 
1138 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1139 {
1140  struct mxser_port *info = tty->driver_data;
1141  unsigned long flags;
1142 
1143  if (!info->port.xmit_buf)
1144  return 0;
1145 
1146  if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1147  return 0;
1148 
1149  spin_lock_irqsave(&info->slock, flags);
1150  info->port.xmit_buf[info->xmit_head++] = ch;
1151  info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1152  info->xmit_cnt++;
1153  spin_unlock_irqrestore(&info->slock, flags);
1154  if (!tty->stopped) {
1155  if (!tty->hw_stopped ||
1156  (info->type == PORT_16550A) ||
1157  info->board->chip_flag) {
1158  spin_lock_irqsave(&info->slock, flags);
1159  outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1160  info->IER |= UART_IER_THRI;
1161  outb(info->IER, info->ioaddr + UART_IER);
1162  spin_unlock_irqrestore(&info->slock, flags);
1163  }
1164  }
1165  return 1;
1166 }
1167 
1168 
1169 static void mxser_flush_chars(struct tty_struct *tty)
1170 {
1171  struct mxser_port *info = tty->driver_data;
1172  unsigned long flags;
1173 
1174  if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1175  (tty->hw_stopped && info->type != PORT_16550A &&
1176  !info->board->chip_flag))
1177  return;
1178 
1179  spin_lock_irqsave(&info->slock, flags);
1180 
1181  outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1182  info->IER |= UART_IER_THRI;
1183  outb(info->IER, info->ioaddr + UART_IER);
1184 
1185  spin_unlock_irqrestore(&info->slock, flags);
1186 }
1187 
1188 static int mxser_write_room(struct tty_struct *tty)
1189 {
1190  struct mxser_port *info = tty->driver_data;
1191  int ret;
1192 
1193  ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1194  return ret < 0 ? 0 : ret;
1195 }
1196 
1197 static int mxser_chars_in_buffer(struct tty_struct *tty)
1198 {
1199  struct mxser_port *info = tty->driver_data;
1200  return info->xmit_cnt;
1201 }
1202 
1203 /*
1204  * ------------------------------------------------------------
1205  * friends of mxser_ioctl()
1206  * ------------------------------------------------------------
1207  */
1208 static int mxser_get_serial_info(struct tty_struct *tty,
1209  struct serial_struct __user *retinfo)
1210 {
1211  struct mxser_port *info = tty->driver_data;
1212  struct serial_struct tmp = {
1213  .type = info->type,
1214  .line = tty->index,
1215  .port = info->ioaddr,
1216  .irq = info->board->irq,
1217  .flags = info->port.flags,
1218  .baud_base = info->baud_base,
1219  .close_delay = info->port.close_delay,
1220  .closing_wait = info->port.closing_wait,
1221  .custom_divisor = info->custom_divisor,
1222  .hub6 = 0
1223  };
1224  if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1225  return -EFAULT;
1226  return 0;
1227 }
1228 
1229 static int mxser_set_serial_info(struct tty_struct *tty,
1230  struct serial_struct __user *new_info)
1231 {
1232  struct mxser_port *info = tty->driver_data;
1233  struct tty_port *port = &info->port;
1234  struct serial_struct new_serial;
1235  speed_t baud;
1236  unsigned long sl_flags;
1237  unsigned int flags;
1238  int retval = 0;
1239 
1240  if (!new_info || !info->ioaddr)
1241  return -ENODEV;
1242  if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1243  return -EFAULT;
1244 
1245  if (new_serial.irq != info->board->irq ||
1246  new_serial.port != info->ioaddr)
1247  return -EINVAL;
1248 
1249  flags = port->flags & ASYNC_SPD_MASK;
1250 
1251  if (!capable(CAP_SYS_ADMIN)) {
1252  if ((new_serial.baud_base != info->baud_base) ||
1253  (new_serial.close_delay != info->port.close_delay) ||
1254  ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1255  return -EPERM;
1256  info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1257  (new_serial.flags & ASYNC_USR_MASK));
1258  } else {
1259  /*
1260  * OK, past this point, all the error checking has been done.
1261  * At this point, we start making changes.....
1262  */
1263  port->flags = ((port->flags & ~ASYNC_FLAGS) |
1264  (new_serial.flags & ASYNC_FLAGS));
1265  port->close_delay = new_serial.close_delay * HZ / 100;
1266  port->closing_wait = new_serial.closing_wait * HZ / 100;
1267  tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1268  if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1269  (new_serial.baud_base != info->baud_base ||
1270  new_serial.custom_divisor !=
1271  info->custom_divisor)) {
1272  if (new_serial.custom_divisor == 0)
1273  return -EINVAL;
1274  baud = new_serial.baud_base / new_serial.custom_divisor;
1275  tty_encode_baud_rate(tty, baud, baud);
1276  }
1277  }
1278 
1279  info->type = new_serial.type;
1280 
1281  process_txrx_fifo(info);
1282 
1283  if (test_bit(ASYNCB_INITIALIZED, &port->flags)) {
1284  if (flags != (port->flags & ASYNC_SPD_MASK)) {
1285  spin_lock_irqsave(&info->slock, sl_flags);
1286  mxser_change_speed(tty, NULL);
1287  spin_unlock_irqrestore(&info->slock, sl_flags);
1288  }
1289  } else {
1290  retval = mxser_activate(port, tty);
1291  if (retval == 0)
1292  set_bit(ASYNCB_INITIALIZED, &port->flags);
1293  }
1294  return retval;
1295 }
1296 
1297 /*
1298  * mxser_get_lsr_info - get line status register info
1299  *
1300  * Purpose: Let user call ioctl() to get info when the UART physically
1301  * is emptied. On bus types like RS485, the transmitter must
1302  * release the bus after transmitting. This must be done when
1303  * the transmit shift register is empty, not be done when the
1304  * transmit holding register is empty. This functionality
1305  * allows an RS485 driver to be written in user space.
1306  */
1307 static int mxser_get_lsr_info(struct mxser_port *info,
1308  unsigned int __user *value)
1309 {
1310  unsigned char status;
1311  unsigned int result;
1312  unsigned long flags;
1313 
1314  spin_lock_irqsave(&info->slock, flags);
1315  status = inb(info->ioaddr + UART_LSR);
1316  spin_unlock_irqrestore(&info->slock, flags);
1317  result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1318  return put_user(result, value);
1319 }
1320 
1321 static int mxser_tiocmget(struct tty_struct *tty)
1322 {
1323  struct mxser_port *info = tty->driver_data;
1324  unsigned char control, status;
1325  unsigned long flags;
1326 
1327 
1328  if (tty->index == MXSER_PORTS)
1329  return -ENOIOCTLCMD;
1330  if (test_bit(TTY_IO_ERROR, &tty->flags))
1331  return -EIO;
1332 
1333  control = info->MCR;
1334 
1335  spin_lock_irqsave(&info->slock, flags);
1336  status = inb(info->ioaddr + UART_MSR);
1337  if (status & UART_MSR_ANY_DELTA)
1338  mxser_check_modem_status(tty, info, status);
1339  spin_unlock_irqrestore(&info->slock, flags);
1340  return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1341  ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1342  ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1343  ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1344  ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1345  ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1346 }
1347 
1348 static int mxser_tiocmset(struct tty_struct *tty,
1349  unsigned int set, unsigned int clear)
1350 {
1351  struct mxser_port *info = tty->driver_data;
1352  unsigned long flags;
1353 
1354 
1355  if (tty->index == MXSER_PORTS)
1356  return -ENOIOCTLCMD;
1357  if (test_bit(TTY_IO_ERROR, &tty->flags))
1358  return -EIO;
1359 
1360  spin_lock_irqsave(&info->slock, flags);
1361 
1362  if (set & TIOCM_RTS)
1363  info->MCR |= UART_MCR_RTS;
1364  if (set & TIOCM_DTR)
1365  info->MCR |= UART_MCR_DTR;
1366 
1367  if (clear & TIOCM_RTS)
1368  info->MCR &= ~UART_MCR_RTS;
1369  if (clear & TIOCM_DTR)
1370  info->MCR &= ~UART_MCR_DTR;
1371 
1372  outb(info->MCR, info->ioaddr + UART_MCR);
1373  spin_unlock_irqrestore(&info->slock, flags);
1374  return 0;
1375 }
1376 
1377 static int __init mxser_program_mode(int port)
1378 {
1379  int id, i, j, n;
1380 
1381  outb(0, port);
1382  outb(0, port);
1383  outb(0, port);
1384  (void)inb(port);
1385  (void)inb(port);
1386  outb(0, port);
1387  (void)inb(port);
1388 
1389  id = inb(port + 1) & 0x1F;
1390  if ((id != C168_ASIC_ID) &&
1391  (id != C104_ASIC_ID) &&
1392  (id != C102_ASIC_ID) &&
1393  (id != CI132_ASIC_ID) &&
1394  (id != CI134_ASIC_ID) &&
1395  (id != CI104J_ASIC_ID))
1396  return -1;
1397  for (i = 0, j = 0; i < 4; i++) {
1398  n = inb(port + 2);
1399  if (n == 'M') {
1400  j = 1;
1401  } else if ((j == 1) && (n == 1)) {
1402  j = 2;
1403  break;
1404  } else
1405  j = 0;
1406  }
1407  if (j != 2)
1408  id = -2;
1409  return id;
1410 }
1411 
1412 static void __init mxser_normal_mode(int port)
1413 {
1414  int i, n;
1415 
1416  outb(0xA5, port + 1);
1417  outb(0x80, port + 3);
1418  outb(12, port + 0); /* 9600 bps */
1419  outb(0, port + 1);
1420  outb(0x03, port + 3); /* 8 data bits */
1421  outb(0x13, port + 4); /* loop back mode */
1422  for (i = 0; i < 16; i++) {
1423  n = inb(port + 5);
1424  if ((n & 0x61) == 0x60)
1425  break;
1426  if ((n & 1) == 1)
1427  (void)inb(port);
1428  }
1429  outb(0x00, port + 4);
1430 }
1431 
1432 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1433 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1434 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1435 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1436 #define EN_CCMD 0x000 /* Chip's command register */
1437 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1438 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1439 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1440 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1441 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1442 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1443 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1444 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1445 static int __init mxser_read_register(int port, unsigned short *regs)
1446 {
1447  int i, k, value, id;
1448  unsigned int j;
1449 
1450  id = mxser_program_mode(port);
1451  if (id < 0)
1452  return id;
1453  for (i = 0; i < 14; i++) {
1454  k = (i & 0x3F) | 0x180;
1455  for (j = 0x100; j > 0; j >>= 1) {
1456  outb(CHIP_CS, port);
1457  if (k & j) {
1458  outb(CHIP_CS | CHIP_DO, port);
1459  outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1460  } else {
1461  outb(CHIP_CS, port);
1462  outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1463  }
1464  }
1465  (void)inb(port);
1466  value = 0;
1467  for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1468  outb(CHIP_CS, port);
1469  outb(CHIP_CS | CHIP_SK, port);
1470  if (inb(port) & CHIP_DI)
1471  value |= j;
1472  }
1473  regs[i] = value;
1474  outb(0, port);
1475  }
1476  mxser_normal_mode(port);
1477  return id;
1478 }
1479 
1480 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1481 {
1482  struct mxser_port *ip;
1483  struct tty_port *port;
1484  struct tty_struct *tty;
1485  int result, status;
1486  unsigned int i, j;
1487  int ret = 0;
1488 
1489  switch (cmd) {
1490  case MOXA_GET_MAJOR:
1491  printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1492  "%x (GET_MAJOR), fix your userspace\n",
1493  current->comm, cmd);
1494  return put_user(ttymajor, (int __user *)argp);
1495 
1496  case MOXA_CHKPORTENABLE:
1497  result = 0;
1498  for (i = 0; i < MXSER_BOARDS; i++)
1499  for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1500  if (mxser_boards[i].ports[j].ioaddr)
1501  result |= (1 << i);
1502  return put_user(result, (unsigned long __user *)argp);
1503  case MOXA_GETDATACOUNT:
1504  /* The receive side is locked by port->slock but it isn't
1505  clear that an exact snapshot is worth copying here */
1506  if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1507  ret = -EFAULT;
1508  return ret;
1509  case MOXA_GETMSTATUS: {
1510  struct mxser_mstatus ms, __user *msu = argp;
1511  for (i = 0; i < MXSER_BOARDS; i++)
1512  for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1513  ip = &mxser_boards[i].ports[j];
1514  port = &ip->port;
1515  memset(&ms, 0, sizeof(ms));
1516 
1517  mutex_lock(&port->mutex);
1518  if (!ip->ioaddr)
1519  goto copy;
1520 
1521  tty = tty_port_tty_get(port);
1522 
1523  if (!tty)
1524  ms.cflag = ip->normal_termios.c_cflag;
1525  else
1526  ms.cflag = tty->termios.c_cflag;
1527  tty_kref_put(tty);
1528  spin_lock_irq(&ip->slock);
1529  status = inb(ip->ioaddr + UART_MSR);
1530  spin_unlock_irq(&ip->slock);
1531  if (status & UART_MSR_DCD)
1532  ms.dcd = 1;
1533  if (status & UART_MSR_DSR)
1534  ms.dsr = 1;
1535  if (status & UART_MSR_CTS)
1536  ms.cts = 1;
1537  copy:
1538  mutex_unlock(&port->mutex);
1539  if (copy_to_user(msu, &ms, sizeof(ms)))
1540  return -EFAULT;
1541  msu++;
1542  }
1543  return 0;
1544  }
1545  case MOXA_ASPP_MON_EXT: {
1546  struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1547  unsigned int cflag, iflag, p;
1548  u8 opmode;
1549 
1550  me = kzalloc(sizeof(*me), GFP_KERNEL);
1551  if (!me)
1552  return -ENOMEM;
1553 
1554  for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1555  for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1556  if (p >= ARRAY_SIZE(me->rx_cnt)) {
1557  i = MXSER_BOARDS;
1558  break;
1559  }
1560  ip = &mxser_boards[i].ports[j];
1561  port = &ip->port;
1562 
1563  mutex_lock(&port->mutex);
1564  if (!ip->ioaddr) {
1565  mutex_unlock(&port->mutex);
1566  continue;
1567  }
1568 
1569  spin_lock_irq(&ip->slock);
1570  status = mxser_get_msr(ip->ioaddr, 0, p);
1571 
1572  if (status & UART_MSR_TERI)
1573  ip->icount.rng++;
1574  if (status & UART_MSR_DDSR)
1575  ip->icount.dsr++;
1576  if (status & UART_MSR_DDCD)
1577  ip->icount.dcd++;
1578  if (status & UART_MSR_DCTS)
1579  ip->icount.cts++;
1580 
1581  ip->mon_data.modem_status = status;
1582  me->rx_cnt[p] = ip->mon_data.rxcnt;
1583  me->tx_cnt[p] = ip->mon_data.txcnt;
1584  me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
1585  me->up_txcnt[p] = ip->mon_data.up_txcnt;
1586  me->modem_status[p] =
1587  ip->mon_data.modem_status;
1588  spin_unlock_irq(&ip->slock);
1589 
1590  tty = tty_port_tty_get(&ip->port);
1591 
1592  if (!tty) {
1593  cflag = ip->normal_termios.c_cflag;
1594  iflag = ip->normal_termios.c_iflag;
1595  me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
1596  } else {
1597  cflag = tty->termios.c_cflag;
1598  iflag = tty->termios.c_iflag;
1599  me->baudrate[p] = tty_get_baud_rate(tty);
1600  }
1601  tty_kref_put(tty);
1602 
1603  me->databits[p] = cflag & CSIZE;
1604  me->stopbits[p] = cflag & CSTOPB;
1605  me->parity[p] = cflag & (PARENB | PARODD |
1606  CMSPAR);
1607 
1608  if (cflag & CRTSCTS)
1609  me->flowctrl[p] |= 0x03;
1610 
1611  if (iflag & (IXON | IXOFF))
1612  me->flowctrl[p] |= 0x0C;
1613 
1614  if (ip->type == PORT_16550A)
1615  me->fifo[p] = 1;
1616 
1617  opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
1618  opmode &= OP_MODE_MASK;
1619  me->iftype[p] = opmode;
1620  mutex_unlock(&port->mutex);
1621  }
1622  }
1623  if (copy_to_user(argp, me, sizeof(*me)))
1624  ret = -EFAULT;
1625  kfree(me);
1626  return ret;
1627  }
1628  default:
1629  return -ENOIOCTLCMD;
1630  }
1631  return 0;
1632 }
1633 
1634 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1635  struct async_icount *cprev)
1636 {
1637  struct async_icount cnow;
1638  unsigned long flags;
1639  int ret;
1640 
1641  spin_lock_irqsave(&info->slock, flags);
1642  cnow = info->icount; /* atomic copy */
1643  spin_unlock_irqrestore(&info->slock, flags);
1644 
1645  ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1646  ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1647  ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1648  ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1649 
1650  *cprev = cnow;
1651 
1652  return ret;
1653 }
1654 
1655 static int mxser_ioctl(struct tty_struct *tty,
1656  unsigned int cmd, unsigned long arg)
1657 {
1658  struct mxser_port *info = tty->driver_data;
1659  struct tty_port *port = &info->port;
1660  struct async_icount cnow;
1661  unsigned long flags;
1662  void __user *argp = (void __user *)arg;
1663  int retval;
1664 
1665  if (tty->index == MXSER_PORTS)
1666  return mxser_ioctl_special(cmd, argp);
1667 
1668  if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1669  int p;
1670  unsigned long opmode;
1671  static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1672  int shiftbit;
1673  unsigned char val, mask;
1674 
1675  p = tty->index % 4;
1676  if (cmd == MOXA_SET_OP_MODE) {
1677  if (get_user(opmode, (int __user *) argp))
1678  return -EFAULT;
1679  if (opmode != RS232_MODE &&
1680  opmode != RS485_2WIRE_MODE &&
1681  opmode != RS422_MODE &&
1682  opmode != RS485_4WIRE_MODE)
1683  return -EFAULT;
1684  mask = ModeMask[p];
1685  shiftbit = p * 2;
1686  spin_lock_irq(&info->slock);
1687  val = inb(info->opmode_ioaddr);
1688  val &= mask;
1689  val |= (opmode << shiftbit);
1690  outb(val, info->opmode_ioaddr);
1691  spin_unlock_irq(&info->slock);
1692  } else {
1693  shiftbit = p * 2;
1694  spin_lock_irq(&info->slock);
1695  opmode = inb(info->opmode_ioaddr) >> shiftbit;
1696  spin_unlock_irq(&info->slock);
1697  opmode &= OP_MODE_MASK;
1698  if (put_user(opmode, (int __user *)argp))
1699  return -EFAULT;
1700  }
1701  return 0;
1702  }
1703 
1704  if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
1705  test_bit(TTY_IO_ERROR, &tty->flags))
1706  return -EIO;
1707 
1708  switch (cmd) {
1709  case TIOCGSERIAL:
1710  mutex_lock(&port->mutex);
1711  retval = mxser_get_serial_info(tty, argp);
1712  mutex_unlock(&port->mutex);
1713  return retval;
1714  case TIOCSSERIAL:
1715  mutex_lock(&port->mutex);
1716  retval = mxser_set_serial_info(tty, argp);
1717  mutex_unlock(&port->mutex);
1718  return retval;
1719  case TIOCSERGETLSR: /* Get line status register */
1720  return mxser_get_lsr_info(info, argp);
1721  /*
1722  * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1723  * - mask passed in arg for lines of interest
1724  * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1725  * Caller should use TIOCGICOUNT to see which one it was
1726  */
1727  case TIOCMIWAIT:
1728  spin_lock_irqsave(&info->slock, flags);
1729  cnow = info->icount; /* note the counters on entry */
1730  spin_unlock_irqrestore(&info->slock, flags);
1731 
1732  return wait_event_interruptible(info->port.delta_msr_wait,
1733  mxser_cflags_changed(info, arg, &cnow));
1734  case MOXA_HighSpeedOn:
1735  return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1736  case MOXA_SDS_RSTICOUNTER:
1737  spin_lock_irq(&info->slock);
1738  info->mon_data.rxcnt = 0;
1739  info->mon_data.txcnt = 0;
1740  spin_unlock_irq(&info->slock);
1741  return 0;
1742 
1743  case MOXA_ASPP_OQUEUE:{
1744  int len, lsr;
1745 
1746  len = mxser_chars_in_buffer(tty);
1747  spin_lock_irq(&info->slock);
1748  lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
1749  spin_unlock_irq(&info->slock);
1750  len += (lsr ? 0 : 1);
1751 
1752  return put_user(len, (int __user *)argp);
1753  }
1754  case MOXA_ASPP_MON: {
1755  int mcr, status;
1756 
1757  spin_lock_irq(&info->slock);
1758  status = mxser_get_msr(info->ioaddr, 1, tty->index);
1759  mxser_check_modem_status(tty, info, status);
1760 
1761  mcr = inb(info->ioaddr + UART_MCR);
1762  spin_unlock_irq(&info->slock);
1763 
1764  if (mcr & MOXA_MUST_MCR_XON_FLAG)
1765  info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1766  else
1767  info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1768 
1769  if (mcr & MOXA_MUST_MCR_TX_XON)
1770  info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1771  else
1772  info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1773 
1774  if (tty->hw_stopped)
1775  info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1776  else
1777  info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1778 
1779  if (copy_to_user(argp, &info->mon_data,
1780  sizeof(struct mxser_mon)))
1781  return -EFAULT;
1782 
1783  return 0;
1784  }
1785  case MOXA_ASPP_LSTATUS: {
1786  if (put_user(info->err_shadow, (unsigned char __user *)argp))
1787  return -EFAULT;
1788 
1789  info->err_shadow = 0;
1790  return 0;
1791  }
1792  case MOXA_SET_BAUD_METHOD: {
1793  int method;
1794 
1795  if (get_user(method, (int __user *)argp))
1796  return -EFAULT;
1797  mxser_set_baud_method[tty->index] = method;
1798  return put_user(method, (int __user *)argp);
1799  }
1800  default:
1801  return -ENOIOCTLCMD;
1802  }
1803  return 0;
1804 }
1805 
1806  /*
1807  * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1808  * Return: write counters to the user passed counter struct
1809  * NB: both 1->0 and 0->1 transitions are counted except for
1810  * RI where only 0->1 is counted.
1811  */
1812 
1813 static int mxser_get_icount(struct tty_struct *tty,
1814  struct serial_icounter_struct *icount)
1815 
1816 {
1817  struct mxser_port *info = tty->driver_data;
1818  struct async_icount cnow;
1819  unsigned long flags;
1820 
1821  spin_lock_irqsave(&info->slock, flags);
1822  cnow = info->icount;
1823  spin_unlock_irqrestore(&info->slock, flags);
1824 
1825  icount->frame = cnow.frame;
1826  icount->brk = cnow.brk;
1827  icount->overrun = cnow.overrun;
1828  icount->buf_overrun = cnow.buf_overrun;
1829  icount->parity = cnow.parity;
1830  icount->rx = cnow.rx;
1831  icount->tx = cnow.tx;
1832  icount->cts = cnow.cts;
1833  icount->dsr = cnow.dsr;
1834  icount->rng = cnow.rng;
1835  icount->dcd = cnow.dcd;
1836  return 0;
1837 }
1838 
1839 static void mxser_stoprx(struct tty_struct *tty)
1840 {
1841  struct mxser_port *info = tty->driver_data;
1842 
1843  info->ldisc_stop_rx = 1;
1844  if (I_IXOFF(tty)) {
1845  if (info->board->chip_flag) {
1846  info->IER &= ~MOXA_MUST_RECV_ISR;
1847  outb(info->IER, info->ioaddr + UART_IER);
1848  } else {
1849  info->x_char = STOP_CHAR(tty);
1850  outb(0, info->ioaddr + UART_IER);
1851  info->IER |= UART_IER_THRI;
1852  outb(info->IER, info->ioaddr + UART_IER);
1853  }
1854  }
1855 
1856  if (tty->termios.c_cflag & CRTSCTS) {
1857  info->MCR &= ~UART_MCR_RTS;
1858  outb(info->MCR, info->ioaddr + UART_MCR);
1859  }
1860 }
1861 
1862 /*
1863  * This routine is called by the upper-layer tty layer to signal that
1864  * incoming characters should be throttled.
1865  */
1866 static void mxser_throttle(struct tty_struct *tty)
1867 {
1868  mxser_stoprx(tty);
1869 }
1870 
1871 static void mxser_unthrottle(struct tty_struct *tty)
1872 {
1873  struct mxser_port *info = tty->driver_data;
1874 
1875  /* startrx */
1876  info->ldisc_stop_rx = 0;
1877  if (I_IXOFF(tty)) {
1878  if (info->x_char)
1879  info->x_char = 0;
1880  else {
1881  if (info->board->chip_flag) {
1882  info->IER |= MOXA_MUST_RECV_ISR;
1883  outb(info->IER, info->ioaddr + UART_IER);
1884  } else {
1885  info->x_char = START_CHAR(tty);
1886  outb(0, info->ioaddr + UART_IER);
1887  info->IER |= UART_IER_THRI;
1888  outb(info->IER, info->ioaddr + UART_IER);
1889  }
1890  }
1891  }
1892 
1893  if (tty->termios.c_cflag & CRTSCTS) {
1894  info->MCR |= UART_MCR_RTS;
1895  outb(info->MCR, info->ioaddr + UART_MCR);
1896  }
1897 }
1898 
1899 /*
1900  * mxser_stop() and mxser_start()
1901  *
1902  * This routines are called before setting or resetting tty->stopped.
1903  * They enable or disable transmitter interrupts, as necessary.
1904  */
1905 static void mxser_stop(struct tty_struct *tty)
1906 {
1907  struct mxser_port *info = tty->driver_data;
1908  unsigned long flags;
1909 
1910  spin_lock_irqsave(&info->slock, flags);
1911  if (info->IER & UART_IER_THRI) {
1912  info->IER &= ~UART_IER_THRI;
1913  outb(info->IER, info->ioaddr + UART_IER);
1914  }
1915  spin_unlock_irqrestore(&info->slock, flags);
1916 }
1917 
1918 static void mxser_start(struct tty_struct *tty)
1919 {
1920  struct mxser_port *info = tty->driver_data;
1921  unsigned long flags;
1922 
1923  spin_lock_irqsave(&info->slock, flags);
1924  if (info->xmit_cnt && info->port.xmit_buf) {
1925  outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1926  info->IER |= UART_IER_THRI;
1927  outb(info->IER, info->ioaddr + UART_IER);
1928  }
1929  spin_unlock_irqrestore(&info->slock, flags);
1930 }
1931 
1932 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1933 {
1934  struct mxser_port *info = tty->driver_data;
1935  unsigned long flags;
1936 
1937  spin_lock_irqsave(&info->slock, flags);
1938  mxser_change_speed(tty, old_termios);
1939  spin_unlock_irqrestore(&info->slock, flags);
1940 
1941  if ((old_termios->c_cflag & CRTSCTS) &&
1942  !(tty->termios.c_cflag & CRTSCTS)) {
1943  tty->hw_stopped = 0;
1944  mxser_start(tty);
1945  }
1946 
1947  /* Handle sw stopped */
1948  if ((old_termios->c_iflag & IXON) &&
1949  !(tty->termios.c_iflag & IXON)) {
1950  tty->stopped = 0;
1951 
1952  if (info->board->chip_flag) {
1953  spin_lock_irqsave(&info->slock, flags);
1954  mxser_disable_must_rx_software_flow_control(
1955  info->ioaddr);
1956  spin_unlock_irqrestore(&info->slock, flags);
1957  }
1958 
1959  mxser_start(tty);
1960  }
1961 }
1962 
1963 /*
1964  * mxser_wait_until_sent() --- wait until the transmitter is empty
1965  */
1966 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1967 {
1968  struct mxser_port *info = tty->driver_data;
1969  unsigned long orig_jiffies, char_time;
1970  unsigned long flags;
1971  int lsr;
1972 
1973  if (info->type == PORT_UNKNOWN)
1974  return;
1975 
1976  if (info->xmit_fifo_size == 0)
1977  return; /* Just in case.... */
1978 
1979  orig_jiffies = jiffies;
1980  /*
1981  * Set the check interval to be 1/5 of the estimated time to
1982  * send a single character, and make it at least 1. The check
1983  * interval should also be less than the timeout.
1984  *
1985  * Note: we have to use pretty tight timings here to satisfy
1986  * the NIST-PCTS.
1987  */
1988  char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1989  char_time = char_time / 5;
1990  if (char_time == 0)
1991  char_time = 1;
1992  if (timeout && timeout < char_time)
1993  char_time = timeout;
1994  /*
1995  * If the transmitter hasn't cleared in twice the approximate
1996  * amount of time to send the entire FIFO, it probably won't
1997  * ever clear. This assumes the UART isn't doing flow
1998  * control, which is currently the case. Hence, if it ever
1999  * takes longer than info->timeout, this is probably due to a
2000  * UART bug of some kind. So, we clamp the timeout parameter at
2001  * 2*info->timeout.
2002  */
2003  if (!timeout || timeout > 2 * info->timeout)
2004  timeout = 2 * info->timeout;
2005 
2006  spin_lock_irqsave(&info->slock, flags);
2007  while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2008  spin_unlock_irqrestore(&info->slock, flags);
2009  schedule_timeout_interruptible(char_time);
2010  spin_lock_irqsave(&info->slock, flags);
2011  if (signal_pending(current))
2012  break;
2013  if (timeout && time_after(jiffies, orig_jiffies + timeout))
2014  break;
2015  }
2016  spin_unlock_irqrestore(&info->slock, flags);
2017  set_current_state(TASK_RUNNING);
2018 }
2019 
2020 /*
2021  * This routine is called by tty_hangup() when a hangup is signaled.
2022  */
2023 static void mxser_hangup(struct tty_struct *tty)
2024 {
2025  struct mxser_port *info = tty->driver_data;
2026 
2027  mxser_flush_buffer(tty);
2028  tty_port_hangup(&info->port);
2029 }
2030 
2031 /*
2032  * mxser_rs_break() --- routine which turns the break handling on or off
2033  */
2034 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2035 {
2036  struct mxser_port *info = tty->driver_data;
2037  unsigned long flags;
2038 
2039  spin_lock_irqsave(&info->slock, flags);
2040  if (break_state == -1)
2041  outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2042  info->ioaddr + UART_LCR);
2043  else
2044  outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2045  info->ioaddr + UART_LCR);
2046  spin_unlock_irqrestore(&info->slock, flags);
2047  return 0;
2048 }
2049 
2050 static void mxser_receive_chars(struct tty_struct *tty,
2051  struct mxser_port *port, int *status)
2052 {
2053  unsigned char ch, gdl;
2054  int ignored = 0;
2055  int cnt = 0;
2056  int recv_room;
2057  int max = 256;
2058 
2059  recv_room = tty->receive_room;
2060  if (recv_room == 0 && !port->ldisc_stop_rx)
2061  mxser_stoprx(tty);
2062  if (port->board->chip_flag != MOXA_OTHER_UART) {
2063 
2064  if (*status & UART_LSR_SPECIAL)
2065  goto intr_old;
2066  if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2067  (*status & MOXA_MUST_LSR_RERR))
2068  goto intr_old;
2069  if (*status & MOXA_MUST_LSR_RERR)
2070  goto intr_old;
2071 
2072  gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2073 
2074  if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2075  gdl &= MOXA_MUST_GDL_MASK;
2076  if (gdl >= recv_room) {
2077  if (!port->ldisc_stop_rx)
2078  mxser_stoprx(tty);
2079  }
2080  while (gdl--) {
2081  ch = inb(port->ioaddr + UART_RX);
2082  tty_insert_flip_char(tty, ch, 0);
2083  cnt++;
2084  }
2085  goto end_intr;
2086  }
2087 intr_old:
2088 
2089  do {
2090  if (max-- < 0)
2091  break;
2092 
2093  ch = inb(port->ioaddr + UART_RX);
2094  if (port->board->chip_flag && (*status & UART_LSR_OE))
2095  outb(0x23, port->ioaddr + UART_FCR);
2096  *status &= port->read_status_mask;
2097  if (*status & port->ignore_status_mask) {
2098  if (++ignored > 100)
2099  break;
2100  } else {
2101  char flag = 0;
2102  if (*status & UART_LSR_SPECIAL) {
2103  if (*status & UART_LSR_BI) {
2104  flag = TTY_BREAK;
2105  port->icount.brk++;
2106 
2107  if (port->port.flags & ASYNC_SAK)
2108  do_SAK(tty);
2109  } else if (*status & UART_LSR_PE) {
2110  flag = TTY_PARITY;
2111  port->icount.parity++;
2112  } else if (*status & UART_LSR_FE) {
2113  flag = TTY_FRAME;
2114  port->icount.frame++;
2115  } else if (*status & UART_LSR_OE) {
2116  flag = TTY_OVERRUN;
2117  port->icount.overrun++;
2118  } else
2119  flag = TTY_BREAK;
2120  }
2121  tty_insert_flip_char(tty, ch, flag);
2122  cnt++;
2123  if (cnt >= recv_room) {
2124  if (!port->ldisc_stop_rx)
2125  mxser_stoprx(tty);
2126  break;
2127  }
2128 
2129  }
2130 
2131  if (port->board->chip_flag)
2132  break;
2133 
2134  *status = inb(port->ioaddr + UART_LSR);
2135  } while (*status & UART_LSR_DR);
2136 
2137 end_intr:
2138  mxvar_log.rxcnt[tty->index] += cnt;
2139  port->mon_data.rxcnt += cnt;
2140  port->mon_data.up_rxcnt += cnt;
2141 
2142  /*
2143  * We are called from an interrupt context with &port->slock
2144  * being held. Drop it temporarily in order to prevent
2145  * recursive locking.
2146  */
2147  spin_unlock(&port->slock);
2148  tty_flip_buffer_push(tty);
2149  spin_lock(&port->slock);
2150 }
2151 
2152 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2153 {
2154  int count, cnt;
2155 
2156  if (port->x_char) {
2157  outb(port->x_char, port->ioaddr + UART_TX);
2158  port->x_char = 0;
2159  mxvar_log.txcnt[tty->index]++;
2160  port->mon_data.txcnt++;
2161  port->mon_data.up_txcnt++;
2162  port->icount.tx++;
2163  return;
2164  }
2165 
2166  if (port->port.xmit_buf == NULL)
2167  return;
2168 
2169  if (port->xmit_cnt <= 0 || tty->stopped ||
2170  (tty->hw_stopped &&
2171  (port->type != PORT_16550A) &&
2172  (!port->board->chip_flag))) {
2173  port->IER &= ~UART_IER_THRI;
2174  outb(port->IER, port->ioaddr + UART_IER);
2175  return;
2176  }
2177 
2178  cnt = port->xmit_cnt;
2179  count = port->xmit_fifo_size;
2180  do {
2181  outb(port->port.xmit_buf[port->xmit_tail++],
2182  port->ioaddr + UART_TX);
2183  port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2184  if (--port->xmit_cnt <= 0)
2185  break;
2186  } while (--count > 0);
2187  mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2188 
2189  port->mon_data.txcnt += (cnt - port->xmit_cnt);
2190  port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2191  port->icount.tx += (cnt - port->xmit_cnt);
2192 
2193  if (port->xmit_cnt < WAKEUP_CHARS)
2194  tty_wakeup(tty);
2195 
2196  if (port->xmit_cnt <= 0) {
2197  port->IER &= ~UART_IER_THRI;
2198  outb(port->IER, port->ioaddr + UART_IER);
2199  }
2200 }
2201 
2202 /*
2203  * This is the serial driver's generic interrupt routine
2204  */
2205 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2206 {
2207  int status, iir, i;
2208  struct mxser_board *brd = NULL;
2209  struct mxser_port *port;
2210  int max, irqbits, bits, msr;
2211  unsigned int int_cnt, pass_counter = 0;
2212  int handled = IRQ_NONE;
2213  struct tty_struct *tty;
2214 
2215  for (i = 0; i < MXSER_BOARDS; i++)
2216  if (dev_id == &mxser_boards[i]) {
2217  brd = dev_id;
2218  break;
2219  }
2220 
2221  if (i == MXSER_BOARDS)
2222  goto irq_stop;
2223  if (brd == NULL)
2224  goto irq_stop;
2225  max = brd->info->nports;
2226  while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2227  irqbits = inb(brd->vector) & brd->vector_mask;
2228  if (irqbits == brd->vector_mask)
2229  break;
2230 
2231  handled = IRQ_HANDLED;
2232  for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2233  if (irqbits == brd->vector_mask)
2234  break;
2235  if (bits & irqbits)
2236  continue;
2237  port = &brd->ports[i];
2238 
2239  int_cnt = 0;
2240  spin_lock(&port->slock);
2241  do {
2242  iir = inb(port->ioaddr + UART_IIR);
2243  if (iir & UART_IIR_NO_INT)
2244  break;
2245  iir &= MOXA_MUST_IIR_MASK;
2246  tty = tty_port_tty_get(&port->port);
2247  if (!tty ||
2248  (port->port.flags & ASYNC_CLOSING) ||
2249  !(port->port.flags &
2250  ASYNC_INITIALIZED)) {
2251  status = inb(port->ioaddr + UART_LSR);
2252  outb(0x27, port->ioaddr + UART_FCR);
2253  inb(port->ioaddr + UART_MSR);
2254  tty_kref_put(tty);
2255  break;
2256  }
2257 
2258  status = inb(port->ioaddr + UART_LSR);
2259 
2260  if (status & UART_LSR_PE)
2261  port->err_shadow |= NPPI_NOTIFY_PARITY;
2262  if (status & UART_LSR_FE)
2263  port->err_shadow |= NPPI_NOTIFY_FRAMING;
2264  if (status & UART_LSR_OE)
2265  port->err_shadow |=
2266  NPPI_NOTIFY_HW_OVERRUN;
2267  if (status & UART_LSR_BI)
2268  port->err_shadow |= NPPI_NOTIFY_BREAK;
2269 
2270  if (port->board->chip_flag) {
2271  if (iir == MOXA_MUST_IIR_GDA ||
2272  iir == MOXA_MUST_IIR_RDA ||
2273  iir == MOXA_MUST_IIR_RTO ||
2274  iir == MOXA_MUST_IIR_LSR)
2275  mxser_receive_chars(tty, port,
2276  &status);
2277 
2278  } else {
2279  status &= port->read_status_mask;
2280  if (status & UART_LSR_DR)
2281  mxser_receive_chars(tty, port,
2282  &status);
2283  }
2284  msr = inb(port->ioaddr + UART_MSR);
2285  if (msr & UART_MSR_ANY_DELTA)
2286  mxser_check_modem_status(tty, port, msr);
2287 
2288  if (port->board->chip_flag) {
2289  if (iir == 0x02 && (status &
2290  UART_LSR_THRE))
2291  mxser_transmit_chars(tty, port);
2292  } else {
2293  if (status & UART_LSR_THRE)
2294  mxser_transmit_chars(tty, port);
2295  }
2296  tty_kref_put(tty);
2297  } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2298  spin_unlock(&port->slock);
2299  }
2300  }
2301 
2302 irq_stop:
2303  return handled;
2304 }
2305 
2306 static const struct tty_operations mxser_ops = {
2307  .open = mxser_open,
2308  .close = mxser_close,
2309  .write = mxser_write,
2310  .put_char = mxser_put_char,
2311  .flush_chars = mxser_flush_chars,
2312  .write_room = mxser_write_room,
2313  .chars_in_buffer = mxser_chars_in_buffer,
2314  .flush_buffer = mxser_flush_buffer,
2315  .ioctl = mxser_ioctl,
2316  .throttle = mxser_throttle,
2317  .unthrottle = mxser_unthrottle,
2318  .set_termios = mxser_set_termios,
2319  .stop = mxser_stop,
2320  .start = mxser_start,
2321  .hangup = mxser_hangup,
2322  .break_ctl = mxser_rs_break,
2323  .wait_until_sent = mxser_wait_until_sent,
2324  .tiocmget = mxser_tiocmget,
2325  .tiocmset = mxser_tiocmset,
2326  .get_icount = mxser_get_icount,
2327 };
2328 
2329 static struct tty_port_operations mxser_port_ops = {
2330  .carrier_raised = mxser_carrier_raised,
2331  .dtr_rts = mxser_dtr_rts,
2332  .activate = mxser_activate,
2333  .shutdown = mxser_shutdown_port,
2334 };
2335 
2336 /*
2337  * The MOXA Smartio/Industio serial driver boot-time initialization code!
2338  */
2339 
2340 static bool allow_overlapping_vector;
2341 module_param(allow_overlapping_vector, bool, S_IRUGO);
2342 MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)");
2343 
2344 static bool mxser_overlapping_vector(struct mxser_board *brd)
2345 {
2346  return allow_overlapping_vector &&
2347  brd->vector >= brd->ports[0].ioaddr &&
2348  brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports;
2349 }
2350 
2351 static int mxser_request_vector(struct mxser_board *brd)
2352 {
2353  if (mxser_overlapping_vector(brd))
2354  return 0;
2355  return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO;
2356 }
2357 
2358 static void mxser_release_vector(struct mxser_board *brd)
2359 {
2360  if (mxser_overlapping_vector(brd))
2361  return;
2362  release_region(brd->vector, 1);
2363 }
2364 
2365 static void mxser_release_ISA_res(struct mxser_board *brd)
2366 {
2367  free_irq(brd->irq, brd);
2368  release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2369  mxser_release_vector(brd);
2370 }
2371 
2372 static int __devinit mxser_initbrd(struct mxser_board *brd,
2373  struct pci_dev *pdev)
2374 {
2375  struct mxser_port *info;
2376  unsigned int i;
2377  int retval;
2378 
2379  printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2380  brd->ports[0].max_baud);
2381 
2382  for (i = 0; i < brd->info->nports; i++) {
2383  info = &brd->ports[i];
2384  tty_port_init(&info->port);
2385  info->port.ops = &mxser_port_ops;
2386  info->board = brd;
2387  info->stop_rx = 0;
2388  info->ldisc_stop_rx = 0;
2389 
2390  /* Enhance mode enabled here */
2391  if (brd->chip_flag != MOXA_OTHER_UART)
2392  mxser_enable_must_enchance_mode(info->ioaddr);
2393 
2394  info->port.flags = ASYNC_SHARE_IRQ;
2395  info->type = brd->uart_type;
2396 
2397  process_txrx_fifo(info);
2398 
2399  info->custom_divisor = info->baud_base * 16;
2400  info->port.close_delay = 5 * HZ / 10;
2401  info->port.closing_wait = 30 * HZ;
2402  info->normal_termios = mxvar_sdriver->init_termios;
2403  memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2404  info->err_shadow = 0;
2405  spin_lock_init(&info->slock);
2406 
2407  /* before set INT ISR, disable all int */
2408  outb(inb(info->ioaddr + UART_IER) & 0xf0,
2409  info->ioaddr + UART_IER);
2410  }
2411 
2412  retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2413  brd);
2414  if (retval)
2415  printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2416  "conflict with another device.\n",
2417  brd->info->name, brd->irq);
2418 
2419  return retval;
2420 }
2421 
2422 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2423 {
2424  int id, i, bits, ret;
2425  unsigned short regs[16], irq;
2426  unsigned char scratch, scratch2;
2427 
2428  brd->chip_flag = MOXA_OTHER_UART;
2429 
2430  id = mxser_read_register(cap, regs);
2431  switch (id) {
2432  case C168_ASIC_ID:
2433  brd->info = &mxser_cards[0];
2434  break;
2435  case C104_ASIC_ID:
2436  brd->info = &mxser_cards[1];
2437  break;
2438  case CI104J_ASIC_ID:
2439  brd->info = &mxser_cards[2];
2440  break;
2441  case C102_ASIC_ID:
2442  brd->info = &mxser_cards[5];
2443  break;
2444  case CI132_ASIC_ID:
2445  brd->info = &mxser_cards[6];
2446  break;
2447  case CI134_ASIC_ID:
2448  brd->info = &mxser_cards[7];
2449  break;
2450  default:
2451  return 0;
2452  }
2453 
2454  irq = 0;
2455  /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2456  Flag-hack checks if configuration should be read as 2-port here. */
2457  if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2458  irq = regs[9] & 0xF000;
2459  irq = irq | (irq >> 4);
2460  if (irq != (regs[9] & 0xFF00))
2461  goto err_irqconflict;
2462  } else if (brd->info->nports == 4) {
2463  irq = regs[9] & 0xF000;
2464  irq = irq | (irq >> 4);
2465  irq = irq | (irq >> 8);
2466  if (irq != regs[9])
2467  goto err_irqconflict;
2468  } else if (brd->info->nports == 8) {
2469  irq = regs[9] & 0xF000;
2470  irq = irq | (irq >> 4);
2471  irq = irq | (irq >> 8);
2472  if ((irq != regs[9]) || (irq != regs[10]))
2473  goto err_irqconflict;
2474  }
2475 
2476  if (!irq) {
2477  printk(KERN_ERR "mxser: interrupt number unset\n");
2478  return -EIO;
2479  }
2480  brd->irq = ((int)(irq & 0xF000) >> 12);
2481  for (i = 0; i < 8; i++)
2482  brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2483  if ((regs[12] & 0x80) == 0) {
2484  printk(KERN_ERR "mxser: invalid interrupt vector\n");
2485  return -EIO;
2486  }
2487  brd->vector = (int)regs[11]; /* interrupt vector */
2488  if (id == 1)
2489  brd->vector_mask = 0x00FF;
2490  else
2491  brd->vector_mask = 0x000F;
2492  for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2493  if (regs[12] & bits) {
2494  brd->ports[i].baud_base = 921600;
2495  brd->ports[i].max_baud = 921600;
2496  } else {
2497  brd->ports[i].baud_base = 115200;
2498  brd->ports[i].max_baud = 115200;
2499  }
2500  }
2501  scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2502  outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2503  outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2504  outb(scratch2, cap + UART_LCR);
2505  outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2506  scratch = inb(cap + UART_IIR);
2507 
2508  if (scratch & 0xC0)
2509  brd->uart_type = PORT_16550A;
2510  else
2511  brd->uart_type = PORT_16450;
2512  if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2513  "mxser(IO)")) {
2514  printk(KERN_ERR "mxser: can't request ports I/O region: "
2515  "0x%.8lx-0x%.8lx\n",
2516  brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2517  8 * brd->info->nports - 1);
2518  return -EIO;
2519  }
2520 
2521  ret = mxser_request_vector(brd);
2522  if (ret) {
2523  release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2524  printk(KERN_ERR "mxser: can't request interrupt vector region: "
2525  "0x%.8lx-0x%.8lx\n",
2526  brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2527  8 * brd->info->nports - 1);
2528  return ret;
2529  }
2530  return brd->info->nports;
2531 
2532 err_irqconflict:
2533  printk(KERN_ERR "mxser: invalid interrupt number\n");
2534  return -EIO;
2535 }
2536 
2537 static int __devinit mxser_probe(struct pci_dev *pdev,
2538  const struct pci_device_id *ent)
2539 {
2540 #ifdef CONFIG_PCI
2541  struct mxser_board *brd;
2542  unsigned int i, j;
2543  unsigned long ioaddress;
2544  int retval = -EINVAL;
2545 
2546  for (i = 0; i < MXSER_BOARDS; i++)
2547  if (mxser_boards[i].info == NULL)
2548  break;
2549 
2550  if (i >= MXSER_BOARDS) {
2551  dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2552  "not configured\n", MXSER_BOARDS);
2553  goto err;
2554  }
2555 
2556  brd = &mxser_boards[i];
2557  brd->idx = i * MXSER_PORTS_PER_BOARD;
2558  dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2559  mxser_cards[ent->driver_data].name,
2560  pdev->bus->number, PCI_SLOT(pdev->devfn));
2561 
2562  retval = pci_enable_device(pdev);
2563  if (retval) {
2564  dev_err(&pdev->dev, "PCI enable failed\n");
2565  goto err;
2566  }
2567 
2568  /* io address */
2569  ioaddress = pci_resource_start(pdev, 2);
2570  retval = pci_request_region(pdev, 2, "mxser(IO)");
2571  if (retval)
2572  goto err_dis;
2573 
2574  brd->info = &mxser_cards[ent->driver_data];
2575  for (i = 0; i < brd->info->nports; i++)
2576  brd->ports[i].ioaddr = ioaddress + 8 * i;
2577 
2578  /* vector */
2579  ioaddress = pci_resource_start(pdev, 3);
2580  retval = pci_request_region(pdev, 3, "mxser(vector)");
2581  if (retval)
2582  goto err_zero;
2583  brd->vector = ioaddress;
2584 
2585  /* irq */
2586  brd->irq = pdev->irq;
2587 
2588  brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2589  brd->uart_type = PORT_16550A;
2590  brd->vector_mask = 0;
2591 
2592  for (i = 0; i < brd->info->nports; i++) {
2593  for (j = 0; j < UART_INFO_NUM; j++) {
2594  if (Gpci_uart_info[j].type == brd->chip_flag) {
2595  brd->ports[i].max_baud =
2596  Gpci_uart_info[j].max_baud;
2597 
2598  /* exception....CP-102 */
2599  if (brd->info->flags & MXSER_HIGHBAUD)
2600  brd->ports[i].max_baud = 921600;
2601  break;
2602  }
2603  }
2604  }
2605 
2606  if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2607  for (i = 0; i < brd->info->nports; i++) {
2608  if (i < 4)
2609  brd->ports[i].opmode_ioaddr = ioaddress + 4;
2610  else
2611  brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2612  }
2613  outb(0, ioaddress + 4); /* default set to RS232 mode */
2614  outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2615  }
2616 
2617  for (i = 0; i < brd->info->nports; i++) {
2618  brd->vector_mask |= (1 << i);
2619  brd->ports[i].baud_base = 921600;
2620  }
2621 
2622  /* mxser_initbrd will hook ISR. */
2623  retval = mxser_initbrd(brd, pdev);
2624  if (retval)
2625  goto err_rel3;
2626 
2627  for (i = 0; i < brd->info->nports; i++)
2628  tty_port_register_device(&brd->ports[i].port, mxvar_sdriver,
2629  brd->idx + i, &pdev->dev);
2630 
2631  pci_set_drvdata(pdev, brd);
2632 
2633  return 0;
2634 err_rel3:
2635  pci_release_region(pdev, 3);
2636 err_zero:
2637  brd->info = NULL;
2638  pci_release_region(pdev, 2);
2639 err_dis:
2640  pci_disable_device(pdev);
2641 err:
2642  return retval;
2643 #else
2644  return -ENODEV;
2645 #endif
2646 }
2647 
2648 static void __devexit mxser_remove(struct pci_dev *pdev)
2649 {
2650 #ifdef CONFIG_PCI
2651  struct mxser_board *brd = pci_get_drvdata(pdev);
2652  unsigned int i;
2653 
2654  for (i = 0; i < brd->info->nports; i++)
2655  tty_unregister_device(mxvar_sdriver, brd->idx + i);
2656 
2657  free_irq(pdev->irq, brd);
2658  pci_release_region(pdev, 2);
2659  pci_release_region(pdev, 3);
2660  pci_disable_device(pdev);
2661  brd->info = NULL;
2662 #endif
2663 }
2664 
2665 static struct pci_driver mxser_driver = {
2666  .name = "mxser",
2667  .id_table = mxser_pcibrds,
2668  .probe = mxser_probe,
2669  .remove = __devexit_p(mxser_remove)
2670 };
2671 
2672 static int __init mxser_module_init(void)
2673 {
2674  struct mxser_board *brd;
2675  unsigned int b, i, m;
2676  int retval;
2677 
2678  mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2679  if (!mxvar_sdriver)
2680  return -ENOMEM;
2681 
2682  printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2683  MXSER_VERSION);
2684 
2685  /* Initialize the tty_driver structure */
2686  mxvar_sdriver->name = "ttyMI";
2687  mxvar_sdriver->major = ttymajor;
2688  mxvar_sdriver->minor_start = 0;
2689  mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2690  mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2691  mxvar_sdriver->init_termios = tty_std_termios;
2692  mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2693  mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2694  tty_set_operations(mxvar_sdriver, &mxser_ops);
2695 
2696  retval = tty_register_driver(mxvar_sdriver);
2697  if (retval) {
2698  printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2699  "tty driver !\n");
2700  goto err_put;
2701  }
2702 
2703  /* Start finding ISA boards here */
2704  for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2705  if (!ioaddr[b])
2706  continue;
2707 
2708  brd = &mxser_boards[m];
2709  retval = mxser_get_ISA_conf(ioaddr[b], brd);
2710  if (retval <= 0) {
2711  brd->info = NULL;
2712  continue;
2713  }
2714 
2715  printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2716  brd->info->name, ioaddr[b]);
2717 
2718  /* mxser_initbrd will hook ISR. */
2719  if (mxser_initbrd(brd, NULL) < 0) {
2720  brd->info = NULL;
2721  continue;
2722  }
2723 
2724  brd->idx = m * MXSER_PORTS_PER_BOARD;
2725  for (i = 0; i < brd->info->nports; i++)
2726  tty_port_register_device(&brd->ports[i].port,
2727  mxvar_sdriver, brd->idx + i, NULL);
2728 
2729  m++;
2730  }
2731 
2732  retval = pci_register_driver(&mxser_driver);
2733  if (retval) {
2734  printk(KERN_ERR "mxser: can't register pci driver\n");
2735  if (!m) {
2736  retval = -ENODEV;
2737  goto err_unr;
2738  } /* else: we have some ISA cards under control */
2739  }
2740 
2741  return 0;
2742 err_unr:
2743  tty_unregister_driver(mxvar_sdriver);
2744 err_put:
2745  put_tty_driver(mxvar_sdriver);
2746  return retval;
2747 }
2748 
2749 static void __exit mxser_module_exit(void)
2750 {
2751  unsigned int i, j;
2752 
2753  pci_unregister_driver(&mxser_driver);
2754 
2755  for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2756  if (mxser_boards[i].info != NULL)
2757  for (j = 0; j < mxser_boards[i].info->nports; j++)
2758  tty_unregister_device(mxvar_sdriver,
2759  mxser_boards[i].idx + j);
2760  tty_unregister_driver(mxvar_sdriver);
2761  put_tty_driver(mxvar_sdriver);
2762 
2763  for (i = 0; i < MXSER_BOARDS; i++)
2764  if (mxser_boards[i].info != NULL)
2765  mxser_release_ISA_res(&mxser_boards[i]);
2766 }
2767 
2768 module_init(mxser_module_init);
2769 module_exit(mxser_module_exit);
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