#include "AArch64.h"
#include "AArch64InstrInfo.h"
#include "AArch64MachineFunctionInfo.h"
#include "AArch64Subtarget.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"

Include dependency graph for AArch64CollectLOH.cpp:

Namespaces
namespace	llvm
	List of target independent CodeGen pass IDs.
Defines
#define	DEBUG_TYPE "aarch64-collect-loh"
Functions
	STATISTIC (NumADRPSimpleCandidate,"Number of simplifiable ADRP dominate by another")
	STATISTIC (NumADRPComplexCandidate2,"Number of simplifiable ADRP reachable by 2 defs")
	STATISTIC (NumADRPComplexCandidate3,"Number of simplifiable ADRP reachable by 3 defs")
	STATISTIC (NumADRPComplexCandidateOther,"Number of simplifiable ADRP reachable by 4 or more defs")
	STATISTIC (NumADDToSTRWithImm,"Number of simplifiable STR with imm reachable by ADD")
	STATISTIC (NumLDRToSTRWithImm,"Number of simplifiable STR with imm reachable by LDR")
	STATISTIC (NumADDToSTR,"Number of simplifiable STR reachable by ADD")
	STATISTIC (NumLDRToSTR,"Number of simplifiable STR reachable by LDR")
	STATISTIC (NumADDToLDRWithImm,"Number of simplifiable LDR with imm reachable by ADD")
	STATISTIC (NumLDRToLDRWithImm,"Number of simplifiable LDR with imm reachable by LDR")
	STATISTIC (NumADDToLDR,"Number of simplifiable LDR reachable by ADD")
	STATISTIC (NumLDRToLDR,"Number of simplifiable LDR reachable by LDR")
	STATISTIC (NumADRPToLDR,"Number of simplifiable LDR reachable by ADRP")
	STATISTIC (NumCplxLvl1,"Number of complex case of level 1")
	STATISTIC (NumTooCplxLvl1,"Number of too complex case of level 1")
	STATISTIC (NumCplxLvl2,"Number of complex case of level 2")
	STATISTIC (NumTooCplxLvl2,"Number of too complex case of level 2")
	STATISTIC (NumADRSimpleCandidate,"Number of simplifiable ADRP + ADD")
	STATISTIC (NumADRComplexCandidate,"Number of too complex ADRP + ADD")
void	llvm::initializeAArch64CollectLOHPass (PassRegistry &)
	INITIALIZE_PASS_BEGIN (AArch64CollectLOH,"aarch64-collect-loh","AArch64 Collect Linker Optimization Hint (LOH)", false, false) INITIALIZE_PASS_END(AArch64CollectLOH
aarch64 collect AArch64 Collect Linker Optimization	Hint (LOH)"
aarch64 collect AArch64 Collect Linker Optimization static false SetOfMachineInstr &	getSet (BlockToSetOfInstrsPerColor &sets, const MachineBasicBlock &MBB, unsigned reg, unsigned nbRegs)
static SetOfMachineInstr &	getUses (InstrToInstrs *sets, unsigned reg, const MachineInstr &MI)
static const SetOfMachineInstr *	getUses (const InstrToInstrs *sets, unsigned reg, const MachineInstr &MI)
static void	initReachingDef (MachineFunction &MF, InstrToInstrs ColorOpToReachedUses, BlockToInstrPerColor &Gen, BlockToRegSet &Kill, BlockToSetOfInstrsPerColor &ReachableUses, const MapRegToId &RegToId, const MachineInstr DummyOp, bool ADRPMode)
static void	reachingDefAlgorithm (MachineFunction &MF, InstrToInstrs *ColorOpToReachedUses, BlockToSetOfInstrsPerColor &In, BlockToSetOfInstrsPerColor &Out, BlockToInstrPerColor &Gen, BlockToRegSet &Kill, BlockToSetOfInstrsPerColor &ReachableUses, unsigned NbReg)
static void	reachingDef (MachineFunction &MF, InstrToInstrs ColorOpToReachedUses, const MapRegToId &RegToId, bool ADRPMode=false, const MachineInstr DummyOp=nullptr)
static void	printReachingDef (const InstrToInstrs ColorOpToReachedUses, unsigned NbReg, const TargetRegisterInfo TRI, const MapIdToReg &IdToReg)
	print the result of the reaching definition algorithm.
static bool	canDefBePartOfLOH (const MachineInstr *Def)
static bool	isCandidateStore (const MachineInstr *Instr)
static void	reachedUsesToDefs (InstrToInstrs &UseToReachingDefs, const InstrToInstrs *ColorOpToReachedUses, const MapRegToId &RegToId, bool ADRPMode=false)
static void	computeADRP (const InstrToInstrs &UseToDefs, AArch64FunctionInfo &AArch64FI, const MachineDominatorTree *MDT)
static bool	isCandidateLoad (const MachineInstr *Instr)
static bool	supportLoadFromLiteral (const MachineInstr *Instr)
	Check whether the given instruction can load a litteral.
static bool	isCandidate (const MachineInstr Instr, const InstrToInstrs &UseToDefs, const MachineDominatorTree MDT)
static bool	registerADRCandidate (const MachineInstr &Use, const InstrToInstrs &UseToDefs, const InstrToInstrs DefsPerColorToUses, AArch64FunctionInfo &AArch64FI, SetOfMachineInstr InvolvedInLOHs, const MapRegToId &RegToId)
static void	computeOthers (const InstrToInstrs &UseToDefs, const InstrToInstrs DefsPerColorToUses, AArch64FunctionInfo &AArch64FI, const MapRegToId &RegToId, const MachineDominatorTree MDT)
static void	collectInvolvedReg (MachineFunction &MF, MapRegToId &RegToId, MapIdToReg &IdToReg, const TargetRegisterInfo *TRI)
Variables
static cl::opt< bool >	PreCollectRegister ("aarch64-collect-loh-pre-collect-register", cl::Hidden, cl::desc("Restrict analysis to registers invovled"" in LOHs"), cl::init(true))
static cl::opt< bool >	BasicBlockScopeOnly ("aarch64-collect-loh-bb-only", cl::Hidden, cl::desc("Restrict analysis at basic block scope"), cl::init(true))
aarch64 collect	loh
aarch64 collect AArch64 Collect Linker Optimization	false

Define Documentation

#define DEBUG_TYPE "aarch64-collect-loh"

Definition at line 126 of file AArch64CollectLOH.cpp.

Function Documentation

static bool canDefBePartOfLOH ( const MachineInstr * Def ) [static]

Answer the following question: Can Def be one of the definition involved in a part of a LOH?

Definition at line 490 of file AArch64CollectLOH.cpp.

References llvm::AArch64ISD::ADRP, llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getType(), llvm::MachineOperand::MO_BlockAddress, llvm::MachineOperand::MO_ConstantPoolIndex, llvm::MachineOperand::MO_GlobalAddress, and llvm::MachineOperand::MO_JumpTableIndex.

Referenced by collectInvolvedReg(), and reachedUsesToDefs().

static void collectInvolvedReg	(	MachineFunction &	MF,
		MapRegToId &	RegToId,
		MapIdToReg &	IdToReg,
		const TargetRegisterInfo *	TRI
	)		`[static]`

Look for every register defined by potential LOHs candidates. Map these registers with dense id in RegToId and vice-versa in IdToReg. IdToReg is populated only in DEBUG mode.

Definition at line 988 of file AArch64CollectLOH.cpp.

References canDefBePartOfLOH(), llvm::dbgs(), DEBUG, llvm::MCRegisterInfo::getNumRegs(), llvm::MCRegAliasIterator::isValid(), llvm::AArch64CC::MI, and PreCollectRegister.

static void computeADRP	(	const InstrToInstrs &	UseToDefs,
		AArch64FunctionInfo &	AArch64FI,
		const MachineDominatorTree *	MDT
	)		`[static]`

Based on the use to defs information (in ADRPMode), compute the opportunities of LOH ADRP-related.

Definition at line 601 of file AArch64CollectLOH.cpp.

References llvm::AArch64FunctionInfo::addLOHDirective(), llvm::dbgs(), DEBUG, llvm::MachineDominatorTree::dominates(), llvm::MCLOH_AdrpAdrp, and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().

static void computeOthers	(	const InstrToInstrs &	UseToDefs,
		const InstrToInstrs *	DefsPerColorToUses,
		AArch64FunctionInfo &	AArch64FI,
		const MapRegToId &	RegToId,
		const MachineDominatorTree *	MDT
	)		`[static]`

Based on the use to defs information (in non-ADRPMode), compute the opportunities of LOH non-ADRP-related

Definition at line 767 of file AArch64CollectLOH.cpp.

References llvm::AArch64FunctionInfo::addLOHDirective(), llvm::AArch64ISD::ADRP, llvm::dbgs(), DEBUG, llvm::tgtok::Def, llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getTargetFlags(), getUses(), isCandidate(), isCandidateLoad(), llvm::MCLOH_AdrpAddLdr, llvm::MCLOH_AdrpAddStr, llvm::MCLOH_AdrpLdr, llvm::MCLOH_AdrpLdrGotLdr, llvm::MCLOH_AdrpLdrGotStr, llvm::AArch64CC::MI, llvm::AArch64II::MO_GOT, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), registerADRCandidate(), supportLoadFromLiteral(), and Users.

aarch64 collect AArch64 Collect Linker Optimization static false SetOfMachineInstr& getSet	(	BlockToSetOfInstrsPerColor &	sets,
		const MachineBasicBlock &	MBB,
		unsigned	reg,
		unsigned	nbRegs
	)		`[static]`

Given a couple (MBB, reg) get the corresponding set of instruction from the given "sets". If this couple does not reference any set, an empty set is added to "sets" for this couple and returned.

Parameters:

nbRegs is used internally allocate some memory. It must be consistent with the way sets is used.

Definition at line 236 of file AArch64CollectLOH.cpp.

Referenced by initReachingDef(), and reachingDefAlgorithm().

static SetOfMachineInstr& getUses	(	InstrToInstrs *	sets,
		unsigned	reg,
		const MachineInstr &	MI
	)		`[static]`

Given a couple (reg, MI) get the corresponding set of instructions from the the given "sets". This is used to get the uses record in sets of a definition identified by MI and reg, i.e., MI defines reg. If the couple does not reference anything, an empty set is added to "sets[reg]".

Precondition:: set[reg] is valid.

Definition at line 256 of file AArch64CollectLOH.cpp.

References llvm::AArch64CC::MI.

Referenced by computeOthers(), initReachingDef(), reachingDefAlgorithm(), and registerADRCandidate().

static const SetOfMachineInstr* getUses	(	const InstrToInstrs *	sets,
		unsigned	reg,
		const MachineInstr &	MI
	)		`[static]`

Same as getUses but does not modify the input map: sets.

Returns:: NULL if the couple (reg, MI) is not in sets.

Definition at line 263 of file AArch64CollectLOH.cpp.

References llvm::sys::path::end().

aarch64 collect AArch64 Collect Linker Optimization Hint ( LOH )

Referenced by llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), llvm::MachineRegisterInfo::getSimpleHint(), llvm::VirtRegMap::hasKnownPreference(), llvm::VirtRegMap::hasPreferredPhys(), LowerINTRINSIC_W_CHAIN(), and llvm::ARMBaseRegisterInfo::UpdateRegAllocHint().

INITIALIZE_PASS_BEGIN	(	AArch64CollectLOH	,
		"aarch64-collect-loh"	,
		"AArch64 Collect Linker Optimization Hint (LOH)"	,
		false	,
		false
	)

static void initReachingDef	(	MachineFunction &	MF,
		InstrToInstrs *	ColorOpToReachedUses,
		BlockToInstrPerColor &	Gen,
		BlockToRegSet &	Kill,
		BlockToSetOfInstrsPerColor &	ReachableUses,
		const MapRegToId &	RegToId,
		const MachineInstr *	DummyOp,
		bool	ADRPMode
	)		`[static]`

Initialize the reaching definition algorithm: For each basic block BB in MF, record:

its kill set.
its reachable uses (uses that are exposed to BB's predecessors).

its the generated definitions.

Parameters:

DummyOp	if not NULL, specifies a Dummy Operation to be added to the list of uses of exposed defintions.
ADRPMode	specifies to only consider ADRP instructions for generated definition. It also consider definitions of ADRP instructions as uses and ignore other uses. The ADRPMode is used to collect the information for LHO that involve ADRP operation only.

Definition at line 282 of file AArch64CollectLOH.cpp.

References llvm::AArch64ISD::ADRP, llvm::MachineOperand::clobbersPhysReg(), llvm::TargetSubtargetInfo::getRegisterInfo(), getSet(), llvm::TargetMachine::getSubtargetImpl(), llvm::MachineFunction::getTarget(), getUses(), llvm::MCRegAliasIterator::isValid(), llvm::AArch64CC::MI, llvm::BitVector::resize(), and llvm::SystemZISD::TM.

Referenced by reachingDef().

static bool isCandidate	(	const MachineInstr *	Instr,
		const InstrToInstrs &	UseToDefs,
		const MachineDominatorTree *	MDT
	)		`[static]`

Check whether the given instruction is a LOH candidate.

Parameters:

UseToDefs is used to check that Instr is at the end of LOH supported chain.

Precondition:: UseToDefs contains only on def per use, i.e., obvious non candidate are already been filtered out.

Definition at line 685 of file AArch64CollectLOH.cpp.

References llvm::AArch64ISD::ADRP, llvm::tgtok::Def, llvm::MachineDominatorTree::dominates(), llvm::MachineInstr::getOpcode(), isCandidateLoad(), and isCandidateStore().

Referenced by computeOthers().

static bool isCandidateLoad ( const MachineInstr * Instr ) [static]

Check whether the given instruction can be the end of a LOH chain involving a load.

Definition at line 639 of file AArch64CollectLOH.cpp.

References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getTargetFlags(), and llvm::AArch64II::MO_GOT.

Referenced by computeOthers(), and isCandidate().

static bool isCandidateStore ( const MachineInstr * Instr ) [static]

Check whether the given instruction can the end of a LOH chain involving a store.

Definition at line 524 of file AArch64CollectLOH.cpp.

References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::getReg().

Referenced by isCandidate(), and reachedUsesToDefs().

static void printReachingDef	(	const InstrToInstrs *	ColorOpToReachedUses,
		unsigned	NbReg,
		const TargetRegisterInfo *	TRI,
		const MapIdToReg &	IdToReg
	)		`[static]`

print the result of the reaching definition algorithm.

Definition at line 467 of file AArch64CollectLOH.cpp.

References llvm::dbgs(), DEBUG, llvm::AArch64CC::MI, and llvm::MachineInstr::print().

static void reachedUsesToDefs	(	InstrToInstrs &	UseToReachingDefs,
		const InstrToInstrs *	ColorOpToReachedUses,
		const MapRegToId &	RegToId,
		bool	ADRPMode = `false`
	)		`[static]`

Given the result of a reaching definition algorithm in ColorOpToReachedUses, Build the Use to Defs information and filter out obvious non-LOH candidates. In ADRPMode, non-LOH candidates are "uses" with non-ADRP definitions. In non-ADRPMode, non-LOH candidates are "uses" with several definition, i.e., no simple chain.

Parameters:

ADRPMode --

See also:: initReachingDef.

Definition at line 550 of file AArch64CollectLOH.cpp.

References llvm::AArch64ISD::ADRP, canDefBePartOfLOH(), llvm::dbgs(), DEBUG, llvm::tgtok::Def, llvm::MachineInstr::getOpcode(), getReg(), isCandidateStore(), and llvm::AArch64CC::MI.

static void reachingDef	(	MachineFunction &	MF,
		InstrToInstrs *	ColorOpToReachedUses,
		const MapRegToId &	RegToId,
		bool	ADRPMode = `false`,
		const MachineInstr *	DummyOp = `nullptr`
	)		`[static]`

Reaching definition algorithm.

Parameters:

	MF	function on which the algorithm will operate.
[out]	ColorOpToReachedUses	will contain the result of the reaching def algorithm.
	ADRPMode	specify whether the reaching def algorithm should be tuned for ADRP optimization.

See also:: initReachingDef for more details.

Parameters:

DummyOp if not NULL, the algorithm will work at basic block scope and will set for every exposed definition a use to DummyOp.

Precondition:: ColorOpToReachedUses is an array of at least number of registers of InstrToInstrs.

Definition at line 438 of file AArch64CollectLOH.cpp.

References llvm::tgtok::In, initReachingDef(), llvm::RegState::Kill, reachingDefAlgorithm(), and llvm::MachineFunction::size().

static void reachingDefAlgorithm	(	MachineFunction &	MF,
		InstrToInstrs *	ColorOpToReachedUses,
		BlockToSetOfInstrsPerColor &	In,
		BlockToSetOfInstrsPerColor &	Out,
		BlockToInstrPerColor &	Gen,
		BlockToRegSet &	Kill,
		BlockToSetOfInstrsPerColor &	ReachableUses,
		unsigned	NbReg
	)		`[static]`

Reaching def core algorithm: while an Out has changed for each bb for each color In[bb][color] = U Out[bb.predecessors][color] insert reachableUses[bb][color] in each in[bb][color] op.reachedUses

Out[bb] = Gen[bb] U (In[bb] - Kill[bb])

Definition at line 387 of file AArch64CollectLOH.cpp.

References getSet(), getUses(), llvm::AArch64CC::MI, and llvm::MachineBasicBlock::predecessors().

Referenced by reachingDef().

static bool registerADRCandidate	(	const MachineInstr &	Use,
		const InstrToInstrs &	UseToDefs,
		const InstrToInstrs *	DefsPerColorToUses,
		AArch64FunctionInfo &	AArch64FI,
		SetOfMachineInstr *	InvolvedInLOHs,
		const MapRegToId &	RegToId
	)		`[static]`

Definition at line 720 of file AArch64CollectLOH.cpp.

References llvm::AArch64FunctionInfo::addLOHDirective(), llvm::AArch64ISD::ADRP, llvm::dbgs(), DEBUG, llvm::tgtok::Def, llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getTargetFlags(), getUses(), llvm::MCLOH_AdrpAdd, llvm::MCLOH_AdrpLdrGot, llvm::AArch64II::MO_GOT, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and Users.

Referenced by computeOthers().

STATISTIC	(	NumADRPSimpleCandidate	,
		"Number of simplifiable ADRP dominate by another"
	)

STATISTIC	(	NumADRPComplexCandidate2	,
		"Number of simplifiable ADRP reachable by 2 defs"
	)

STATISTIC	(	NumADRPComplexCandidate3	,
		"Number of simplifiable ADRP reachable by 3 defs"
	)

STATISTIC	(	NumADRPComplexCandidateOther	,
		"Number of simplifiable ADRP reachable by 4 or more defs"
	)

STATISTIC	(	NumADDToSTRWithImm	,
		"Number of simplifiable STR with imm reachable by ADD"
	)

STATISTIC	(	NumLDRToSTRWithImm	,
		"Number of simplifiable STR with imm reachable by LDR"
	)

STATISTIC	(	NumADDToSTR	,
		"Number of simplifiable STR reachable by ADD"
	)

STATISTIC	(	NumLDRToSTR	,
		"Number of simplifiable STR reachable by LDR"
	)

STATISTIC	(	NumADDToLDRWithImm	,
		"Number of simplifiable LDR with imm reachable by ADD"
	)

STATISTIC	(	NumLDRToLDRWithImm	,
		"Number of simplifiable LDR with imm reachable by LDR"
	)

STATISTIC	(	NumADDToLDR	,
		"Number of simplifiable LDR reachable by ADD"
	)

STATISTIC	(	NumLDRToLDR	,
		"Number of simplifiable LDR reachable by LDR"
	)

STATISTIC	(	NumADRPToLDR	,
		"Number of simplifiable LDR reachable by ADRP"
	)

STATISTIC	(	NumCplxLvl1	,
		"Number of complex case of level 1"
	)

STATISTIC	(	NumTooCplxLvl1	,
		"Number of too complex case of level 1"
	)

STATISTIC	(	NumCplxLvl2	,
		"Number of complex case of level 2"
	)

STATISTIC	(	NumTooCplxLvl2	,
		"Number of too complex case of level 2"
	)

STATISTIC	(	NumADRSimpleCandidate	,
		"Number of simplifiable ADRP + ADD"
	)

STATISTIC	(	NumADRComplexCandidate	,
		"Number of too complex ADRP + ADD"
	)

static bool supportLoadFromLiteral ( const MachineInstr * Instr ) [static]

Check whether the given instruction can load a litteral.

Definition at line 664 of file AArch64CollectLOH.cpp.

References llvm::MachineInstr::getOpcode().

Referenced by computeOthers().

Variable Documentation

cl::opt<bool> BasicBlockScopeOnly("aarch64-collect-loh-bb-only", cl::Hidden, cl::desc("Restrict analysis at basic block scope"), cl::init(true)) [static]

aarch64 collect AArch64 Collect Linker Optimization false

Definition at line 227 of file AArch64CollectLOH.cpp.

aarch64 collect loh

Definition at line 226 of file AArch64CollectLOH.cpp.

cl::opt<bool> PreCollectRegister("aarch64-collect-loh-pre-collect-register", cl::Hidden, cl::desc("Restrict analysis to registers invovled"" in LOHs"), cl::init(true)) [static]

Referenced by collectInvolvedReg().

Namespaces

Defines

Functions

Variables

Define Documentation

Function Documentation

Variable Documentation