#include "ARM.h"#include "ARMBaseInstrInfo.h"#include "ARMBaseRegisterInfo.h"#include "ARMISelLowering.h"#include "ARMMachineFunctionInfo.h"#include "ARMSubtarget.h"#include "MCTargetDesc/ARMAddressingModes.h"#include "Thumb1RegisterInfo.h"#include "llvm/ADT/DenseMap.h"#include "llvm/ADT/STLExtras.h"#include "llvm/ADT/SmallPtrSet.h"#include "llvm/ADT/SmallSet.h"#include "llvm/ADT/SmallVector.h"#include "llvm/ADT/Statistic.h"#include "llvm/CodeGen/MachineBasicBlock.h"#include "llvm/CodeGen/MachineFunctionPass.h"#include "llvm/CodeGen/MachineInstr.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/RegisterScavenging.h"#include "llvm/CodeGen/SelectionDAGNodes.h"#include "llvm/IR/DataLayout.h"#include "llvm/IR/DerivedTypes.h"#include "llvm/IR/Function.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Target/TargetInstrInfo.h"#include "llvm/Target/TargetMachine.h"#include "llvm/Target/TargetRegisterInfo.h"
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Define Documentation
| #define DEBUG_TYPE "arm-ldst-opt" |
Definition at line 46 of file ARMLoadStoreOptimizer.cpp.
Function Documentation
| static void concatenateMemOperands | ( | MachineInstr * | MI, |
| MachineInstr * | Op0, | ||
| MachineInstr * | Op1 | ||
| ) | [static] |
Copy Op0 and Op1 operands into a new array assigned to MI.
Definition at line 1781 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineFunction::allocateMemRefsArray(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::memoperands_begin(), llvm::MachineInstr::memoperands_empty(), llvm::MachineInstr::memoperands_end(), and llvm::MachineInstr::setMemRefs().
| static bool definesCPSR | ( | MachineInstr * | MI | ) | [static] |
Definition at line 707 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isDef(), and llvm::MachineOperand::isReg().
Referenced by llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), isMatchingDecrement(), and isMatchingIncrement().
| static int getLoadStoreMultipleOpcode | ( | int | Opcode, |
| ARM_AM::AMSubMode | Mode | ||
| ) | [static] |
Definition at line 143 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::da, llvm::ARM_AM::db, llvm::ARM_AM::ia, llvm::ARM_AM::ib, and llvm_unreachable.
| static unsigned getLSMultipleTransferSize | ( | MachineInstr * | MI | ) | [inline, static] |
Definition at line 791 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::getNumOperands(), llvm::MachineInstr::getNumOperands(), and llvm::MachineInstr::getOpcode().
| static int getMemoryOpOffset | ( | const MachineInstr * | MI | ) | [static] |
Definition at line 1258 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::getAM3Offset(), llvm::ARM_AM::getAM3Op(), llvm::ARM_AM::getAM5Offset(), llvm::ARM_AM::getAM5Op(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::MCInstrDesc::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::ARM_AM::sub.
| static unsigned getPostIndexedLoadStoreOpcode | ( | unsigned | Opc, |
| ARM_AM::AddrOpc | Mode | ||
| ) | [static] |
Definition at line 1022 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::add, and llvm_unreachable.
| static unsigned getPreIndexedLoadStoreOpcode | ( | unsigned | Opc, |
| ARM_AM::AddrOpc | Mode | ||
| ) | [static] |
Definition at line 997 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::add, and llvm_unreachable.
| static unsigned getUpdatingLSMultipleOpcode | ( | unsigned | Opc, |
| ARM_AM::AMSubMode | Mode | ||
| ) | [static] |
Definition at line 832 of file ARMLoadStoreOptimizer.cpp.
References llvm::ARM_AM::da, llvm::ARM_AM::db, llvm::ARM_AM::ia, llvm::ARM_AM::ib, and llvm_unreachable.
| static void InsertLDR_STR | ( | MachineBasicBlock & | MBB, |
| MachineBasicBlock::iterator & | MBBI, | ||
| int | Offset, | ||
| bool | isDef, | ||
| DebugLoc | dl, | ||
| unsigned | NewOpc, | ||
| unsigned | Reg, | ||
| bool | RegDeadKill, | ||
| bool | RegUndef, | ||
| unsigned | BaseReg, | ||
| bool | BaseKill, | ||
| bool | BaseUndef, | ||
| bool | OffKill, | ||
| bool | OffUndef, | ||
| ARMCC::CondCodes | Pred, | ||
| unsigned | PredReg, | ||
| const TargetInstrInfo * | TII, | ||
| bool | isT2 | ||
| ) | [static] |
Definition at line 1286 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MCInstrInfo::get(), llvm::getDeadRegState(), llvm::getDefRegState(), llvm::getKillRegState(), and llvm::getUndefRegState().
Definition at line 294 of file ARMLoadStoreOptimizer.cpp.
References isT1i32Load(), and isT2i32Load().
| static bool isi32Store | ( | unsigned | Opc | ) | [static] |
Definition at line 306 of file ARMLoadStoreOptimizer.cpp.
References isT1i32Store(), and isT2i32Store().
| static bool isMatchingDecrement | ( | MachineInstr * | MI, |
| unsigned | Base, | ||
| unsigned | Bytes, | ||
| unsigned | Limit, | ||
| ARMCC::CondCodes | Pred, | ||
| unsigned | PredReg | ||
| ) | [static] |
Definition at line 721 of file ARMLoadStoreOptimizer.cpp.
References definesCPSR(), llvm::MachineOperand::getImm(), llvm::getInstrPredicate(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::getReg().
| static bool isMatchingIncrement | ( | MachineInstr * | MI, |
| unsigned | Base, | ||
| unsigned | Bytes, | ||
| unsigned | Limit, | ||
| ARMCC::CondCodes | Pred, | ||
| unsigned | PredReg | ||
| ) | [static] |
Definition at line 756 of file ARMLoadStoreOptimizer.cpp.
References definesCPSR(), llvm::MachineOperand::getImm(), llvm::getInstrPredicate(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::getReg().
| static bool isMemoryOp | ( | const MachineInstr * | MI | ) | [static] |
isMemoryOp - Returns true if instruction is a memory operation that this pass is capable of operating on.
Definition at line 1191 of file ARMLoadStoreOptimizer.cpp.
References llvm::MachineMemOperand::getAlignment(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::hasOneMemOperand(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUndef(), llvm::MachineMemOperand::isVolatile(), and llvm::MachineInstr::memoperands_begin().
| static bool IsSafeAndProfitableToMove | ( | bool | isLd, |
| unsigned | Base, | ||
| MachineBasicBlock::iterator | I, | ||
| MachineBasicBlock::iterator | E, | ||
| SmallPtrSetImpl< MachineInstr * > & | MemOps, | ||
| SmallSet< unsigned, 4 > & | MemRegs, | ||
| const TargetRegisterInfo * | TRI | ||
| ) | [static] |
Definition at line 1733 of file ARMLoadStoreOptimizer.cpp.
References llvm::SmallSet< T, N, C >::count(), llvm::SmallPtrSetImpl< PtrType >::count(), llvm::MachineOperand::getReg(), llvm::SmallSet< T, N, C >::insert(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), llvm::TargetRegisterInfo::regsOverlap(), and llvm::SmallSet< T, N, C >::size().
| static bool isT1i32Load | ( | unsigned | Opc | ) | [static] |
Definition at line 286 of file ARMLoadStoreOptimizer.cpp.
Referenced by isi32Load().
| static bool isT1i32Store | ( | unsigned | Opc | ) | [static] |
Definition at line 298 of file ARMLoadStoreOptimizer.cpp.
Referenced by isi32Store().
| static bool isT2i32Load | ( | unsigned | Opc | ) | [static] |
Definition at line 290 of file ARMLoadStoreOptimizer.cpp.
Referenced by isi32Load().
| static bool isT2i32Store | ( | unsigned | Opc | ) | [static] |
Definition at line 302 of file ARMLoadStoreOptimizer.cpp.
Referenced by isi32Store().
| STATISTIC | ( | NumLDMGened | , |
| "Number of ldm instructions generated" | |||
| ) |
| STATISTIC | ( | NumSTMGened | , |
| "Number of stm instructions generated" | |||
| ) |
| STATISTIC | ( | NumVLDMGened | , |
| "Number of vldm instructions generated" | |||
| ) |
| STATISTIC | ( | NumVSTMGened | , |
| "Number of vstm instructions generated" | |||
| ) |
| STATISTIC | ( | NumLdStMoved | , |
| "Number of load / store instructions moved" | |||
| ) |
| STATISTIC | ( | NumLDRDFormed | , |
| "Number of ldrd created before allocation" | |||
| ) |
| STATISTIC | ( | NumSTRDFormed | , |
| "Number of strd created before allocation" | |||
| ) |
| STATISTIC | ( | NumLDRD2LDM | , |
| "Number of ldrd instructions turned back into ldm" | |||
| ) |
| STATISTIC | ( | NumSTRD2STM | , |
| "Number of strd instructions turned back into stm" | |||
| ) |
| STATISTIC | ( | NumLDRD2LDR | , |
| "Number of ldrd instructions turned back into ldr's" | |||
| ) |
| STATISTIC | ( | NumSTRD2STR | , |
| "Number of strd instructions turned back into str's" | |||
| ) |
1.7.6.1