LLVM API Documentation

Defines | Functions | Variables
TwoAddressInstructionPass.cpp File Reference
#include "llvm/CodeGen/Passes.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
Include dependency graph for TwoAddressInstructionPass.cpp:

Go to the source code of this file.

Defines

#define DEBUG_TYPE   "twoaddrinstr"

Functions

 STATISTIC (NumTwoAddressInstrs,"Number of two-address instructions")
 STATISTIC (NumCommuted,"Number of instructions commuted to coalesce")
 STATISTIC (NumAggrCommuted,"Number of instructions aggressively commuted")
 STATISTIC (NumConvertedTo3Addr,"Number of instructions promoted to 3-address")
 STATISTIC (Num3AddrSunk,"Number of 3-address instructions sunk")
 STATISTIC (NumReSchedUps,"Number of instructions re-scheduled up")
 STATISTIC (NumReSchedDowns,"Number of instructions re-scheduled down")
 INITIALIZE_PASS_BEGIN (TwoAddressInstructionPass,"twoaddressinstruction","Two-Address instruction pass", false, false) INITIALIZE_PASS_END(TwoAddressInstructionPass
static bool isPlainlyKilled (MachineInstr *MI, unsigned Reg, LiveIntervals *LIS)
 isPLainlyKilled - Test if the given register value, which is used by the
static bool isCopyToReg (MachineInstr &MI, const TargetInstrInfo *TII, unsigned &SrcReg, unsigned &DstReg, bool &IsSrcPhys, bool &IsDstPhys)
static bool isKilled (MachineInstr &MI, unsigned Reg, const MachineRegisterInfo *MRI, const TargetInstrInfo *TII, LiveIntervals *LIS, bool allowFalsePositives)
static bool isTwoAddrUse (MachineInstr &MI, unsigned Reg, unsigned &DstReg)
static MachineInstrfindOnlyInterestingUse (unsigned Reg, MachineBasicBlock *MBB, MachineRegisterInfo *MRI, const TargetInstrInfo *TII, bool &IsCopy, unsigned &DstReg, bool &IsDstPhys)
static unsigned getMappedReg (unsigned Reg, DenseMap< unsigned, unsigned > &RegMap)
static bool regsAreCompatible (unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI)

Variables

static cl::opt< boolEnableRescheduling ("twoaddr-reschedule", cl::desc("Coalesce copies by rescheduling (default=true)"), cl::init(true), cl::Hidden)
 twoaddressinstruction
Two Address instruction pass
Two Address instruction false

Define Documentation

#define DEBUG_TYPE   "twoaddrinstr"

Definition at line 54 of file TwoAddressInstructionPass.cpp.


Function Documentation

static MachineInstr* findOnlyInterestingUse ( unsigned  Reg,
MachineBasicBlock MBB,
MachineRegisterInfo MRI,
const TargetInstrInfo TII,
bool IsCopy,
unsigned DstReg,
bool IsDstPhys 
) [static]

findOnlyInterestingUse - Given a register, if has a single in-basic block use, return the use instruction if it's a copy or a two-address use.

Definition at line 452 of file TwoAddressInstructionPass.cpp.

References llvm::MachineInstr::getParent(), llvm::MachineRegisterInfo::hasOneNonDBGUse(), isCopyToReg(), llvm::TargetRegisterInfo::isPhysicalRegister(), isTwoAddrUse(), and llvm::MachineRegisterInfo::use_instr_nodbg_begin().

static unsigned getMappedReg ( unsigned  Reg,
DenseMap< unsigned, unsigned > &  RegMap 
) [static]
INITIALIZE_PASS_BEGIN ( TwoAddressInstructionPass  ,
"twoaddressinstruction"  ,
"Two-Address instruction pass ,
false  ,
false   
)
static bool isCopyToReg ( MachineInstr MI,
const TargetInstrInfo TII,
unsigned SrcReg,
unsigned DstReg,
bool IsSrcPhys,
bool IsDstPhys 
) [static]

isCopyToReg - Return true if the specified MI is a copy instruction or a extract_subreg instruction. It also returns the source and destination registers and whether they are physical registers by reference.

Definition at line 339 of file TwoAddressInstructionPass.cpp.

References llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineInstr::isCopy(), llvm::MachineInstr::isInsertSubreg(), llvm::TargetRegisterInfo::isPhysicalRegister(), and llvm::MachineInstr::isSubregToReg().

Referenced by findOnlyInterestingUse(), and isKilled().

static bool isKilled ( MachineInstr MI,
unsigned  Reg,
const MachineRegisterInfo MRI,
const TargetInstrInfo TII,
LiveIntervals LIS,
bool  allowFalsePositives 
) [static]

isKilled - Test if the given register value, which is used by the given instruction, is killed by the given instruction. This looks through coalescable copies to see if the original value is potentially not killed.

For example, in this code:

reg1034 = copy reg1024 reg1035 = copy reg1025<kill> reg1036 = add reg1034<kill>, reg1035<kill>

reg1034 is not considered to be killed, since it is copied from a register which is not killed. Treating it as not killed lets the normal heuristics commute the (two-address) add, which lets coalescing eliminate the extra copy.

If allowFalsePositives is true then likely kills are treated as kills even if it can't be proven that they are kills.

Definition at line 402 of file TwoAddressInstructionPass.cpp.

References llvm::MachineRegisterInfo::def_begin(), llvm::MachineRegisterInfo::def_end(), llvm::MachineOperand::getParent(), llvm::MachineRegisterInfo::hasOneUse(), isCopyToReg(), llvm::TargetRegisterInfo::isPhysicalRegister(), isPlainlyKilled(), and llvm::AArch64CC::MI.

static bool isPlainlyKilled ( MachineInstr MI,
unsigned  Reg,
LiveIntervals LIS 
) [static]
static bool isTwoAddrUse ( MachineInstr MI,
unsigned  Reg,
unsigned DstReg 
) [static]

isTwoAddrUse - Return true if the specified MI uses the specified register as a two-address use. If so, return the destination register by reference.

Definition at line 435 of file TwoAddressInstructionPass.cpp.

References llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), llvm::MachineInstr::isRegTiedToDefOperand(), and llvm::MachineOperand::isUse().

Referenced by findOnlyInterestingUse().

static bool regsAreCompatible ( unsigned  RegA,
unsigned  RegB,
const TargetRegisterInfo TRI 
) [static]

regsAreCompatible - Return true if the two registers are equal or aliased.

Definition at line 495 of file TwoAddressInstructionPass.cpp.

References llvm::TargetRegisterInfo::regsOverlap().

STATISTIC ( NumTwoAddressInstrs  ,
"Number of two-address instructions  
)
STATISTIC ( NumCommuted  ,
"Number of instructions commuted to coalesce"   
)
STATISTIC ( NumAggrCommuted  ,
"Number of instructions aggressively commuted"   
)
STATISTIC ( NumConvertedTo3Addr  ,
"Number of instructions promoted to 3-address"   
)
STATISTIC ( Num3AddrSunk  ,
"Number of 3-address instructions sunk"   
)
STATISTIC ( NumReSchedUps  ,
"Number of instructions re-scheduled up"   
)
STATISTIC ( NumReSchedDowns  ,
"Number of instructions re-scheduled down"   
)

Variable Documentation

cl::opt<bool> EnableRescheduling("twoaddr-reschedule", cl::desc("Coalesce copies by rescheduling (default=true)"), cl::init(true), cl::Hidden) [static]
Two Address instruction false

Definition at line 169 of file TwoAddressInstructionPass.cpp.

Two Address instruction pass

Definition at line 169 of file TwoAddressInstructionPass.cpp.

Referenced by LLVMTargetMachineEmit().

Definition at line 169 of file TwoAddressInstructionPass.cpp.