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board-ap4evb.c
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1 /*
2  * AP4EVB board support
3  *
4  * Copyright (C) 2010 Magnus Damm
5  * Copyright (C) 2008 Yoshihiro Shimoda
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; version 2 of the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19  */
20 #include <linux/clk.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/mfd/tmio.h>
28 #include <linux/mmc/host.h>
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/partitions.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/mmc/sh_mmcif.h>
34 #include <linux/i2c.h>
35 #include <linux/i2c/tsc2007.h>
36 #include <linux/io.h>
37 #include <linux/regulator/fixed.h>
39 #include <linux/smsc911x.h>
40 #include <linux/sh_intc.h>
41 #include <linux/sh_clk.h>
42 #include <linux/gpio.h>
43 #include <linux/input.h>
44 #include <linux/leds.h>
45 #include <linux/input/sh_keysc.h>
46 #include <linux/usb/r8a66597.h>
47 #include <linux/pm_clock.h>
48 #include <linux/dma-mapping.h>
49 
50 #include <media/sh_mobile_ceu.h>
51 #include <media/sh_mobile_csi2.h>
52 #include <media/soc_camera.h>
53 
54 #include <sound/sh_fsi.h>
55 #include <sound/simple_card.h>
56 
57 #include <video/sh_mobile_hdmi.h>
58 #include <video/sh_mobile_lcdc.h>
59 #include <video/sh_mipi_dsi.h>
60 
61 #include <mach/common.h>
62 #include <mach/irqs.h>
63 #include <mach/sh7372.h>
64 
65 #include <asm/mach-types.h>
66 #include <asm/mach/arch.h>
67 #include <asm/setup.h>
68 
69 #include "sh-gpio.h"
70 
71 /*
72  * Address Interface BusWidth note
73  * ------------------------------------------------------------------
74  * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
75  * 0x0800_0000 user area -
76  * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
77  * 0x1400_0000 Ether (LAN9220) 16bit
78  * 0x1600_0000 user area - cannot use with NAND
79  * 0x1800_0000 user area -
80  * 0x1A00_0000 -
81  * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
82  */
83 
84 /*
85  * NOR Flash ROM
86  *
87  * SW1 | SW2 | SW7 | NOR Flash ROM
88  * bit1 | bit1 bit2 | bit1 | Memory allocation
89  * ------+------------+------+------------------
90  * OFF | ON OFF | ON | Area 0
91  * OFF | ON OFF | OFF | Area 4
92  */
93 
94 /*
95  * NAND Flash ROM
96  *
97  * SW1 | SW2 | SW7 | NAND Flash ROM
98  * bit1 | bit1 bit2 | bit2 | Memory allocation
99  * ------+------------+------+------------------
100  * OFF | ON OFF | ON | FCE 0
101  * OFF | ON OFF | OFF | FCE 1
102  */
103 
104 /*
105  * SMSC 9220
106  *
107  * SW1 SMSC 9220
108  * -----------------------
109  * ON access disable
110  * OFF access enable
111  */
112 
113 /*
114  * LCD / IRQ / KEYSC / IrDA
115  *
116  * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
117  * LCD = 2nd LCDC (WVGA)
118  *
119  * | SW43 |
120  * SW3 | ON | OFF |
121  * -------------+-----------------------+---------------+
122  * ON | KEY / IrDA | LCD |
123  * OFF | KEY / IrDA / IRQ | IRQ |
124  *
125  *
126  * QHD / WVGA display
127  *
128  * You can choice display type on menuconfig.
129  * Then, check above dip-switch.
130  */
131 
132 /*
133  * USB
134  *
135  * J7 : 1-2 MAX3355E VBUS
136  * 2-3 DC 5.0V
137  *
138  * S39: bit2: off
139  */
140 
141 /*
142  * FSI/FSMI
143  *
144  * SW41 : ON : SH-Mobile AP4 Audio Mode
145  * : OFF : Bluetooth Audio Mode
146  */
147 
148 /*
149  * MMC0/SDHI1 (CN7)
150  *
151  * J22 : select card voltage
152  * 1-2 pin : 1.8v
153  * 2-3 pin : 3.3v
154  *
155  * SW1 | SW33
156  * | bit1 | bit2 | bit3 | bit4
157  * ------------+------+------+------+-------
158  * MMC0 OFF | OFF | ON | ON | X
159  * SDHI1 OFF | ON | X | OFF | ON
160  *
161  * voltage lebel
162  * CN7 : 1.8v
163  * CN12: 3.3v
164  */
165 
166 /* Dummy supplies, where voltage doesn't matter */
167 static struct regulator_consumer_supply fixed1v8_power_consumers[] =
168 {
169  /* J22 default position: 1.8V */
170  REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
171  REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
172  REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
173  REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
174 };
175 
176 static struct regulator_consumer_supply fixed3v3_power_consumers[] =
177 {
178  REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
179  REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
180 };
181 
182 static struct regulator_consumer_supply dummy_supplies[] = {
183  REGULATOR_SUPPLY("vddvario", "smsc911x"),
184  REGULATOR_SUPPLY("vdd33a", "smsc911x"),
185 };
186 
187 /* MTD */
188 static struct mtd_partition nor_flash_partitions[] = {
189  {
190  .name = "loader",
191  .offset = 0x00000000,
192  .size = 512 * 1024,
193  .mask_flags = MTD_WRITEABLE,
194  },
195  {
196  .name = "bootenv",
197  .offset = MTDPART_OFS_APPEND,
198  .size = 512 * 1024,
199  .mask_flags = MTD_WRITEABLE,
200  },
201  {
202  .name = "kernel_ro",
203  .offset = MTDPART_OFS_APPEND,
204  .size = 8 * 1024 * 1024,
205  .mask_flags = MTD_WRITEABLE,
206  },
207  {
208  .name = "kernel",
209  .offset = MTDPART_OFS_APPEND,
210  .size = 8 * 1024 * 1024,
211  },
212  {
213  .name = "data",
214  .offset = MTDPART_OFS_APPEND,
215  .size = MTDPART_SIZ_FULL,
216  },
217 };
218 
219 static struct physmap_flash_data nor_flash_data = {
220  .width = 2,
221  .parts = nor_flash_partitions,
222  .nr_parts = ARRAY_SIZE(nor_flash_partitions),
223 };
224 
225 static struct resource nor_flash_resources[] = {
226  [0] = {
227  .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
228  .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
229  .flags = IORESOURCE_MEM,
230  }
231 };
232 
233 static struct platform_device nor_flash_device = {
234  .name = "physmap-flash",
235  .dev = {
236  .platform_data = &nor_flash_data,
237  },
238  .num_resources = ARRAY_SIZE(nor_flash_resources),
239  .resource = nor_flash_resources,
240 };
241 
242 /* SMSC 9220 */
243 static struct resource smc911x_resources[] = {
244  {
245  .start = 0x14000000,
246  .end = 0x16000000 - 1,
247  .flags = IORESOURCE_MEM,
248  }, {
249  .start = evt2irq(0x02c0) /* IRQ6A */,
251  },
252 };
253 
254 static struct smsc911x_platform_config smsc911x_info = {
256  .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
257  .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
258 };
259 
260 static struct platform_device smc911x_device = {
261  .name = "smsc911x",
262  .id = -1,
263  .num_resources = ARRAY_SIZE(smc911x_resources),
264  .resource = smc911x_resources,
265  .dev = {
266  .platform_data = &smsc911x_info,
267  },
268 };
269 
270 /*
271  * The card detect pin of the top SD/MMC slot (CN7) is active low and is
272  * connected to GPIO A22 of SH7372 (GPIO_PORT41).
273  */
274 static int slot_cn7_get_cd(struct platform_device *pdev)
275 {
276  return !gpio_get_value(GPIO_PORT41);
277 }
278 /* MERAM */
279 static struct sh_mobile_meram_info meram_info = {
280  .addr_mode = SH_MOBILE_MERAM_MODE1,
281 };
282 
283 static struct resource meram_resources[] = {
284  [0] = {
285  .name = "regs",
286  .start = 0xe8000000,
287  .end = 0xe807ffff,
288  .flags = IORESOURCE_MEM,
289  },
290  [1] = {
291  .name = "meram",
292  .start = 0xe8080000,
293  .end = 0xe81fffff,
294  .flags = IORESOURCE_MEM,
295  },
296 };
297 
298 static struct platform_device meram_device = {
299  .name = "sh_mobile_meram",
300  .id = 0,
301  .num_resources = ARRAY_SIZE(meram_resources),
302  .resource = meram_resources,
303  .dev = {
304  .platform_data = &meram_info,
305  },
306 };
307 
308 /* SH_MMCIF */
309 static struct resource sh_mmcif_resources[] = {
310  [0] = {
311  .name = "MMCIF",
312  .start = 0xE6BD0000,
313  .end = 0xE6BD00FF,
314  .flags = IORESOURCE_MEM,
315  },
316  [1] = {
317  /* MMC ERR */
318  .start = evt2irq(0x1ac0),
319  .flags = IORESOURCE_IRQ,
320  },
321  [2] = {
322  /* MMC NOR */
323  .start = evt2irq(0x1ae0),
324  .flags = IORESOURCE_IRQ,
325  },
326 };
327 
328 static struct sh_mmcif_plat_data sh_mmcif_plat = {
329  .sup_pclk = 0,
331  .caps = MMC_CAP_4_BIT_DATA |
334  .get_cd = slot_cn7_get_cd,
335  .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
336  .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
337 };
338 
339 static struct platform_device sh_mmcif_device = {
340  .name = "sh_mmcif",
341  .id = 0,
342  .dev = {
343  .dma_mask = NULL,
344  .coherent_dma_mask = 0xffffffff,
345  .platform_data = &sh_mmcif_plat,
346  },
347  .num_resources = ARRAY_SIZE(sh_mmcif_resources),
348  .resource = sh_mmcif_resources,
349 };
350 
351 /* SDHI0 */
352 static struct sh_mobile_sdhi_info sdhi0_info = {
353  .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
354  .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
355  .tmio_caps = MMC_CAP_SDIO_IRQ,
356 };
357 
358 static struct resource sdhi0_resources[] = {
359  [0] = {
360  .name = "SDHI0",
361  .start = 0xe6850000,
362  .end = 0xe68500ff,
363  .flags = IORESOURCE_MEM,
364  },
365  [1] = {
366  .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
367  .flags = IORESOURCE_IRQ,
368  },
369  [2] = {
370  .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
371  .flags = IORESOURCE_IRQ,
372  },
373  [3] = {
374  .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
375  .flags = IORESOURCE_IRQ,
376  },
377 };
378 
379 static struct platform_device sdhi0_device = {
380  .name = "sh_mobile_sdhi",
381  .num_resources = ARRAY_SIZE(sdhi0_resources),
382  .resource = sdhi0_resources,
383  .id = 0,
384  .dev = {
385  .platform_data = &sdhi0_info,
386  },
387 };
388 
389 /* SDHI1 */
390 static struct sh_mobile_sdhi_info sdhi1_info = {
391  .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
392  .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
393  .tmio_ocr_mask = MMC_VDD_165_195,
394  .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
395  .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
396  .get_cd = slot_cn7_get_cd,
397 };
398 
399 static struct resource sdhi1_resources[] = {
400  [0] = {
401  .name = "SDHI1",
402  .start = 0xe6860000,
403  .end = 0xe68600ff,
404  .flags = IORESOURCE_MEM,
405  },
406  [1] = {
407  .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
408  .flags = IORESOURCE_IRQ,
409  },
410  [2] = {
411  .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
412  .flags = IORESOURCE_IRQ,
413  },
414  [3] = {
415  .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
416  .flags = IORESOURCE_IRQ,
417  },
418 };
419 
420 static struct platform_device sdhi1_device = {
421  .name = "sh_mobile_sdhi",
422  .num_resources = ARRAY_SIZE(sdhi1_resources),
423  .resource = sdhi1_resources,
424  .id = 1,
425  .dev = {
426  .platform_data = &sdhi1_info,
427  },
428 };
429 
430 /* USB1 */
431 static void usb1_host_port_power(int port, int power)
432 {
433  if (!power) /* only power-on supported for now */
434  return;
435 
436  /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
437  __raw_writew(__raw_readw(IOMEM(0xE68B0008)) | 0x600, IOMEM(0xE68B0008));
438 }
439 
440 static struct r8a66597_platdata usb1_host_data = {
441  .on_chip = 1,
442  .port_power = usb1_host_port_power,
443 };
444 
445 static struct resource usb1_host_resources[] = {
446  [0] = {
447  .name = "USBHS",
448  .start = 0xE68B0000,
449  .end = 0xE68B00E6 - 1,
450  .flags = IORESOURCE_MEM,
451  },
452  [1] = {
453  .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
454  .flags = IORESOURCE_IRQ,
455  },
456 };
457 
458 static struct platform_device usb1_host_device = {
459  .name = "r8a66597_hcd",
460  .id = 1,
461  .dev = {
462  .dma_mask = NULL, /* not use dma */
463  .coherent_dma_mask = 0xffffffff,
464  .platform_data = &usb1_host_data,
465  },
466  .num_resources = ARRAY_SIZE(usb1_host_resources),
467  .resource = usb1_host_resources,
468 };
469 
470 /*
471  * QHD display
472  */
473 #ifdef CONFIG_AP4EVB_QHD
474 
475 /* KEYSC (Needs SW43 set to ON) */
476 static struct sh_keysc_info keysc_info = {
478  .scan_timing = 3,
479  .delay = 2500,
480  .keycodes = {
486  },
487 };
488 
489 static struct resource keysc_resources[] = {
490  [0] = {
491  .name = "KEYSC",
492  .start = 0xe61b0000,
493  .end = 0xe61b0063,
494  .flags = IORESOURCE_MEM,
495  },
496  [1] = {
497  .start = evt2irq(0x0be0), /* KEYSC_KEY */
498  .flags = IORESOURCE_IRQ,
499  },
500 };
501 
502 static struct platform_device keysc_device = {
503  .name = "sh_keysc",
504  .id = 0, /* "keysc0" clock */
505  .num_resources = ARRAY_SIZE(keysc_resources),
506  .resource = keysc_resources,
507  .dev = {
508  .platform_data = &keysc_info,
509  },
510 };
511 
512 /* MIPI-DSI */
513 static int sh_mipi_set_dot_clock(struct platform_device *pdev,
514  void __iomem *base,
515  int enable)
516 {
517  struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
518 
519  if (IS_ERR(pck))
520  return PTR_ERR(pck);
521 
522  if (enable) {
523  /*
524  * DSIPCLK = 24MHz
525  * D-PHY = DSIPCLK * ((0x6*2)+1) = 312MHz (see .phyctrl)
526  * HsByteCLK = D-PHY/8 = 39MHz
527  *
528  * X * Y * FPS =
529  * (544+72+600+16) * (961+8+8+2) * 30 = 36.1MHz
530  */
531  clk_set_rate(pck, clk_round_rate(pck, 24000000));
532  clk_enable(pck);
533  } else {
534  clk_disable(pck);
535  }
536 
537  clk_put(pck);
538 
539  return 0;
540 }
541 
542 static struct resource mipidsi0_resources[] = {
543  [0] = {
544  .start = 0xffc60000,
545  .end = 0xffc63073,
546  .flags = IORESOURCE_MEM,
547  },
548  [1] = {
549  .start = 0xffc68000,
550  .end = 0xffc680ef,
551  .flags = IORESOURCE_MEM,
552  },
553 };
554 
555 static struct sh_mobile_lcdc_info lcdc_info;
556 
557 static struct sh_mipi_dsi_info mipidsi0_info = {
559  .lcd_chan = &lcdc_info.ch[0],
560  .lane = 2,
561  .vsynw_offset = 17,
562  .phyctrl = 0x6 << 8,
565  .set_dot_clock = sh_mipi_set_dot_clock,
566 };
567 
568 static struct platform_device mipidsi0_device = {
569  .name = "sh-mipi-dsi",
570  .num_resources = ARRAY_SIZE(mipidsi0_resources),
571  .resource = mipidsi0_resources,
572  .id = 0,
573  .dev = {
574  .platform_data = &mipidsi0_info,
575  },
576 };
577 
578 static struct platform_device *qhd_devices[] __initdata = {
579  &mipidsi0_device,
580  &keysc_device,
581 };
582 #endif /* CONFIG_AP4EVB_QHD */
583 
584 /* LCDC0 */
585 static const struct fb_videomode ap4evb_lcdc_modes[] = {
586  {
587 #ifdef CONFIG_AP4EVB_QHD
588  .name = "R63302(QHD)",
589  .xres = 544,
590  .yres = 961,
591  .left_margin = 72,
592  .right_margin = 600,
593  .hsync_len = 16,
594  .upper_margin = 8,
595  .lower_margin = 8,
596  .vsync_len = 2,
598 #else
599  .name = "WVGA Panel",
600  .xres = 800,
601  .yres = 480,
602  .left_margin = 220,
603  .right_margin = 110,
604  .hsync_len = 70,
605  .upper_margin = 20,
606  .lower_margin = 5,
607  .vsync_len = 5,
608  .sync = 0,
609 #endif
610  },
611 };
612 
613 static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
614  .icb[0] = {
615  .meram_size = 0x40,
616  },
617  .icb[1] = {
618  .meram_size = 0x40,
619  },
620 };
621 
622 static struct sh_mobile_lcdc_info lcdc_info = {
623  .meram_dev = &meram_info,
624  .ch[0] = {
625  .chan = LCDC_CHAN_MAINLCD,
626  .fourcc = V4L2_PIX_FMT_RGB565,
627  .lcd_modes = ap4evb_lcdc_modes,
628  .num_modes = ARRAY_SIZE(ap4evb_lcdc_modes),
629  .meram_cfg = &lcd_meram_cfg,
630 #ifdef CONFIG_AP4EVB_QHD
631  .tx_dev = &mipidsi0_device,
632 #endif
633  }
634 };
635 
636 static struct resource lcdc_resources[] = {
637  [0] = {
638  .name = "LCDC",
639  .start = 0xfe940000, /* P4-only space */
640  .end = 0xfe943fff,
641  .flags = IORESOURCE_MEM,
642  },
643  [1] = {
644  .start = intcs_evt2irq(0x580),
645  .flags = IORESOURCE_IRQ,
646  },
647 };
648 
649 static struct platform_device lcdc_device = {
650  .name = "sh_mobile_lcdc_fb",
651  .num_resources = ARRAY_SIZE(lcdc_resources),
652  .resource = lcdc_resources,
653  .dev = {
654  .platform_data = &lcdc_info,
655  .coherent_dma_mask = ~0,
656  },
657 };
658 
659 /* FSI */
660 #define IRQ_FSI evt2irq(0x1840)
661 static int __fsi_set_rate(struct clk *clk, long rate, int enable)
662 {
663  int ret = 0;
664 
665  if (rate <= 0)
666  return ret;
667 
668  if (enable) {
669  ret = clk_set_rate(clk, rate);
670  if (0 == ret)
671  ret = clk_enable(clk);
672  } else {
673  clk_disable(clk);
674  }
675 
676  return ret;
677 }
678 
679 static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
680 {
681  return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
682 }
683 
684 static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
685 {
686  struct clk *fsia_ick;
687  struct clk *fsiack;
688  int ret = -EIO;
689 
690  fsia_ick = clk_get(dev, "icka");
691  if (IS_ERR(fsia_ick))
692  return PTR_ERR(fsia_ick);
693 
694  /*
695  * FSIACK is connected to AK4642,
696  * and use external clock pin from it.
697  * it is parent of fsia_ick now.
698  */
699  fsiack = clk_get_parent(fsia_ick);
700  if (!fsiack)
701  goto fsia_ick_out;
702 
703  /*
704  * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
705  *
706  ** FIXME **
707  * Because the freq_table of external clk (fsiack) are all 0,
708  * the return value of clk_round_rate became 0.
709  * So, it use __fsi_set_rate here.
710  */
711  ret = __fsi_set_rate(fsiack, rate, enable);
712  if (ret < 0)
713  goto fsiack_out;
714 
715  ret = __fsi_set_round_rate(fsia_ick, rate, enable);
716  if ((ret < 0) && enable)
717  __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
718 
719 fsiack_out:
720  clk_put(fsiack);
721 
722 fsia_ick_out:
723  clk_put(fsia_ick);
724 
725  return 0;
726 }
727 
728 static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
729 {
730  struct clk *fsib_clk;
731  struct clk *fdiv_clk = &sh7372_fsidivb_clk;
732  long fsib_rate = 0;
733  long fdiv_rate = 0;
734  int ackmd_bpfmd;
735  int ret;
736 
737  switch (rate) {
738  case 44100:
739  fsib_rate = rate * 256;
740  ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
741  break;
742  case 48000:
743  fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
744  fdiv_rate = rate * 256;
745  ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
746  break;
747  default:
748  pr_err("unsupported rate in FSI2 port B\n");
749  return -EINVAL;
750  }
751 
752  /* FSI B setting */
753  fsib_clk = clk_get(dev, "ickb");
754  if (IS_ERR(fsib_clk))
755  return -EIO;
756 
757  ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
758  if (ret < 0)
759  goto fsi_set_rate_end;
760 
761  /* FSI DIV setting */
762  ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
763  if (ret < 0) {
764  /* disable FSI B */
765  if (enable)
766  __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
767  goto fsi_set_rate_end;
768  }
769 
770  ret = ackmd_bpfmd;
771 
772 fsi_set_rate_end:
773  clk_put(fsib_clk);
774  return ret;
775 }
776 
777 static struct sh_fsi_platform_info fsi_info = {
778  .port_a = {
779  .flags = SH_FSI_BRS_INV,
780  .set_rate = fsi_ak4642_set_rate,
781  },
782  .port_b = {
783  .flags = SH_FSI_BRS_INV |
787  .set_rate = fsi_hdmi_set_rate,
788  },
789 };
790 
791 static struct resource fsi_resources[] = {
792  [0] = {
793  .name = "FSI",
794  .start = 0xFE3C0000,
795  .end = 0xFE3C0400 - 1,
796  .flags = IORESOURCE_MEM,
797  },
798  [1] = {
799  .start = IRQ_FSI,
800  .flags = IORESOURCE_IRQ,
801  },
802 };
803 
804 static struct platform_device fsi_device = {
805  .name = "sh_fsi2",
806  .id = -1,
807  .num_resources = ARRAY_SIZE(fsi_resources),
808  .resource = fsi_resources,
809  .dev = {
810  .platform_data = &fsi_info,
811  },
812 };
813 
814 static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {
815  .fmt = SND_SOC_DAIFMT_LEFT_J,
816  .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
817  .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
818  .sysclk = 11289600,
819 };
820 
821 static struct asoc_simple_card_info fsi2_ak4643_info = {
822  .name = "AK4643",
823  .card = "FSI2A-AK4643",
824  .cpu_dai = "fsia-dai",
825  .codec = "ak4642-codec.0-0013",
826  .platform = "sh_fsi2",
827  .codec_dai = "ak4642-hifi",
828  .init = &fsi2_ak4643_init_info,
829 };
830 
831 static struct platform_device fsi_ak4643_device = {
832  .name = "asoc-simple-card",
833  .dev = {
834  .platform_data = &fsi2_ak4643_info,
835  },
836 };
837 
838 /* LCDC1 */
839 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
840  unsigned long *parent_freq);
841 
842 static struct sh_mobile_hdmi_info hdmi_info = {
843  .flags = HDMI_SND_SRC_SPDIF,
844  .clk_optimize_parent = ap4evb_clk_optimize,
845 };
846 
847 static struct resource hdmi_resources[] = {
848  [0] = {
849  .name = "HDMI",
850  .start = 0xe6be0000,
851  .end = 0xe6be00ff,
852  .flags = IORESOURCE_MEM,
853  },
854  [1] = {
855  /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
856  .start = evt2irq(0x17e0),
857  .flags = IORESOURCE_IRQ,
858  },
859 };
860 
861 static struct platform_device hdmi_device = {
862  .name = "sh-mobile-hdmi",
863  .num_resources = ARRAY_SIZE(hdmi_resources),
864  .resource = hdmi_resources,
865  .id = -1,
866  .dev = {
867  .platform_data = &hdmi_info,
868  },
869 };
870 
871 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
872  unsigned long *parent_freq)
873 {
874  struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
875  long error;
876 
877  if (IS_ERR(hdmi_ick)) {
878  int ret = PTR_ERR(hdmi_ick);
879  pr_err("Cannot get HDMI ICK: %d\n", ret);
880  return ret;
881  }
882 
883  error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
884 
885  clk_put(hdmi_ick);
886 
887  return error;
888 }
889 
890 static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
891  .icb[0] = {
892  .meram_size = 0x100,
893  },
894  .icb[1] = {
895  .meram_size = 0x100,
896  },
897 };
898 
899 static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
900  .clock_source = LCDC_CLK_EXTERNAL,
901  .meram_dev = &meram_info,
902  .ch[0] = {
903  .chan = LCDC_CHAN_MAINLCD,
904  .fourcc = V4L2_PIX_FMT_RGB565,
905  .interface_type = RGB24,
906  .clock_divider = 1,
907  .flags = LCDC_FLAGS_DWPOL,
908  .meram_cfg = &hdmi_meram_cfg,
909  .tx_dev = &hdmi_device,
910  }
911 };
912 
913 static struct resource lcdc1_resources[] = {
914  [0] = {
915  .name = "LCDC1",
916  .start = 0xfe944000,
917  .end = 0xfe947fff,
918  .flags = IORESOURCE_MEM,
919  },
920  [1] = {
921  .start = intcs_evt2irq(0x1780),
922  .flags = IORESOURCE_IRQ,
923  },
924 };
925 
926 static struct platform_device lcdc1_device = {
927  .name = "sh_mobile_lcdc_fb",
928  .num_resources = ARRAY_SIZE(lcdc1_resources),
929  .resource = lcdc1_resources,
930  .id = 1,
931  .dev = {
932  .platform_data = &sh_mobile_lcdc1_info,
933  .coherent_dma_mask = ~0,
934  },
935 };
936 
937 static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
938  .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
939 };
940 
941 static struct asoc_simple_card_info fsi2_hdmi_info = {
942  .name = "HDMI",
943  .card = "FSI2B-HDMI",
944  .cpu_dai = "fsib-dai",
945  .codec = "sh-mobile-hdmi",
946  .platform = "sh_fsi2",
947  .codec_dai = "sh_mobile_hdmi-hifi",
948  .init = &fsi2_hdmi_init_info,
949 };
950 
951 static struct platform_device fsi_hdmi_device = {
952  .name = "asoc-simple-card",
953  .id = 1,
954  .dev = {
955  .platform_data = &fsi2_hdmi_info,
956  },
957 };
958 
959 static struct gpio_led ap4evb_leds[] = {
960  {
961  .name = "led4",
962  .gpio = GPIO_PORT185,
963  .default_state = LEDS_GPIO_DEFSTATE_ON,
964  },
965  {
966  .name = "led2",
967  .gpio = GPIO_PORT186,
968  .default_state = LEDS_GPIO_DEFSTATE_ON,
969  },
970  {
971  .name = "led3",
972  .gpio = GPIO_PORT187,
973  .default_state = LEDS_GPIO_DEFSTATE_ON,
974  },
975  {
976  .name = "led1",
977  .gpio = GPIO_PORT188,
978  .default_state = LEDS_GPIO_DEFSTATE_ON,
979  }
980 };
981 
982 static struct gpio_led_platform_data ap4evb_leds_pdata = {
983  .num_leds = ARRAY_SIZE(ap4evb_leds),
984  .leds = ap4evb_leds,
985 };
986 
987 static struct platform_device leds_device = {
988  .name = "leds-gpio",
989  .id = 0,
990  .dev = {
991  .platform_data = &ap4evb_leds_pdata,
992  },
993 };
994 
995 static struct i2c_board_info imx074_info = {
996  I2C_BOARD_INFO("imx074", 0x1a),
997 };
998 
999 static struct soc_camera_link imx074_link = {
1000  .bus_id = 0,
1001  .board_info = &imx074_info,
1002  .i2c_adapter_id = 0,
1003  .module_name = "imx074",
1004 };
1005 
1006 static struct platform_device ap4evb_camera = {
1007  .name = "soc-camera-pdrv",
1008  .id = 0,
1009  .dev = {
1010  .platform_data = &imx074_link,
1011  },
1012 };
1013 
1014 static struct sh_csi2_client_config csi2_clients[] = {
1015  {
1016  .phy = SH_CSI2_PHY_MAIN,
1017  .lanes = 0, /* default: 2 lanes */
1018  .channel = 0,
1019  .pdev = &ap4evb_camera,
1020  },
1021 };
1022 
1023 static struct sh_csi2_pdata csi2_info = {
1024  .type = SH_CSI2C,
1025  .clients = csi2_clients,
1026  .num_clients = ARRAY_SIZE(csi2_clients),
1027  .flags = SH_CSI2_ECC | SH_CSI2_CRC,
1028 };
1029 
1030 static struct resource csi2_resources[] = {
1031  [0] = {
1032  .name = "CSI2",
1033  .start = 0xffc90000,
1034  .end = 0xffc90fff,
1035  .flags = IORESOURCE_MEM,
1036  },
1037  [1] = {
1038  .start = intcs_evt2irq(0x17a0),
1039  .flags = IORESOURCE_IRQ,
1040  },
1041 };
1042 
1043 static struct sh_mobile_ceu_companion csi2 = {
1044  .id = 0,
1045  .num_resources = ARRAY_SIZE(csi2_resources),
1046  .resource = csi2_resources,
1047  .platform_data = &csi2_info,
1048 };
1049 
1050 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1052  .max_width = 8188,
1053  .max_height = 8188,
1054  .csi2 = &csi2,
1055 };
1056 
1057 static struct resource ceu_resources[] = {
1058  [0] = {
1059  .name = "CEU",
1060  .start = 0xfe910000,
1061  .end = 0xfe91009f,
1062  .flags = IORESOURCE_MEM,
1063  },
1064  [1] = {
1065  .start = intcs_evt2irq(0x880),
1066  .flags = IORESOURCE_IRQ,
1067  },
1068  [2] = {
1069  /* place holder for contiguous memory */
1070  },
1071 };
1072 
1073 static struct platform_device ceu_device = {
1074  .name = "sh_mobile_ceu",
1075  .id = 0, /* "ceu0" clock */
1076  .num_resources = ARRAY_SIZE(ceu_resources),
1077  .resource = ceu_resources,
1078  .dev = {
1079  .platform_data = &sh_mobile_ceu_info,
1080  .coherent_dma_mask = 0xffffffff,
1081  },
1082 };
1083 
1084 static struct platform_device *ap4evb_devices[] __initdata = {
1085  &leds_device,
1086  &nor_flash_device,
1087  &smc911x_device,
1088  &sdhi0_device,
1089  &sdhi1_device,
1090  &usb1_host_device,
1091  &fsi_device,
1092  &fsi_ak4643_device,
1093  &fsi_hdmi_device,
1094  &sh_mmcif_device,
1095  &hdmi_device,
1096  &lcdc_device,
1097  &lcdc1_device,
1098  &ceu_device,
1099  &ap4evb_camera,
1100  &meram_device,
1101 };
1102 
1103 static void __init hdmi_init_pm_clock(void)
1104 {
1105  struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
1106  int ret;
1107  long rate;
1108 
1109  if (IS_ERR(hdmi_ick)) {
1110  ret = PTR_ERR(hdmi_ick);
1111  pr_err("Cannot get HDMI ICK: %d\n", ret);
1112  goto out;
1113  }
1114 
1116  if (ret < 0) {
1117  pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
1118  goto out;
1119  }
1120 
1121  pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
1122 
1123  rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
1124  if (rate < 0) {
1125  pr_err("Cannot get suitable rate: %ld\n", rate);
1126  ret = rate;
1127  goto out;
1128  }
1129 
1130  ret = clk_set_rate(&sh7372_pllc2_clk, rate);
1131  if (ret < 0) {
1132  pr_err("Cannot set rate %ld: %d\n", rate, ret);
1133  goto out;
1134  }
1135 
1136  pr_debug("PLLC2 set frequency %lu\n", rate);
1137 
1138  ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
1139  if (ret < 0)
1140  pr_err("Cannot set HDMI parent: %d\n", ret);
1141 
1142 out:
1143  if (!IS_ERR(hdmi_ick))
1144  clk_put(hdmi_ick);
1145 }
1146 
1147 static void __init fsi_init_pm_clock(void)
1148 {
1149  struct clk *fsia_ick;
1150  int ret;
1151 
1152  fsia_ick = clk_get(&fsi_device.dev, "icka");
1153  if (IS_ERR(fsia_ick)) {
1154  ret = PTR_ERR(fsia_ick);
1155  pr_err("Cannot get FSI ICK: %d\n", ret);
1156  return;
1157  }
1158 
1159  ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
1160  if (ret < 0)
1161  pr_err("Cannot set FSI-A parent: %d\n", ret);
1162 
1163  clk_put(fsia_ick);
1164 }
1165 
1166 /* TouchScreen */
1167 #ifdef CONFIG_AP4EVB_QHD
1168 # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
1169 # define GPIO_TSC_PORT GPIO_PORT123
1170 #else /* WVGA */
1171 # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
1172 # define GPIO_TSC_PORT GPIO_PORT40
1173 #endif
1174 
1175 #define IRQ28 evt2irq(0x3380) /* IRQ28A */
1176 #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
1177 static int ts_get_pendown_state(void)
1178 {
1179  int val;
1180 
1182 
1184 
1186 
1188 
1190 
1191  return !val;
1192 }
1193 
1194 static int ts_init(void)
1195 {
1197 
1198  return 0;
1199 }
1200 
1201 static struct tsc2007_platform_data tsc2007_info = {
1202  .model = 2007,
1203  .x_plate_ohms = 180,
1204  .get_pendown_state = ts_get_pendown_state,
1205  .init_platform_hw = ts_init,
1206 };
1207 
1208 static struct i2c_board_info tsc_device = {
1209  I2C_BOARD_INFO("tsc2007", 0x48),
1210  .type = "tsc2007",
1211  .platform_data = &tsc2007_info,
1212  /*.irq is selected on ap4evb_init */
1213 };
1214 
1215 /* I2C */
1216 static struct i2c_board_info i2c0_devices[] = {
1217  {
1218  I2C_BOARD_INFO("ak4643", 0x13),
1219  },
1220 };
1221 
1222 static struct i2c_board_info i2c1_devices[] = {
1223  {
1224  I2C_BOARD_INFO("r2025sd", 0x32),
1225  },
1226 };
1227 
1228 
1229 #define GPIO_PORT9CR IOMEM(0xE6051009)
1230 #define GPIO_PORT10CR IOMEM(0xE605100A)
1231 #define USCCR1 IOMEM(0xE6058144)
1232 static void __init ap4evb_init(void)
1233 {
1234  struct pm_domain_device domain_devices[] = {
1235  { "A4LC", &lcdc1_device, },
1236  { "A4LC", &lcdc_device, },
1237  { "A4MP", &fsi_device, },
1238  { "A3SP", &sh_mmcif_device, },
1239  { "A3SP", &sdhi0_device, },
1240  { "A3SP", &sdhi1_device, },
1241  { "A4R", &ceu_device, },
1242  };
1243  u32 srcr4;
1244  struct clk *clk;
1245 
1246  regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
1247  ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
1248  regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
1249  ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
1250  regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
1251 
1252  /* External clock source */
1253  clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1254 
1256 
1257  /* enable SCIFA0 */
1260 
1261  /* enable SMSC911X */
1264 
1265  /* enable Debug switch (S6) */
1274  gpio_export(GPIO_PORT32, 0);
1275  gpio_export(GPIO_PORT33, 0);
1276  gpio_export(GPIO_PORT34, 0);
1277  gpio_export(GPIO_PORT35, 0);
1278 
1279  /* SDHI0 */
1288 
1289  /* SDHI1 */
1296 
1297  /* MMCIF */
1308 
1309  /* USB enable */
1316 
1317  /* setup USB phy */
1318  __raw_writew(0x8a0a, IOMEM(0xE6058130)); /* USBCR4 */
1319 
1320  /* enable FSI2 port A (ak4643) */
1326  gpio_direction_output(GPIO_PORT161, 0); /* slave */
1327 
1330  gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1331  gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1332 
1333  /* card detect pin for MMC slot (CN7) */
1336 
1337  /* setup FSI2 port B (HDMI) */
1339  __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1340 
1341  /* set SPU2 clock to 119.6 MHz */
1342  clk = clk_get(NULL, "spu_clk");
1343  if (!IS_ERR(clk)) {
1344  clk_set_rate(clk, clk_round_rate(clk, 119600000));
1345  clk_put(clk);
1346  }
1347 
1348  /*
1349  * set irq priority, to avoid sound chopping
1350  * when NFS rootfs is used
1351  * FSI(3) > SMSC911X(2)
1352  */
1354 
1355  i2c_register_board_info(0, i2c0_devices,
1356  ARRAY_SIZE(i2c0_devices));
1357 
1358  i2c_register_board_info(1, i2c1_devices,
1359  ARRAY_SIZE(i2c1_devices));
1360 
1361 #ifdef CONFIG_AP4EVB_QHD
1362 
1363  /*
1364  * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
1365  * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
1366  */
1367 
1368  /* enable KEYSC */
1379 
1380  /* enable TouchScreen */
1382 
1383  tsc_device.irq = IRQ28;
1384  i2c_register_board_info(1, &tsc_device, 1);
1385 
1386  /* LCDC0 */
1387  lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1388  lcdc_info.ch[0].interface_type = RGB24;
1389  lcdc_info.ch[0].clock_divider = 1;
1390  lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
1391  lcdc_info.ch[0].panel_cfg.width = 44;
1392  lcdc_info.ch[0].panel_cfg.height = 79;
1393 
1394  platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
1395 
1396 #else
1397  /*
1398  * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
1399  * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
1400  */
1401 
1422 
1423  gpio_request(GPIO_PORT189, NULL); /* backlight */
1425 
1426  gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1428 
1429  lcdc_info.clock_source = LCDC_CLK_BUS;
1430  lcdc_info.ch[0].interface_type = RGB18;
1431  lcdc_info.ch[0].clock_divider = 3;
1432  lcdc_info.ch[0].flags = 0;
1433  lcdc_info.ch[0].panel_cfg.width = 152;
1434  lcdc_info.ch[0].panel_cfg.height = 91;
1435 
1436  /* enable TouchScreen */
1438 
1439  tsc_device.irq = IRQ7;
1440  i2c_register_board_info(0, &tsc_device, 1);
1441 #endif /* CONFIG_AP4EVB_QHD */
1442 
1443  /* CEU */
1444 
1445  /*
1446  * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
1447  * becomes available
1448  */
1449 
1450  /* MIPI-CSI stuff */
1452 
1453  clk = clk_get(NULL, "vck1_clk");
1454  if (!IS_ERR(clk)) {
1455  clk_set_rate(clk, clk_round_rate(clk, 13000000));
1456  clk_enable(clk);
1457  clk_put(clk);
1458  }
1459 
1461 
1462  /* HDMI */
1465 
1466  /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1467 #define SRCR4 IOMEM(0xe61580bc)
1468  srcr4 = __raw_readl(SRCR4);
1469  __raw_writel(srcr4 | (1 << 13), SRCR4);
1470  udelay(50);
1471  __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1472 
1473  platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1474 
1475  rmobile_add_devices_to_domains(domain_devices,
1476  ARRAY_SIZE(domain_devices));
1477 
1478  hdmi_init_pm_clock();
1479  fsi_init_pm_clock();
1480  sh7372_pm_init();
1481  pm_clk_add(&fsi_device.dev, "spu2");
1482  pm_clk_add(&lcdc1_device.dev, "hdmi");
1483 }
1484 
1485 MACHINE_START(AP4EVB, "ap4evb")
1486  .map_io = sh7372_map_io,
1488  .init_irq = sh7372_init_irq,
1490  .init_machine = ap4evb_init,
1491  .init_late = sh7372_pm_init_late,
1492  .timer = &shmobile_timer,