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smsc911x.c
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1 /***************************************************************************
2  *
3  * Copyright (C) 2004-2008 SMSC
4  * Copyright (C) 2005-2008 ARM
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19  *
20  ***************************************************************************
21  * Rewritten, heavily based on smsc911x simple driver by SMSC.
22  * Partly uses io macros from smc91x.c by Nicolas Pitre
23  *
24  * Supported devices:
25  * LAN9115, LAN9116, LAN9117, LAN9118
26  * LAN9215, LAN9216, LAN9217, LAN9218
27  * LAN9210, LAN9211
28  * LAN9220, LAN9221
29  * LAN89218
30  *
31  */
32 
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 
35 #include <linux/crc32.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
53 #include <linux/io.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
58 #include <linux/of.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
62 #include "smsc911x.h"
63 
64 #define SMSC_CHIPNAME "smsc911x"
65 #define SMSC_MDIONAME "smsc911x-mdio"
66 #define SMSC_DRV_VERSION "2008-10-21"
67 
68 MODULE_LICENSE("GPL");
69 MODULE_VERSION(SMSC_DRV_VERSION);
70 MODULE_ALIAS("platform:smsc911x");
71 
72 #if USE_DEBUG > 0
73 static int debug = 16;
74 #else
75 static int debug = 3;
76 #endif
77 
78 module_param(debug, int, 0);
79 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
80 
81 struct smsc911x_data;
82 
83 struct smsc911x_ops {
84  u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
85  void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
86  void (*rx_readfifo)(struct smsc911x_data *pdata,
87  unsigned int *buf, unsigned int wordcount);
88  void (*tx_writefifo)(struct smsc911x_data *pdata,
89  unsigned int *buf, unsigned int wordcount);
90 };
91 
92 #define SMSC911X_NUM_SUPPLIES 2
93 
94 struct smsc911x_data {
95  void __iomem *ioaddr;
96 
97  unsigned int idrev;
98 
99  /* used to decide which workarounds apply */
100  unsigned int generation;
101 
102  /* device configuration (copied from platform_data during probe) */
103  struct smsc911x_platform_config config;
104 
105  /* This needs to be acquired before calling any of below:
106  * smsc911x_mac_read(), smsc911x_mac_write()
107  */
108  spinlock_t mac_lock;
109 
110  /* spinlock to ensure register accesses are serialised */
111  spinlock_t dev_lock;
112 
113  struct phy_device *phy_dev;
114  struct mii_bus *mii_bus;
115  int phy_irq[PHY_MAX_ADDR];
116  unsigned int using_extphy;
117  int last_duplex;
118  int last_carrier;
119 
120  u32 msg_enable;
121  unsigned int gpio_setting;
122  unsigned int gpio_orig_setting;
123  struct net_device *dev;
124  struct napi_struct napi;
125 
126  unsigned int software_irq_signal;
127 
128 #ifdef USE_PHY_WORK_AROUND
129 #define MIN_PACKET_SIZE (64)
130  char loopback_tx_pkt[MIN_PACKET_SIZE];
131  char loopback_rx_pkt[MIN_PACKET_SIZE];
132  unsigned int resetcount;
133 #endif
134 
135  /* Members for Multicast filter workaround */
136  unsigned int multicast_update_pending;
137  unsigned int set_bits_mask;
138  unsigned int clear_bits_mask;
139  unsigned int hashhi;
140  unsigned int hashlo;
141 
142  /* register access functions */
143  const struct smsc911x_ops *ops;
144 
145  /* regulators */
146  struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
147 };
148 
149 /* Easy access to information */
150 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
151 
152 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
153 {
154  if (pdata->config.flags & SMSC911X_USE_32BIT)
155  return readl(pdata->ioaddr + reg);
156 
157  if (pdata->config.flags & SMSC911X_USE_16BIT)
158  return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
159  ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
160 
161  BUG();
162  return 0;
163 }
164 
165 static inline u32
166 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
167 {
168  if (pdata->config.flags & SMSC911X_USE_32BIT)
169  return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
170 
171  if (pdata->config.flags & SMSC911X_USE_16BIT)
172  return (readw(pdata->ioaddr +
173  __smsc_shift(pdata, reg)) & 0xFFFF) |
174  ((readw(pdata->ioaddr +
175  __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
176 
177  BUG();
178  return 0;
179 }
180 
181 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
182 {
183  u32 data;
184  unsigned long flags;
185 
186  spin_lock_irqsave(&pdata->dev_lock, flags);
187  data = pdata->ops->reg_read(pdata, reg);
188  spin_unlock_irqrestore(&pdata->dev_lock, flags);
189 
190  return data;
191 }
192 
193 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
194  u32 val)
195 {
196  if (pdata->config.flags & SMSC911X_USE_32BIT) {
197  writel(val, pdata->ioaddr + reg);
198  return;
199  }
200 
201  if (pdata->config.flags & SMSC911X_USE_16BIT) {
202  writew(val & 0xFFFF, pdata->ioaddr + reg);
203  writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
204  return;
205  }
206 
207  BUG();
208 }
209 
210 static inline void
211 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
212 {
213  if (pdata->config.flags & SMSC911X_USE_32BIT) {
214  writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
215  return;
216  }
217 
218  if (pdata->config.flags & SMSC911X_USE_16BIT) {
219  writew(val & 0xFFFF,
220  pdata->ioaddr + __smsc_shift(pdata, reg));
221  writew((val >> 16) & 0xFFFF,
222  pdata->ioaddr + __smsc_shift(pdata, reg + 2));
223  return;
224  }
225 
226  BUG();
227 }
228 
229 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
230  u32 val)
231 {
232  unsigned long flags;
233 
234  spin_lock_irqsave(&pdata->dev_lock, flags);
235  pdata->ops->reg_write(pdata, reg, val);
236  spin_unlock_irqrestore(&pdata->dev_lock, flags);
237 }
238 
239 /* Writes a packet to the TX_DATA_FIFO */
240 static inline void
241 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
242  unsigned int wordcount)
243 {
244  unsigned long flags;
245 
246  spin_lock_irqsave(&pdata->dev_lock, flags);
247 
248  if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
249  while (wordcount--)
250  __smsc911x_reg_write(pdata, TX_DATA_FIFO,
251  swab32(*buf++));
252  goto out;
253  }
254 
255  if (pdata->config.flags & SMSC911X_USE_32BIT) {
256  writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
257  goto out;
258  }
259 
260  if (pdata->config.flags & SMSC911X_USE_16BIT) {
261  while (wordcount--)
262  __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
263  goto out;
264  }
265 
266  BUG();
267 out:
268  spin_unlock_irqrestore(&pdata->dev_lock, flags);
269 }
270 
271 /* Writes a packet to the TX_DATA_FIFO - shifted version */
272 static inline void
273 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
274  unsigned int wordcount)
275 {
276  unsigned long flags;
277 
278  spin_lock_irqsave(&pdata->dev_lock, flags);
279 
280  if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
281  while (wordcount--)
282  __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
283  swab32(*buf++));
284  goto out;
285  }
286 
287  if (pdata->config.flags & SMSC911X_USE_32BIT) {
288  writesl(pdata->ioaddr + __smsc_shift(pdata,
289  TX_DATA_FIFO), buf, wordcount);
290  goto out;
291  }
292 
293  if (pdata->config.flags & SMSC911X_USE_16BIT) {
294  while (wordcount--)
295  __smsc911x_reg_write_shift(pdata,
296  TX_DATA_FIFO, *buf++);
297  goto out;
298  }
299 
300  BUG();
301 out:
302  spin_unlock_irqrestore(&pdata->dev_lock, flags);
303 }
304 
305 /* Reads a packet out of the RX_DATA_FIFO */
306 static inline void
307 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
308  unsigned int wordcount)
309 {
310  unsigned long flags;
311 
312  spin_lock_irqsave(&pdata->dev_lock, flags);
313 
314  if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
315  while (wordcount--)
316  *buf++ = swab32(__smsc911x_reg_read(pdata,
317  RX_DATA_FIFO));
318  goto out;
319  }
320 
321  if (pdata->config.flags & SMSC911X_USE_32BIT) {
322  readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
323  goto out;
324  }
325 
326  if (pdata->config.flags & SMSC911X_USE_16BIT) {
327  while (wordcount--)
328  *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
329  goto out;
330  }
331 
332  BUG();
333 out:
334  spin_unlock_irqrestore(&pdata->dev_lock, flags);
335 }
336 
337 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
338 static inline void
339 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
340  unsigned int wordcount)
341 {
342  unsigned long flags;
343 
344  spin_lock_irqsave(&pdata->dev_lock, flags);
345 
346  if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
347  while (wordcount--)
348  *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
349  RX_DATA_FIFO));
350  goto out;
351  }
352 
353  if (pdata->config.flags & SMSC911X_USE_32BIT) {
354  readsl(pdata->ioaddr + __smsc_shift(pdata,
355  RX_DATA_FIFO), buf, wordcount);
356  goto out;
357  }
358 
359  if (pdata->config.flags & SMSC911X_USE_16BIT) {
360  while (wordcount--)
361  *buf++ = __smsc911x_reg_read_shift(pdata,
362  RX_DATA_FIFO);
363  goto out;
364  }
365 
366  BUG();
367 out:
368  spin_unlock_irqrestore(&pdata->dev_lock, flags);
369 }
370 
371 /*
372  * enable resources, currently just regulators.
373  */
374 static int smsc911x_enable_resources(struct platform_device *pdev)
375 {
376  struct net_device *ndev = platform_get_drvdata(pdev);
377  struct smsc911x_data *pdata = netdev_priv(ndev);
378  int ret = 0;
379 
380  ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
381  pdata->supplies);
382  if (ret)
383  netdev_err(ndev, "failed to enable regulators %d\n",
384  ret);
385  return ret;
386 }
387 
388 /*
389  * disable resources, currently just regulators.
390  */
391 static int smsc911x_disable_resources(struct platform_device *pdev)
392 {
393  struct net_device *ndev = platform_get_drvdata(pdev);
394  struct smsc911x_data *pdata = netdev_priv(ndev);
395  int ret = 0;
396 
397  ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
398  pdata->supplies);
399  return ret;
400 }
401 
402 /*
403  * Request resources, currently just regulators.
404  *
405  * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
406  * these are not always-on we need to request regulators to be turned on
407  * before we can try to access the device registers.
408  */
409 static int smsc911x_request_resources(struct platform_device *pdev)
410 {
411  struct net_device *ndev = platform_get_drvdata(pdev);
412  struct smsc911x_data *pdata = netdev_priv(ndev);
413  int ret = 0;
414 
415  /* Request regulators */
416  pdata->supplies[0].supply = "vdd33a";
417  pdata->supplies[1].supply = "vddvario";
418  ret = regulator_bulk_get(&pdev->dev,
419  ARRAY_SIZE(pdata->supplies),
420  pdata->supplies);
421  if (ret)
422  netdev_err(ndev, "couldn't get regulators %d\n",
423  ret);
424  return ret;
425 }
426 
427 /*
428  * Free resources, currently just regulators.
429  *
430  */
431 static void smsc911x_free_resources(struct platform_device *pdev)
432 {
433  struct net_device *ndev = platform_get_drvdata(pdev);
434  struct smsc911x_data *pdata = netdev_priv(ndev);
435 
436  /* Free regulators */
437  regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
438  pdata->supplies);
439 }
440 
441 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
442  * and smsc911x_mac_write, so assumes mac_lock is held */
443 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
444 {
445  int i;
446  u32 val;
447 
448  SMSC_ASSERT_MAC_LOCK(pdata);
449 
450  for (i = 0; i < 40; i++) {
451  val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
452  if (!(val & MAC_CSR_CMD_CSR_BUSY_))
453  return 0;
454  }
455  SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
456  "MAC_CSR_CMD: 0x%08X", val);
457  return -EIO;
458 }
459 
460 /* Fetches a MAC register value. Assumes mac_lock is acquired */
461 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
462 {
463  unsigned int temp;
464 
465  SMSC_ASSERT_MAC_LOCK(pdata);
466 
467  temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
468  if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
469  SMSC_WARN(pdata, hw, "MAC busy at entry");
470  return 0xFFFFFFFF;
471  }
472 
473  /* Send the MAC cmd */
474  smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
475  MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
476 
477  /* Workaround for hardware read-after-write restriction */
478  temp = smsc911x_reg_read(pdata, BYTE_TEST);
479 
480  /* Wait for the read to complete */
481  if (likely(smsc911x_mac_complete(pdata) == 0))
482  return smsc911x_reg_read(pdata, MAC_CSR_DATA);
483 
484  SMSC_WARN(pdata, hw, "MAC busy after read");
485  return 0xFFFFFFFF;
486 }
487 
488 /* Set a mac register, mac_lock must be acquired before calling */
489 static void smsc911x_mac_write(struct smsc911x_data *pdata,
490  unsigned int offset, u32 val)
491 {
492  unsigned int temp;
493 
494  SMSC_ASSERT_MAC_LOCK(pdata);
495 
496  temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
497  if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
498  SMSC_WARN(pdata, hw,
499  "smsc911x_mac_write failed, MAC busy at entry");
500  return;
501  }
502 
503  /* Send data to write */
504  smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
505 
506  /* Write the actual data */
507  smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
508  MAC_CSR_CMD_CSR_BUSY_));
509 
510  /* Workaround for hardware read-after-write restriction */
511  temp = smsc911x_reg_read(pdata, BYTE_TEST);
512 
513  /* Wait for the write to complete */
514  if (likely(smsc911x_mac_complete(pdata) == 0))
515  return;
516 
517  SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
518 }
519 
520 /* Get a phy register */
521 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
522 {
523  struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
524  unsigned long flags;
525  unsigned int addr;
526  int i, reg;
527 
528  spin_lock_irqsave(&pdata->mac_lock, flags);
529 
530  /* Confirm MII not busy */
531  if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
532  SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
533  reg = -EIO;
534  goto out;
535  }
536 
537  /* Set the address, index & direction (read from PHY) */
538  addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
539  smsc911x_mac_write(pdata, MII_ACC, addr);
540 
541  /* Wait for read to complete w/ timeout */
542  for (i = 0; i < 100; i++)
543  if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
544  reg = smsc911x_mac_read(pdata, MII_DATA);
545  goto out;
546  }
547 
548  SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
549  reg = -EIO;
550 
551 out:
552  spin_unlock_irqrestore(&pdata->mac_lock, flags);
553  return reg;
554 }
555 
556 /* Set a phy register */
557 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
558  u16 val)
559 {
560  struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
561  unsigned long flags;
562  unsigned int addr;
563  int i, reg;
564 
565  spin_lock_irqsave(&pdata->mac_lock, flags);
566 
567  /* Confirm MII not busy */
568  if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
569  SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
570  reg = -EIO;
571  goto out;
572  }
573 
574  /* Put the data to write in the MAC */
575  smsc911x_mac_write(pdata, MII_DATA, val);
576 
577  /* Set the address, index & direction (write to PHY) */
578  addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
579  MII_ACC_MII_WRITE_;
580  smsc911x_mac_write(pdata, MII_ACC, addr);
581 
582  /* Wait for write to complete w/ timeout */
583  for (i = 0; i < 100; i++)
584  if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
585  reg = 0;
586  goto out;
587  }
588 
589  SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
590  reg = -EIO;
591 
592 out:
593  spin_unlock_irqrestore(&pdata->mac_lock, flags);
594  return reg;
595 }
596 
597 /* Switch to external phy. Assumes tx and rx are stopped. */
598 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
599 {
600  unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
601 
602  /* Disable phy clocks to the MAC */
603  hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
604  hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
605  smsc911x_reg_write(pdata, HW_CFG, hwcfg);
606  udelay(10); /* Enough time for clocks to stop */
607 
608  /* Switch to external phy */
609  hwcfg |= HW_CFG_EXT_PHY_EN_;
610  smsc911x_reg_write(pdata, HW_CFG, hwcfg);
611 
612  /* Enable phy clocks to the MAC */
613  hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
614  hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
615  smsc911x_reg_write(pdata, HW_CFG, hwcfg);
616  udelay(10); /* Enough time for clocks to restart */
617 
618  hwcfg |= HW_CFG_SMI_SEL_;
619  smsc911x_reg_write(pdata, HW_CFG, hwcfg);
620 }
621 
622 /* Autodetects and enables external phy if present on supported chips.
623  * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
624  * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
625 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
626 {
627  unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
628 
629  if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
630  SMSC_TRACE(pdata, hw, "Forcing internal PHY");
631  pdata->using_extphy = 0;
632  } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
633  SMSC_TRACE(pdata, hw, "Forcing external PHY");
634  smsc911x_phy_enable_external(pdata);
635  pdata->using_extphy = 1;
636  } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
637  SMSC_TRACE(pdata, hw,
638  "HW_CFG EXT_PHY_DET set, using external PHY");
639  smsc911x_phy_enable_external(pdata);
640  pdata->using_extphy = 1;
641  } else {
642  SMSC_TRACE(pdata, hw,
643  "HW_CFG EXT_PHY_DET clear, using internal PHY");
644  pdata->using_extphy = 0;
645  }
646 }
647 
648 /* Fetches a tx status out of the status fifo */
649 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
650 {
651  unsigned int result =
652  smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
653 
654  if (result != 0)
655  result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
656 
657  return result;
658 }
659 
660 /* Fetches the next rx status */
661 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
662 {
663  unsigned int result =
664  smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
665 
666  if (result != 0)
667  result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
668 
669  return result;
670 }
671 
672 #ifdef USE_PHY_WORK_AROUND
673 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
674 {
675  unsigned int tries;
676  u32 wrsz;
677  u32 rdsz;
678  ulong bufp;
679 
680  for (tries = 0; tries < 10; tries++) {
681  unsigned int txcmd_a;
682  unsigned int txcmd_b;
683  unsigned int status;
684  unsigned int pktlength;
685  unsigned int i;
686 
687  /* Zero-out rx packet memory */
688  memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
689 
690  /* Write tx packet to 118 */
691  txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
692  txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
693  txcmd_a |= MIN_PACKET_SIZE;
694 
695  txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
696 
697  smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
698  smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
699 
700  bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
701  wrsz = MIN_PACKET_SIZE + 3;
702  wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
703  wrsz >>= 2;
704 
705  pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
706 
707  /* Wait till transmit is done */
708  i = 60;
709  do {
710  udelay(5);
711  status = smsc911x_tx_get_txstatus(pdata);
712  } while ((i--) && (!status));
713 
714  if (!status) {
715  SMSC_WARN(pdata, hw,
716  "Failed to transmit during loopback test");
717  continue;
718  }
719  if (status & TX_STS_ES_) {
720  SMSC_WARN(pdata, hw,
721  "Transmit encountered errors during loopback test");
722  continue;
723  }
724 
725  /* Wait till receive is done */
726  i = 60;
727  do {
728  udelay(5);
729  status = smsc911x_rx_get_rxstatus(pdata);
730  } while ((i--) && (!status));
731 
732  if (!status) {
733  SMSC_WARN(pdata, hw,
734  "Failed to receive during loopback test");
735  continue;
736  }
737  if (status & RX_STS_ES_) {
738  SMSC_WARN(pdata, hw,
739  "Receive encountered errors during loopback test");
740  continue;
741  }
742 
743  pktlength = ((status & 0x3FFF0000UL) >> 16);
744  bufp = (ulong)pdata->loopback_rx_pkt;
745  rdsz = pktlength + 3;
746  rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
747  rdsz >>= 2;
748 
749  pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
750 
751  if (pktlength != (MIN_PACKET_SIZE + 4)) {
752  SMSC_WARN(pdata, hw, "Unexpected packet size "
753  "during loop back test, size=%d, will retry",
754  pktlength);
755  } else {
756  unsigned int j;
757  int mismatch = 0;
758  for (j = 0; j < MIN_PACKET_SIZE; j++) {
759  if (pdata->loopback_tx_pkt[j]
760  != pdata->loopback_rx_pkt[j]) {
761  mismatch = 1;
762  break;
763  }
764  }
765  if (!mismatch) {
766  SMSC_TRACE(pdata, hw, "Successfully verified "
767  "loopback packet");
768  return 0;
769  } else {
770  SMSC_WARN(pdata, hw, "Data mismatch "
771  "during loop back test, will retry");
772  }
773  }
774  }
775 
776  return -EIO;
777 }
778 
779 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
780 {
781  struct phy_device *phy_dev = pdata->phy_dev;
782  unsigned int temp;
783  unsigned int i = 100000;
784 
785  BUG_ON(!phy_dev);
786  BUG_ON(!phy_dev->bus);
787 
788  SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
789  smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
790  do {
791  msleep(1);
792  temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
793  MII_BMCR);
794  } while ((i--) && (temp & BMCR_RESET));
795 
796  if (temp & BMCR_RESET) {
797  SMSC_WARN(pdata, hw, "PHY reset failed to complete");
798  return -EIO;
799  }
800  /* Extra delay required because the phy may not be completed with
801  * its reset when BMCR_RESET is cleared. Specs say 256 uS is
802  * enough delay but using 1ms here to be safe */
803  msleep(1);
804 
805  return 0;
806 }
807 
808 static int smsc911x_phy_loopbacktest(struct net_device *dev)
809 {
810  struct smsc911x_data *pdata = netdev_priv(dev);
811  struct phy_device *phy_dev = pdata->phy_dev;
812  int result = -EIO;
813  unsigned int i, val;
814  unsigned long flags;
815 
816  /* Initialise tx packet using broadcast destination address */
817  memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
818 
819  /* Use incrementing source address */
820  for (i = 6; i < 12; i++)
821  pdata->loopback_tx_pkt[i] = (char)i;
822 
823  /* Set length type field */
824  pdata->loopback_tx_pkt[12] = 0x00;
825  pdata->loopback_tx_pkt[13] = 0x00;
826 
827  for (i = 14; i < MIN_PACKET_SIZE; i++)
828  pdata->loopback_tx_pkt[i] = (char)i;
829 
830  val = smsc911x_reg_read(pdata, HW_CFG);
831  val &= HW_CFG_TX_FIF_SZ_;
832  val |= HW_CFG_SF_;
833  smsc911x_reg_write(pdata, HW_CFG, val);
834 
835  smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
836  smsc911x_reg_write(pdata, RX_CFG,
837  (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
838 
839  for (i = 0; i < 10; i++) {
840  /* Set PHY to 10/FD, no ANEG, and loopback mode */
841  smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
842  BMCR_LOOPBACK | BMCR_FULLDPLX);
843 
844  /* Enable MAC tx/rx, FD */
845  spin_lock_irqsave(&pdata->mac_lock, flags);
846  smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
847  | MAC_CR_TXEN_ | MAC_CR_RXEN_);
848  spin_unlock_irqrestore(&pdata->mac_lock, flags);
849 
850  if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
851  result = 0;
852  break;
853  }
854  pdata->resetcount++;
855 
856  /* Disable MAC rx */
857  spin_lock_irqsave(&pdata->mac_lock, flags);
858  smsc911x_mac_write(pdata, MAC_CR, 0);
859  spin_unlock_irqrestore(&pdata->mac_lock, flags);
860 
861  smsc911x_phy_reset(pdata);
862  }
863 
864  /* Disable MAC */
865  spin_lock_irqsave(&pdata->mac_lock, flags);
866  smsc911x_mac_write(pdata, MAC_CR, 0);
867  spin_unlock_irqrestore(&pdata->mac_lock, flags);
868 
869  /* Cancel PHY loopback mode */
870  smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
871 
872  smsc911x_reg_write(pdata, TX_CFG, 0);
873  smsc911x_reg_write(pdata, RX_CFG, 0);
874 
875  return result;
876 }
877 #endif /* USE_PHY_WORK_AROUND */
878 
879 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
880 {
881  struct phy_device *phy_dev = pdata->phy_dev;
882  u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
883  u32 flow;
884  unsigned long flags;
885 
886  if (phy_dev->duplex == DUPLEX_FULL) {
887  u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
888  u16 rmtadv = phy_read(phy_dev, MII_LPA);
889  u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
890 
891  if (cap & FLOW_CTRL_RX)
892  flow = 0xFFFF0002;
893  else
894  flow = 0;
895 
896  if (cap & FLOW_CTRL_TX)
897  afc |= 0xF;
898  else
899  afc &= ~0xF;
900 
901  SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
902  (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
903  (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
904  } else {
905  SMSC_TRACE(pdata, hw, "half duplex");
906  flow = 0;
907  afc |= 0xF;
908  }
909 
910  spin_lock_irqsave(&pdata->mac_lock, flags);
911  smsc911x_mac_write(pdata, FLOW, flow);
912  spin_unlock_irqrestore(&pdata->mac_lock, flags);
913 
914  smsc911x_reg_write(pdata, AFC_CFG, afc);
915 }
916 
917 /* Update link mode if anything has changed. Called periodically when the
918  * PHY is in polling mode, even if nothing has changed. */
919 static void smsc911x_phy_adjust_link(struct net_device *dev)
920 {
921  struct smsc911x_data *pdata = netdev_priv(dev);
922  struct phy_device *phy_dev = pdata->phy_dev;
923  unsigned long flags;
924  int carrier;
925 
926  if (phy_dev->duplex != pdata->last_duplex) {
927  unsigned int mac_cr;
928  SMSC_TRACE(pdata, hw, "duplex state has changed");
929 
930  spin_lock_irqsave(&pdata->mac_lock, flags);
931  mac_cr = smsc911x_mac_read(pdata, MAC_CR);
932  if (phy_dev->duplex) {
933  SMSC_TRACE(pdata, hw,
934  "configuring for full duplex mode");
935  mac_cr |= MAC_CR_FDPX_;
936  } else {
937  SMSC_TRACE(pdata, hw,
938  "configuring for half duplex mode");
939  mac_cr &= ~MAC_CR_FDPX_;
940  }
941  smsc911x_mac_write(pdata, MAC_CR, mac_cr);
942  spin_unlock_irqrestore(&pdata->mac_lock, flags);
943 
944  smsc911x_phy_update_flowcontrol(pdata);
945  pdata->last_duplex = phy_dev->duplex;
946  }
947 
948  carrier = netif_carrier_ok(dev);
949  if (carrier != pdata->last_carrier) {
950  SMSC_TRACE(pdata, hw, "carrier state has changed");
951  if (carrier) {
952  SMSC_TRACE(pdata, hw, "configuring for carrier OK");
953  if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
954  (!pdata->using_extphy)) {
955  /* Restore original GPIO configuration */
956  pdata->gpio_setting = pdata->gpio_orig_setting;
957  smsc911x_reg_write(pdata, GPIO_CFG,
958  pdata->gpio_setting);
959  }
960  } else {
961  SMSC_TRACE(pdata, hw, "configuring for no carrier");
962  /* Check global setting that LED1
963  * usage is 10/100 indicator */
964  pdata->gpio_setting = smsc911x_reg_read(pdata,
965  GPIO_CFG);
966  if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
967  (!pdata->using_extphy)) {
968  /* Force 10/100 LED off, after saving
969  * original GPIO configuration */
970  pdata->gpio_orig_setting = pdata->gpio_setting;
971 
972  pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
973  pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
974  | GPIO_CFG_GPIODIR0_
975  | GPIO_CFG_GPIOD0_);
976  smsc911x_reg_write(pdata, GPIO_CFG,
977  pdata->gpio_setting);
978  }
979  }
980  pdata->last_carrier = carrier;
981  }
982 }
983 
984 static int smsc911x_mii_probe(struct net_device *dev)
985 {
986  struct smsc911x_data *pdata = netdev_priv(dev);
987  struct phy_device *phydev = NULL;
988  int ret;
989 
990  /* find the first phy */
991  phydev = phy_find_first(pdata->mii_bus);
992  if (!phydev) {
993  netdev_err(dev, "no PHY found\n");
994  return -ENODEV;
995  }
996 
997  SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
998  phydev->addr, phydev->phy_id);
999 
1000  ret = phy_connect_direct(dev, phydev,
1001  &smsc911x_phy_adjust_link, 0,
1002  pdata->config.phy_interface);
1003 
1004  if (ret) {
1005  netdev_err(dev, "Could not attach to PHY\n");
1006  return ret;
1007  }
1008 
1009  netdev_info(dev,
1010  "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1011  phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1012 
1013  /* mask with MAC supported features */
1014  phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1015  SUPPORTED_Asym_Pause);
1016  phydev->advertising = phydev->supported;
1017 
1018  pdata->phy_dev = phydev;
1019  pdata->last_duplex = -1;
1020  pdata->last_carrier = -1;
1021 
1022 #ifdef USE_PHY_WORK_AROUND
1023  if (smsc911x_phy_loopbacktest(dev) < 0) {
1024  SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1025  return -ENODEV;
1026  }
1027  SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1028 #endif /* USE_PHY_WORK_AROUND */
1029 
1030  SMSC_TRACE(pdata, hw, "phy initialised successfully");
1031  return 0;
1032 }
1033 
1034 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
1035  struct net_device *dev)
1036 {
1037  struct smsc911x_data *pdata = netdev_priv(dev);
1038  int err = -ENXIO, i;
1039 
1040  pdata->mii_bus = mdiobus_alloc();
1041  if (!pdata->mii_bus) {
1042  err = -ENOMEM;
1043  goto err_out_1;
1044  }
1045 
1046  pdata->mii_bus->name = SMSC_MDIONAME;
1047  snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1048  pdev->name, pdev->id);
1049  pdata->mii_bus->priv = pdata;
1050  pdata->mii_bus->read = smsc911x_mii_read;
1051  pdata->mii_bus->write = smsc911x_mii_write;
1052  pdata->mii_bus->irq = pdata->phy_irq;
1053  for (i = 0; i < PHY_MAX_ADDR; ++i)
1054  pdata->mii_bus->irq[i] = PHY_POLL;
1055 
1056  pdata->mii_bus->parent = &pdev->dev;
1057 
1058  switch (pdata->idrev & 0xFFFF0000) {
1059  case 0x01170000:
1060  case 0x01150000:
1061  case 0x117A0000:
1062  case 0x115A0000:
1063  /* External PHY supported, try to autodetect */
1064  smsc911x_phy_initialise_external(pdata);
1065  break;
1066  default:
1067  SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1068  "using internal PHY");
1069  pdata->using_extphy = 0;
1070  break;
1071  }
1072 
1073  if (!pdata->using_extphy) {
1074  /* Mask all PHYs except ID 1 (internal) */
1075  pdata->mii_bus->phy_mask = ~(1 << 1);
1076  }
1077 
1078  if (mdiobus_register(pdata->mii_bus)) {
1079  SMSC_WARN(pdata, probe, "Error registering mii bus");
1080  goto err_out_free_bus_2;
1081  }
1082 
1083  if (smsc911x_mii_probe(dev) < 0) {
1084  SMSC_WARN(pdata, probe, "Error registering mii bus");
1085  goto err_out_unregister_bus_3;
1086  }
1087 
1088  return 0;
1089 
1090 err_out_unregister_bus_3:
1091  mdiobus_unregister(pdata->mii_bus);
1092 err_out_free_bus_2:
1093  mdiobus_free(pdata->mii_bus);
1094 err_out_1:
1095  return err;
1096 }
1097 
1098 /* Gets the number of tx statuses in the fifo */
1099 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1100 {
1101  return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1102  & TX_FIFO_INF_TSUSED_) >> 16;
1103 }
1104 
1105 /* Reads tx statuses and increments counters where necessary */
1106 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1107 {
1108  struct smsc911x_data *pdata = netdev_priv(dev);
1109  unsigned int tx_stat;
1110 
1111  while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1112  if (unlikely(tx_stat & 0x80000000)) {
1113  /* In this driver the packet tag is used as the packet
1114  * length. Since a packet length can never reach the
1115  * size of 0x8000, this bit is reserved. It is worth
1116  * noting that the "reserved bit" in the warning above
1117  * does not reference a hardware defined reserved bit
1118  * but rather a driver defined one.
1119  */
1120  SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1121  } else {
1122  if (unlikely(tx_stat & TX_STS_ES_)) {
1123  dev->stats.tx_errors++;
1124  } else {
1125  dev->stats.tx_packets++;
1126  dev->stats.tx_bytes += (tx_stat >> 16);
1127  }
1128  if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1129  dev->stats.collisions += 16;
1130  dev->stats.tx_aborted_errors += 1;
1131  } else {
1132  dev->stats.collisions +=
1133  ((tx_stat >> 3) & 0xF);
1134  }
1135  if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1136  dev->stats.tx_carrier_errors += 1;
1137  if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1138  dev->stats.collisions++;
1139  dev->stats.tx_aborted_errors++;
1140  }
1141  }
1142  }
1143 }
1144 
1145 /* Increments the Rx error counters */
1146 static void
1147 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1148 {
1149  int crc_err = 0;
1150 
1151  if (unlikely(rxstat & RX_STS_ES_)) {
1152  dev->stats.rx_errors++;
1153  if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1154  dev->stats.rx_crc_errors++;
1155  crc_err = 1;
1156  }
1157  }
1158  if (likely(!crc_err)) {
1159  if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1160  (rxstat & RX_STS_LENGTH_ERR_)))
1161  dev->stats.rx_length_errors++;
1162  if (rxstat & RX_STS_MCAST_)
1163  dev->stats.multicast++;
1164  }
1165 }
1166 
1167 /* Quickly dumps bad packets */
1168 static void
1169 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1170 {
1171  if (likely(pktwords >= 4)) {
1172  unsigned int timeout = 500;
1173  unsigned int val;
1174  smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1175  do {
1176  udelay(1);
1177  val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1178  } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1179 
1180  if (unlikely(timeout == 0))
1181  SMSC_WARN(pdata, hw, "Timed out waiting for "
1182  "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1183  } else {
1184  unsigned int temp;
1185  while (pktwords--)
1186  temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1187  }
1188 }
1189 
1190 /* NAPI poll function */
1191 static int smsc911x_poll(struct napi_struct *napi, int budget)
1192 {
1193  struct smsc911x_data *pdata =
1194  container_of(napi, struct smsc911x_data, napi);
1195  struct net_device *dev = pdata->dev;
1196  int npackets = 0;
1197 
1198  while (npackets < budget) {
1199  unsigned int pktlength;
1200  unsigned int pktwords;
1201  struct sk_buff *skb;
1202  unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1203 
1204  if (!rxstat) {
1205  unsigned int temp;
1206  /* We processed all packets available. Tell NAPI it can
1207  * stop polling then re-enable rx interrupts */
1208  smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1209  napi_complete(napi);
1210  temp = smsc911x_reg_read(pdata, INT_EN);
1211  temp |= INT_EN_RSFL_EN_;
1212  smsc911x_reg_write(pdata, INT_EN, temp);
1213  break;
1214  }
1215 
1216  /* Count packet for NAPI scheduling, even if it has an error.
1217  * Error packets still require cycles to discard */
1218  npackets++;
1219 
1220  pktlength = ((rxstat & 0x3FFF0000) >> 16);
1221  pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1222  smsc911x_rx_counterrors(dev, rxstat);
1223 
1224  if (unlikely(rxstat & RX_STS_ES_)) {
1225  SMSC_WARN(pdata, rx_err,
1226  "Discarding packet with error bit set");
1227  /* Packet has an error, discard it and continue with
1228  * the next */
1229  smsc911x_rx_fastforward(pdata, pktwords);
1230  dev->stats.rx_dropped++;
1231  continue;
1232  }
1233 
1234  skb = netdev_alloc_skb(dev, pktwords << 2);
1235  if (unlikely(!skb)) {
1236  SMSC_WARN(pdata, rx_err,
1237  "Unable to allocate skb for rx packet");
1238  /* Drop the packet and stop this polling iteration */
1239  smsc911x_rx_fastforward(pdata, pktwords);
1240  dev->stats.rx_dropped++;
1241  break;
1242  }
1243 
1244  pdata->ops->rx_readfifo(pdata,
1245  (unsigned int *)skb->data, pktwords);
1246 
1247  /* Align IP on 16B boundary */
1248  skb_reserve(skb, NET_IP_ALIGN);
1249  skb_put(skb, pktlength - 4);
1250  skb->protocol = eth_type_trans(skb, dev);
1251  skb_checksum_none_assert(skb);
1252  netif_receive_skb(skb);
1253 
1254  /* Update counters */
1255  dev->stats.rx_packets++;
1256  dev->stats.rx_bytes += (pktlength - 4);
1257  }
1258 
1259  /* Return total received packets */
1260  return npackets;
1261 }
1262 
1263 /* Returns hash bit number for given MAC address
1264  * Example:
1265  * 01 00 5E 00 00 01 -> returns bit number 31 */
1266 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1267 {
1268  return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1269 }
1270 
1271 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1272 {
1273  /* Performs the multicast & mac_cr update. This is called when
1274  * safe on the current hardware, and with the mac_lock held */
1275  unsigned int mac_cr;
1276 
1277  SMSC_ASSERT_MAC_LOCK(pdata);
1278 
1279  mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1280  mac_cr |= pdata->set_bits_mask;
1281  mac_cr &= ~(pdata->clear_bits_mask);
1282  smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1283  smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1284  smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1285  SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1286  mac_cr, pdata->hashhi, pdata->hashlo);
1287 }
1288 
1289 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1290 {
1291  unsigned int mac_cr;
1292 
1293  /* This function is only called for older LAN911x devices
1294  * (revA or revB), where MAC_CR, HASHH and HASHL should not
1295  * be modified during Rx - newer devices immediately update the
1296  * registers.
1297  *
1298  * This is called from interrupt context */
1299 
1300  spin_lock(&pdata->mac_lock);
1301 
1302  /* Check Rx has stopped */
1303  if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1304  SMSC_WARN(pdata, drv, "Rx not stopped");
1305 
1306  /* Perform the update - safe to do now Rx has stopped */
1307  smsc911x_rx_multicast_update(pdata);
1308 
1309  /* Re-enable Rx */
1310  mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1311  mac_cr |= MAC_CR_RXEN_;
1312  smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1313 
1314  pdata->multicast_update_pending = 0;
1315 
1316  spin_unlock(&pdata->mac_lock);
1317 }
1318 
1319 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1320 {
1321  int rc = 0;
1322 
1323  if (!pdata->phy_dev)
1324  return rc;
1325 
1326  rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1327 
1328  if (rc < 0) {
1329  SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1330  return rc;
1331  }
1332 
1333  /*
1334  * If energy is detected the PHY is already awake so is not necessary
1335  * to disable the energy detect power-down mode.
1336  */
1337  if ((rc & MII_LAN83C185_EDPWRDOWN) &&
1338  !(rc & MII_LAN83C185_ENERGYON)) {
1339  /* Disable energy detect mode for this SMSC Transceivers */
1340  rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1341  rc & (~MII_LAN83C185_EDPWRDOWN));
1342 
1343  if (rc < 0) {
1344  SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1345  return rc;
1346  }
1347 
1348  mdelay(1);
1349  }
1350 
1351  return 0;
1352 }
1353 
1354 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1355 {
1356  int rc = 0;
1357 
1358  if (!pdata->phy_dev)
1359  return rc;
1360 
1361  rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1362 
1363  if (rc < 0) {
1364  SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1365  return rc;
1366  }
1367 
1368  /* Only enable if energy detect mode is already disabled */
1369  if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1370  mdelay(100);
1371  /* Enable energy detect mode for this SMSC Transceivers */
1372  rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1373  rc | MII_LAN83C185_EDPWRDOWN);
1374 
1375  if (rc < 0) {
1376  SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1377  return rc;
1378  }
1379 
1380  mdelay(1);
1381  }
1382  return 0;
1383 }
1384 
1385 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1386 {
1387  unsigned int timeout;
1388  unsigned int temp;
1389  int ret;
1390 
1391  /*
1392  * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1393  * are initialized in a Energy Detect Power-Down mode that prevents
1394  * the MAC chip to be software reseted. So we have to wakeup the PHY
1395  * before.
1396  */
1397  if (pdata->generation == 4) {
1398  ret = smsc911x_phy_disable_energy_detect(pdata);
1399 
1400  if (ret) {
1401  SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1402  return ret;
1403  }
1404  }
1405 
1406  /* Reset the LAN911x */
1407  smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1408  timeout = 10;
1409  do {
1410  udelay(10);
1411  temp = smsc911x_reg_read(pdata, HW_CFG);
1412  } while ((--timeout) && (temp & HW_CFG_SRST_));
1413 
1414  if (unlikely(temp & HW_CFG_SRST_)) {
1415  SMSC_WARN(pdata, drv, "Failed to complete reset");
1416  return -EIO;
1417  }
1418 
1419  if (pdata->generation == 4) {
1420  ret = smsc911x_phy_enable_energy_detect(pdata);
1421 
1422  if (ret) {
1423  SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1424  return ret;
1425  }
1426  }
1427 
1428  return 0;
1429 }
1430 
1431 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1432 static void
1433 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1434 {
1435  u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1436  u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1437  (dev_addr[1] << 8) | dev_addr[0];
1438 
1439  SMSC_ASSERT_MAC_LOCK(pdata);
1440 
1441  smsc911x_mac_write(pdata, ADDRH, mac_high16);
1442  smsc911x_mac_write(pdata, ADDRL, mac_low32);
1443 }
1444 
1445 static void smsc911x_disable_irq_chip(struct net_device *dev)
1446 {
1447  struct smsc911x_data *pdata = netdev_priv(dev);
1448 
1449  smsc911x_reg_write(pdata, INT_EN, 0);
1450  smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1451 }
1452 
1453 static int smsc911x_open(struct net_device *dev)
1454 {
1455  struct smsc911x_data *pdata = netdev_priv(dev);
1456  unsigned int timeout;
1457  unsigned int temp;
1458  unsigned int intcfg;
1459 
1460  /* if the phy is not yet registered, retry later*/
1461  if (!pdata->phy_dev) {
1462  SMSC_WARN(pdata, hw, "phy_dev is NULL");
1463  return -EAGAIN;
1464  }
1465 
1466  if (!is_valid_ether_addr(dev->dev_addr)) {
1467  SMSC_WARN(pdata, hw, "dev_addr is not a valid MAC address");
1468  return -EADDRNOTAVAIL;
1469  }
1470 
1471  /* Reset the LAN911x */
1472  if (smsc911x_soft_reset(pdata)) {
1473  SMSC_WARN(pdata, hw, "soft reset failed");
1474  return -EIO;
1475  }
1476 
1477  smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1478  smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1479 
1480  /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1481  spin_lock_irq(&pdata->mac_lock);
1482  smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1483  spin_unlock_irq(&pdata->mac_lock);
1484 
1485  /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1486  timeout = 50;
1487  while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1488  --timeout) {
1489  udelay(10);
1490  }
1491 
1492  if (unlikely(timeout == 0))
1493  SMSC_WARN(pdata, ifup,
1494  "Timed out waiting for EEPROM busy bit to clear");
1495 
1496  smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1497 
1498  /* The soft reset above cleared the device's MAC address,
1499  * restore it from local copy (set in probe) */
1500  spin_lock_irq(&pdata->mac_lock);
1501  smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1502  spin_unlock_irq(&pdata->mac_lock);
1503 
1504  /* Initialise irqs, but leave all sources disabled */
1505  smsc911x_disable_irq_chip(dev);
1506 
1507  /* Set interrupt deassertion to 100uS */
1508  intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1509 
1510  if (pdata->config.irq_polarity) {
1511  SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1512  intcfg |= INT_CFG_IRQ_POL_;
1513  } else {
1514  SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1515  }
1516 
1517  if (pdata->config.irq_type) {
1518  SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1519  intcfg |= INT_CFG_IRQ_TYPE_;
1520  } else {
1521  SMSC_TRACE(pdata, ifup, "irq type: open drain");
1522  }
1523 
1524  smsc911x_reg_write(pdata, INT_CFG, intcfg);
1525 
1526  SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1527  pdata->software_irq_signal = 0;
1528  smp_wmb();
1529 
1530  temp = smsc911x_reg_read(pdata, INT_EN);
1531  temp |= INT_EN_SW_INT_EN_;
1532  smsc911x_reg_write(pdata, INT_EN, temp);
1533 
1534  timeout = 1000;
1535  while (timeout--) {
1536  if (pdata->software_irq_signal)
1537  break;
1538  msleep(1);
1539  }
1540 
1541  if (!pdata->software_irq_signal) {
1542  netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1543  dev->irq);
1544  return -ENODEV;
1545  }
1546  SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1547  dev->irq);
1548 
1549  netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1550  (unsigned long)pdata->ioaddr, dev->irq);
1551 
1552  /* Reset the last known duplex and carrier */
1553  pdata->last_duplex = -1;
1554  pdata->last_carrier = -1;
1555 
1556  /* Bring the PHY up */
1557  phy_start(pdata->phy_dev);
1558 
1559  temp = smsc911x_reg_read(pdata, HW_CFG);
1560  /* Preserve TX FIFO size and external PHY configuration */
1561  temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1562  temp |= HW_CFG_SF_;
1563  smsc911x_reg_write(pdata, HW_CFG, temp);
1564 
1565  temp = smsc911x_reg_read(pdata, FIFO_INT);
1566  temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1567  temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1568  smsc911x_reg_write(pdata, FIFO_INT, temp);
1569 
1570  /* set RX Data offset to 2 bytes for alignment */
1571  smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1572 
1573  /* enable NAPI polling before enabling RX interrupts */
1574  napi_enable(&pdata->napi);
1575 
1576  temp = smsc911x_reg_read(pdata, INT_EN);
1577  temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1578  smsc911x_reg_write(pdata, INT_EN, temp);
1579 
1580  spin_lock_irq(&pdata->mac_lock);
1581  temp = smsc911x_mac_read(pdata, MAC_CR);
1582  temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1583  smsc911x_mac_write(pdata, MAC_CR, temp);
1584  spin_unlock_irq(&pdata->mac_lock);
1585 
1586  smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1587 
1588  netif_start_queue(dev);
1589  return 0;
1590 }
1591 
1592 /* Entry point for stopping the interface */
1593 static int smsc911x_stop(struct net_device *dev)
1594 {
1595  struct smsc911x_data *pdata = netdev_priv(dev);
1596  unsigned int temp;
1597 
1598  /* Disable all device interrupts */
1599  temp = smsc911x_reg_read(pdata, INT_CFG);
1600  temp &= ~INT_CFG_IRQ_EN_;
1601  smsc911x_reg_write(pdata, INT_CFG, temp);
1602 
1603  /* Stop Tx and Rx polling */
1604  netif_stop_queue(dev);
1605  napi_disable(&pdata->napi);
1606 
1607  /* At this point all Rx and Tx activity is stopped */
1608  dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1609  smsc911x_tx_update_txcounters(dev);
1610 
1611  /* Bring the PHY down */
1612  if (pdata->phy_dev)
1613  phy_stop(pdata->phy_dev);
1614 
1615  SMSC_TRACE(pdata, ifdown, "Interface stopped");
1616  return 0;
1617 }
1618 
1619 /* Entry point for transmitting a packet */
1620 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1621 {
1622  struct smsc911x_data *pdata = netdev_priv(dev);
1623  unsigned int freespace;
1624  unsigned int tx_cmd_a;
1625  unsigned int tx_cmd_b;
1626  unsigned int temp;
1627  u32 wrsz;
1628  ulong bufp;
1629 
1630  freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1631 
1632  if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1633  SMSC_WARN(pdata, tx_err,
1634  "Tx data fifo low, space available: %d", freespace);
1635 
1636  /* Word alignment adjustment */
1637  tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1638  tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1639  tx_cmd_a |= (unsigned int)skb->len;
1640 
1641  tx_cmd_b = ((unsigned int)skb->len) << 16;
1642  tx_cmd_b |= (unsigned int)skb->len;
1643 
1644  smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1645  smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1646 
1647  bufp = (ulong)skb->data & (~0x3);
1648  wrsz = (u32)skb->len + 3;
1649  wrsz += (u32)((ulong)skb->data & 0x3);
1650  wrsz >>= 2;
1651 
1652  pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1653  freespace -= (skb->len + 32);
1654  skb_tx_timestamp(skb);
1655  dev_kfree_skb(skb);
1656 
1657  if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1658  smsc911x_tx_update_txcounters(dev);
1659 
1660  if (freespace < TX_FIFO_LOW_THRESHOLD) {
1661  netif_stop_queue(dev);
1662  temp = smsc911x_reg_read(pdata, FIFO_INT);
1663  temp &= 0x00FFFFFF;
1664  temp |= 0x32000000;
1665  smsc911x_reg_write(pdata, FIFO_INT, temp);
1666  }
1667 
1668  return NETDEV_TX_OK;
1669 }
1670 
1671 /* Entry point for getting status counters */
1672 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1673 {
1674  struct smsc911x_data *pdata = netdev_priv(dev);
1675  smsc911x_tx_update_txcounters(dev);
1676  dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1677  return &dev->stats;
1678 }
1679 
1680 /* Entry point for setting addressing modes */
1681 static void smsc911x_set_multicast_list(struct net_device *dev)
1682 {
1683  struct smsc911x_data *pdata = netdev_priv(dev);
1684  unsigned long flags;
1685 
1686  if (dev->flags & IFF_PROMISC) {
1687  /* Enabling promiscuous mode */
1688  pdata->set_bits_mask = MAC_CR_PRMS_;
1689  pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1690  pdata->hashhi = 0;
1691  pdata->hashlo = 0;
1692  } else if (dev->flags & IFF_ALLMULTI) {
1693  /* Enabling all multicast mode */
1694  pdata->set_bits_mask = MAC_CR_MCPAS_;
1695  pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1696  pdata->hashhi = 0;
1697  pdata->hashlo = 0;
1698  } else if (!netdev_mc_empty(dev)) {
1699  /* Enabling specific multicast addresses */
1700  unsigned int hash_high = 0;
1701  unsigned int hash_low = 0;
1702  struct netdev_hw_addr *ha;
1703 
1704  pdata->set_bits_mask = MAC_CR_HPFILT_;
1705  pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1706 
1707  netdev_for_each_mc_addr(ha, dev) {
1708  unsigned int bitnum = smsc911x_hash(ha->addr);
1709  unsigned int mask = 0x01 << (bitnum & 0x1F);
1710 
1711  if (bitnum & 0x20)
1712  hash_high |= mask;
1713  else
1714  hash_low |= mask;
1715  }
1716 
1717  pdata->hashhi = hash_high;
1718  pdata->hashlo = hash_low;
1719  } else {
1720  /* Enabling local MAC address only */
1721  pdata->set_bits_mask = 0;
1722  pdata->clear_bits_mask =
1723  (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1724  pdata->hashhi = 0;
1725  pdata->hashlo = 0;
1726  }
1727 
1728  spin_lock_irqsave(&pdata->mac_lock, flags);
1729 
1730  if (pdata->generation <= 1) {
1731  /* Older hardware revision - cannot change these flags while
1732  * receiving data */
1733  if (!pdata->multicast_update_pending) {
1734  unsigned int temp;
1735  SMSC_TRACE(pdata, hw, "scheduling mcast update");
1736  pdata->multicast_update_pending = 1;
1737 
1738  /* Request the hardware to stop, then perform the
1739  * update when we get an RX_STOP interrupt */
1740  temp = smsc911x_mac_read(pdata, MAC_CR);
1741  temp &= ~(MAC_CR_RXEN_);
1742  smsc911x_mac_write(pdata, MAC_CR, temp);
1743  } else {
1744  /* There is another update pending, this should now
1745  * use the newer values */
1746  }
1747  } else {
1748  /* Newer hardware revision - can write immediately */
1749  smsc911x_rx_multicast_update(pdata);
1750  }
1751 
1752  spin_unlock_irqrestore(&pdata->mac_lock, flags);
1753 }
1754 
1755 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1756 {
1757  struct net_device *dev = dev_id;
1758  struct smsc911x_data *pdata = netdev_priv(dev);
1759  u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1760  u32 inten = smsc911x_reg_read(pdata, INT_EN);
1761  int serviced = IRQ_NONE;
1762  u32 temp;
1763 
1764  if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1765  temp = smsc911x_reg_read(pdata, INT_EN);
1766  temp &= (~INT_EN_SW_INT_EN_);
1767  smsc911x_reg_write(pdata, INT_EN, temp);
1768  smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1769  pdata->software_irq_signal = 1;
1770  smp_wmb();
1771  serviced = IRQ_HANDLED;
1772  }
1773 
1774  if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1775  /* Called when there is a multicast update scheduled and
1776  * it is now safe to complete the update */
1777  SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1778  smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1779  if (pdata->multicast_update_pending)
1780  smsc911x_rx_multicast_update_workaround(pdata);
1781  serviced = IRQ_HANDLED;
1782  }
1783 
1784  if (intsts & inten & INT_STS_TDFA_) {
1785  temp = smsc911x_reg_read(pdata, FIFO_INT);
1786  temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1787  smsc911x_reg_write(pdata, FIFO_INT, temp);
1788  smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1789  netif_wake_queue(dev);
1790  serviced = IRQ_HANDLED;
1791  }
1792 
1793  if (unlikely(intsts & inten & INT_STS_RXE_)) {
1794  SMSC_TRACE(pdata, intr, "RX Error interrupt");
1795  smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1796  serviced = IRQ_HANDLED;
1797  }
1798 
1799  if (likely(intsts & inten & INT_STS_RSFL_)) {
1800  if (likely(napi_schedule_prep(&pdata->napi))) {
1801  /* Disable Rx interrupts */
1802  temp = smsc911x_reg_read(pdata, INT_EN);
1803  temp &= (~INT_EN_RSFL_EN_);
1804  smsc911x_reg_write(pdata, INT_EN, temp);
1805  /* Schedule a NAPI poll */
1806  __napi_schedule(&pdata->napi);
1807  } else {
1808  SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1809  }
1810  serviced = IRQ_HANDLED;
1811  }
1812 
1813  return serviced;
1814 }
1815 
1816 #ifdef CONFIG_NET_POLL_CONTROLLER
1817 static void smsc911x_poll_controller(struct net_device *dev)
1818 {
1819  disable_irq(dev->irq);
1820  smsc911x_irqhandler(0, dev);
1821  enable_irq(dev->irq);
1822 }
1823 #endif /* CONFIG_NET_POLL_CONTROLLER */
1824 
1825 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1826 {
1827  struct smsc911x_data *pdata = netdev_priv(dev);
1828  struct sockaddr *addr = p;
1829 
1830  /* On older hardware revisions we cannot change the mac address
1831  * registers while receiving data. Newer devices can safely change
1832  * this at any time. */
1833  if (pdata->generation <= 1 && netif_running(dev))
1834  return -EBUSY;
1835 
1836  if (!is_valid_ether_addr(addr->sa_data))
1837  return -EADDRNOTAVAIL;
1838 
1839  dev->addr_assign_type &= ~NET_ADDR_RANDOM;
1840  memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1841 
1842  spin_lock_irq(&pdata->mac_lock);
1843  smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1844  spin_unlock_irq(&pdata->mac_lock);
1845 
1846  netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1847 
1848  return 0;
1849 }
1850 
1851 /* Standard ioctls for mii-tool */
1852 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1853 {
1854  struct smsc911x_data *pdata = netdev_priv(dev);
1855 
1856  if (!netif_running(dev) || !pdata->phy_dev)
1857  return -EINVAL;
1858 
1859  return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1860 }
1861 
1862 static int
1863 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1864 {
1865  struct smsc911x_data *pdata = netdev_priv(dev);
1866 
1867  cmd->maxtxpkt = 1;
1868  cmd->maxrxpkt = 1;
1869  return phy_ethtool_gset(pdata->phy_dev, cmd);
1870 }
1871 
1872 static int
1873 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1874 {
1875  struct smsc911x_data *pdata = netdev_priv(dev);
1876 
1877  return phy_ethtool_sset(pdata->phy_dev, cmd);
1878 }
1879 
1880 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1881  struct ethtool_drvinfo *info)
1882 {
1883  strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1884  strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1885  strlcpy(info->bus_info, dev_name(dev->dev.parent),
1886  sizeof(info->bus_info));
1887 }
1888 
1889 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1890 {
1891  struct smsc911x_data *pdata = netdev_priv(dev);
1892 
1893  return phy_start_aneg(pdata->phy_dev);
1894 }
1895 
1896 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1897 {
1898  struct smsc911x_data *pdata = netdev_priv(dev);
1899  return pdata->msg_enable;
1900 }
1901 
1902 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1903 {
1904  struct smsc911x_data *pdata = netdev_priv(dev);
1905  pdata->msg_enable = level;
1906 }
1907 
1908 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1909 {
1910  return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1911  sizeof(u32);
1912 }
1913 
1914 static void
1915 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1916  void *buf)
1917 {
1918  struct smsc911x_data *pdata = netdev_priv(dev);
1919  struct phy_device *phy_dev = pdata->phy_dev;
1920  unsigned long flags;
1921  unsigned int i;
1922  unsigned int j = 0;
1923  u32 *data = buf;
1924 
1925  regs->version = pdata->idrev;
1926  for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1927  data[j++] = smsc911x_reg_read(pdata, i);
1928 
1929  for (i = MAC_CR; i <= WUCSR; i++) {
1930  spin_lock_irqsave(&pdata->mac_lock, flags);
1931  data[j++] = smsc911x_mac_read(pdata, i);
1932  spin_unlock_irqrestore(&pdata->mac_lock, flags);
1933  }
1934 
1935  for (i = 0; i <= 31; i++)
1936  data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1937 }
1938 
1939 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1940 {
1941  unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1942  temp &= ~GPIO_CFG_EEPR_EN_;
1943  smsc911x_reg_write(pdata, GPIO_CFG, temp);
1944  msleep(1);
1945 }
1946 
1947 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1948 {
1949  int timeout = 100;
1950  u32 e2cmd;
1951 
1952  SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1953  if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1954  SMSC_WARN(pdata, drv, "Busy at start");
1955  return -EBUSY;
1956  }
1957 
1958  e2cmd = op | E2P_CMD_EPC_BUSY_;
1959  smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1960 
1961  do {
1962  msleep(1);
1963  e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1964  } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1965 
1966  if (!timeout) {
1967  SMSC_TRACE(pdata, drv, "TIMED OUT");
1968  return -EAGAIN;
1969  }
1970 
1971  if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1972  SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
1973  return -EINVAL;
1974  }
1975 
1976  return 0;
1977 }
1978 
1979 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1980  u8 address, u8 *data)
1981 {
1982  u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1983  int ret;
1984 
1985  SMSC_TRACE(pdata, drv, "address 0x%x", address);
1986  ret = smsc911x_eeprom_send_cmd(pdata, op);
1987 
1988  if (!ret)
1989  data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1990 
1991  return ret;
1992 }
1993 
1994 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1995  u8 address, u8 data)
1996 {
1997  u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1998  u32 temp;
1999  int ret;
2000 
2001  SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2002  ret = smsc911x_eeprom_send_cmd(pdata, op);
2003 
2004  if (!ret) {
2005  op = E2P_CMD_EPC_CMD_WRITE_ | address;
2006  smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2007 
2008  /* Workaround for hardware read-after-write restriction */
2009  temp = smsc911x_reg_read(pdata, BYTE_TEST);
2010 
2011  ret = smsc911x_eeprom_send_cmd(pdata, op);
2012  }
2013 
2014  return ret;
2015 }
2016 
2017 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2018 {
2019  return SMSC911X_EEPROM_SIZE;
2020 }
2021 
2022 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2023  struct ethtool_eeprom *eeprom, u8 *data)
2024 {
2025  struct smsc911x_data *pdata = netdev_priv(dev);
2026  u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2027  int len;
2028  int i;
2029 
2030  smsc911x_eeprom_enable_access(pdata);
2031 
2032  len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2033  for (i = 0; i < len; i++) {
2034  int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2035  if (ret < 0) {
2036  eeprom->len = 0;
2037  return ret;
2038  }
2039  }
2040 
2041  memcpy(data, &eeprom_data[eeprom->offset], len);
2042  eeprom->len = len;
2043  return 0;
2044 }
2045 
2046 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2047  struct ethtool_eeprom *eeprom, u8 *data)
2048 {
2049  int ret;
2050  struct smsc911x_data *pdata = netdev_priv(dev);
2051 
2052  smsc911x_eeprom_enable_access(pdata);
2053  smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2054  ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2055  smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2056 
2057  /* Single byte write, according to man page */
2058  eeprom->len = 1;
2059 
2060  return ret;
2061 }
2062 
2063 static const struct ethtool_ops smsc911x_ethtool_ops = {
2064  .get_settings = smsc911x_ethtool_getsettings,
2065  .set_settings = smsc911x_ethtool_setsettings,
2066  .get_link = ethtool_op_get_link,
2067  .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2068  .nway_reset = smsc911x_ethtool_nwayreset,
2069  .get_msglevel = smsc911x_ethtool_getmsglevel,
2070  .set_msglevel = smsc911x_ethtool_setmsglevel,
2071  .get_regs_len = smsc911x_ethtool_getregslen,
2072  .get_regs = smsc911x_ethtool_getregs,
2073  .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2074  .get_eeprom = smsc911x_ethtool_get_eeprom,
2075  .set_eeprom = smsc911x_ethtool_set_eeprom,
2076  .get_ts_info = ethtool_op_get_ts_info,
2077 };
2078 
2079 static const struct net_device_ops smsc911x_netdev_ops = {
2080  .ndo_open = smsc911x_open,
2081  .ndo_stop = smsc911x_stop,
2082  .ndo_start_xmit = smsc911x_hard_start_xmit,
2083  .ndo_get_stats = smsc911x_get_stats,
2084  .ndo_set_rx_mode = smsc911x_set_multicast_list,
2085  .ndo_do_ioctl = smsc911x_do_ioctl,
2086  .ndo_change_mtu = eth_change_mtu,
2087  .ndo_validate_addr = eth_validate_addr,
2088  .ndo_set_mac_address = smsc911x_set_mac_address,
2089 #ifdef CONFIG_NET_POLL_CONTROLLER
2090  .ndo_poll_controller = smsc911x_poll_controller,
2091 #endif
2092 };
2093 
2094 /* copies the current mac address from hardware to dev->dev_addr */
2095 static void __devinit smsc911x_read_mac_address(struct net_device *dev)
2096 {
2097  struct smsc911x_data *pdata = netdev_priv(dev);
2098  u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2099  u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2100 
2101  dev->dev_addr[0] = (u8)(mac_low32);
2102  dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2103  dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2104  dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2105  dev->dev_addr[4] = (u8)(mac_high16);
2106  dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2107 }
2108 
2109 /* Initializing private device structures, only called from probe */
2110 static int __devinit smsc911x_init(struct net_device *dev)
2111 {
2112  struct smsc911x_data *pdata = netdev_priv(dev);
2113  unsigned int byte_test, mask;
2114  unsigned int to = 100;
2115 
2116  SMSC_TRACE(pdata, probe, "Driver Parameters:");
2117  SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2118  (unsigned long)pdata->ioaddr);
2119  SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2120  SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2121 
2122  spin_lock_init(&pdata->dev_lock);
2123  spin_lock_init(&pdata->mac_lock);
2124 
2125  if (pdata->ioaddr == 0) {
2126  SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2127  return -ENODEV;
2128  }
2129 
2130  /*
2131  * poll the READY bit in PMT_CTRL. Any other access to the device is
2132  * forbidden while this bit isn't set. Try for 100ms
2133  *
2134  * Note that this test is done before the WORD_SWAP register is
2135  * programmed. So in some configurations the READY bit is at 16 before
2136  * WORD_SWAP is written to. This issue is worked around by waiting
2137  * until either bit 0 or bit 16 gets set in PMT_CTRL.
2138  *
2139  * SMSC has confirmed that checking bit 16 (marked as reserved in
2140  * the datasheet) is fine since these bits "will either never be set
2141  * or can only go high after READY does (so also indicate the device
2142  * is ready)".
2143  */
2144 
2145  mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2146  while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2147  udelay(1000);
2148 
2149  if (to == 0) {
2150  pr_err("Device not READY in 100ms aborting\n");
2151  return -ENODEV;
2152  }
2153 
2154  /* Check byte ordering */
2155  byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2156  SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2157  if (byte_test == 0x43218765) {
2158  SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2159  "applying WORD_SWAP");
2160  smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2161 
2162  /* 1 dummy read of BYTE_TEST is needed after a write to
2163  * WORD_SWAP before its contents are valid */
2164  byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2165 
2166  byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2167  }
2168 
2169  if (byte_test != 0x87654321) {
2170  SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2171  if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2172  SMSC_WARN(pdata, probe,
2173  "top 16 bits equal to bottom 16 bits");
2174  SMSC_TRACE(pdata, probe,
2175  "This may mean the chip is set "
2176  "for 32 bit while the bus is reading 16 bit");
2177  }
2178  return -ENODEV;
2179  }
2180 
2181  /* Default generation to zero (all workarounds apply) */
2182  pdata->generation = 0;
2183 
2184  pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2185  switch (pdata->idrev & 0xFFFF0000) {
2186  case 0x01180000:
2187  case 0x01170000:
2188  case 0x01160000:
2189  case 0x01150000:
2190  case 0x218A0000:
2191  /* LAN911[5678] family */
2192  pdata->generation = pdata->idrev & 0x0000FFFF;
2193  break;
2194 
2195  case 0x118A0000:
2196  case 0x117A0000:
2197  case 0x116A0000:
2198  case 0x115A0000:
2199  /* LAN921[5678] family */
2200  pdata->generation = 3;
2201  break;
2202 
2203  case 0x92100000:
2204  case 0x92110000:
2205  case 0x92200000:
2206  case 0x92210000:
2207  /* LAN9210/LAN9211/LAN9220/LAN9221 */
2208  pdata->generation = 4;
2209  break;
2210 
2211  default:
2212  SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2213  pdata->idrev);
2214  return -ENODEV;
2215  }
2216 
2217  SMSC_TRACE(pdata, probe,
2218  "LAN911x identified, idrev: 0x%08X, generation: %d",
2219  pdata->idrev, pdata->generation);
2220 
2221  if (pdata->generation == 0)
2222  SMSC_WARN(pdata, probe,
2223  "This driver is not intended for this chip revision");
2224 
2225  /* workaround for platforms without an eeprom, where the mac address
2226  * is stored elsewhere and set by the bootloader. This saves the
2227  * mac address before resetting the device */
2228  if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2229  spin_lock_irq(&pdata->mac_lock);
2230  smsc911x_read_mac_address(dev);
2231  spin_unlock_irq(&pdata->mac_lock);
2232  }
2233 
2234  /* Reset the LAN911x */
2235  if (smsc911x_soft_reset(pdata))
2236  return -ENODEV;
2237 
2238  ether_setup(dev);
2239  dev->flags |= IFF_MULTICAST;
2240  netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2241  dev->netdev_ops = &smsc911x_netdev_ops;
2242  dev->ethtool_ops = &smsc911x_ethtool_ops;
2243 
2244  return 0;
2245 }
2246 
2247 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
2248 {
2249  struct net_device *dev;
2250  struct smsc911x_data *pdata;
2251  struct resource *res;
2252 
2253  dev = platform_get_drvdata(pdev);
2254  BUG_ON(!dev);
2255  pdata = netdev_priv(dev);
2256  BUG_ON(!pdata);
2257  BUG_ON(!pdata->ioaddr);
2258  BUG_ON(!pdata->phy_dev);
2259 
2260  SMSC_TRACE(pdata, ifdown, "Stopping driver");
2261 
2262  phy_disconnect(pdata->phy_dev);
2263  pdata->phy_dev = NULL;
2264  mdiobus_unregister(pdata->mii_bus);
2265  mdiobus_free(pdata->mii_bus);
2266 
2267  platform_set_drvdata(pdev, NULL);
2268  unregister_netdev(dev);
2269  free_irq(dev->irq, dev);
2270  res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2271  "smsc911x-memory");
2272  if (!res)
2273  res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2274 
2275  release_mem_region(res->start, resource_size(res));
2276 
2277  iounmap(pdata->ioaddr);
2278 
2279  (void)smsc911x_disable_resources(pdev);
2280  smsc911x_free_resources(pdev);
2281 
2282  free_netdev(dev);
2283 
2284  return 0;
2285 }
2286 
2287 /* standard register acces */
2288 static const struct smsc911x_ops standard_smsc911x_ops = {
2289  .reg_read = __smsc911x_reg_read,
2290  .reg_write = __smsc911x_reg_write,
2291  .rx_readfifo = smsc911x_rx_readfifo,
2292  .tx_writefifo = smsc911x_tx_writefifo,
2293 };
2294 
2295 /* shifted register access */
2296 static const struct smsc911x_ops shifted_smsc911x_ops = {
2297  .reg_read = __smsc911x_reg_read_shift,
2298  .reg_write = __smsc911x_reg_write_shift,
2299  .rx_readfifo = smsc911x_rx_readfifo_shift,
2300  .tx_writefifo = smsc911x_tx_writefifo_shift,
2301 };
2302 
2303 #ifdef CONFIG_OF
2304 static int __devinit smsc911x_probe_config_dt(
2305  struct smsc911x_platform_config *config,
2306  struct device_node *np)
2307 {
2308  const char *mac;
2309  u32 width = 0;
2310 
2311  if (!np)
2312  return -ENODEV;
2313 
2314  config->phy_interface = of_get_phy_mode(np);
2315 
2316  mac = of_get_mac_address(np);
2317  if (mac)
2318  memcpy(config->mac, mac, ETH_ALEN);
2319 
2320  of_property_read_u32(np, "reg-shift", &config->shift);
2321 
2322  of_property_read_u32(np, "reg-io-width", &width);
2323  if (width == 4)
2324  config->flags |= SMSC911X_USE_32BIT;
2325  else
2326  config->flags |= SMSC911X_USE_16BIT;
2327 
2328  if (of_get_property(np, "smsc,irq-active-high", NULL))
2329  config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2330 
2331  if (of_get_property(np, "smsc,irq-push-pull", NULL))
2332  config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2333 
2334  if (of_get_property(np, "smsc,force-internal-phy", NULL))
2335  config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2336 
2337  if (of_get_property(np, "smsc,force-external-phy", NULL))
2338  config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2339 
2340  if (of_get_property(np, "smsc,save-mac-address", NULL))
2341  config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2342 
2343  return 0;
2344 }
2345 #else
2346 static inline int smsc911x_probe_config_dt(
2347  struct smsc911x_platform_config *config,
2348  struct device_node *np)
2349 {
2350  return -ENODEV;
2351 }
2352 #endif /* CONFIG_OF */
2353 
2354 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
2355 {
2356  struct device_node *np = pdev->dev.of_node;
2357  struct net_device *dev;
2358  struct smsc911x_data *pdata;
2359  struct smsc911x_platform_config *config = pdev->dev.platform_data;
2360  struct resource *res, *irq_res;
2361  unsigned int intcfg = 0;
2362  int res_size, irq_flags;
2363  int retval;
2364 
2365  pr_info("Driver version %s\n", SMSC_DRV_VERSION);
2366 
2367  res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2368  "smsc911x-memory");
2369  if (!res)
2370  res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2371  if (!res) {
2372  pr_warn("Could not allocate resource\n");
2373  retval = -ENODEV;
2374  goto out_0;
2375  }
2376  res_size = resource_size(res);
2377 
2378  irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2379  if (!irq_res) {
2380  pr_warn("Could not allocate irq resource\n");
2381  retval = -ENODEV;
2382  goto out_0;
2383  }
2384 
2385  if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2386  retval = -EBUSY;
2387  goto out_0;
2388  }
2389 
2390  dev = alloc_etherdev(sizeof(struct smsc911x_data));
2391  if (!dev) {
2392  retval = -ENOMEM;
2393  goto out_release_io_1;
2394  }
2395 
2396  SET_NETDEV_DEV(dev, &pdev->dev);
2397 
2398  pdata = netdev_priv(dev);
2399  dev->irq = irq_res->start;
2400  irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2401  pdata->ioaddr = ioremap_nocache(res->start, res_size);
2402 
2403  pdata->dev = dev;
2404  pdata->msg_enable = ((1 << debug) - 1);
2405 
2406  platform_set_drvdata(pdev, dev);
2407 
2408  retval = smsc911x_request_resources(pdev);
2409  if (retval)
2410  goto out_request_resources_fail;
2411 
2412  retval = smsc911x_enable_resources(pdev);
2413  if (retval)
2414  goto out_enable_resources_fail;
2415 
2416  if (pdata->ioaddr == NULL) {
2417  SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2418  retval = -ENOMEM;
2419  goto out_disable_resources;
2420  }
2421 
2422  retval = smsc911x_probe_config_dt(&pdata->config, np);
2423  if (retval && config) {
2424  /* copy config parameters across to pdata */
2425  memcpy(&pdata->config, config, sizeof(pdata->config));
2426  retval = 0;
2427  }
2428 
2429  if (retval) {
2430  SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2431  goto out_disable_resources;
2432  }
2433 
2434  /* assume standard, non-shifted, access to HW registers */
2435  pdata->ops = &standard_smsc911x_ops;
2436  /* apply the right access if shifting is needed */
2437  if (pdata->config.shift)
2438  pdata->ops = &shifted_smsc911x_ops;
2439 
2440  retval = smsc911x_init(dev);
2441  if (retval < 0)
2442  goto out_disable_resources;
2443 
2444  /* configure irq polarity and type before connecting isr */
2445  if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2446  intcfg |= INT_CFG_IRQ_POL_;
2447 
2448  if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2449  intcfg |= INT_CFG_IRQ_TYPE_;
2450 
2451  smsc911x_reg_write(pdata, INT_CFG, intcfg);
2452 
2453  /* Ensure interrupts are globally disabled before connecting ISR */
2454  smsc911x_disable_irq_chip(dev);
2455 
2456  retval = request_irq(dev->irq, smsc911x_irqhandler,
2457  irq_flags | IRQF_SHARED, dev->name, dev);
2458  if (retval) {
2459  SMSC_WARN(pdata, probe,
2460  "Unable to claim requested irq: %d", dev->irq);
2461  goto out_disable_resources;
2462  }
2463 
2464  retval = register_netdev(dev);
2465  if (retval) {
2466  SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2467  goto out_free_irq;
2468  } else {
2469  SMSC_TRACE(pdata, probe,
2470  "Network interface: \"%s\"", dev->name);
2471  }
2472 
2473  retval = smsc911x_mii_init(pdev, dev);
2474  if (retval) {
2475  SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2476  goto out_unregister_netdev_5;
2477  }
2478 
2479  spin_lock_irq(&pdata->mac_lock);
2480 
2481  /* Check if mac address has been specified when bringing interface up */
2482  if (is_valid_ether_addr(dev->dev_addr)) {
2483  smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2484  SMSC_TRACE(pdata, probe,
2485  "MAC Address is specified by configuration");
2486  } else if (is_valid_ether_addr(pdata->config.mac)) {
2487  memcpy(dev->dev_addr, pdata->config.mac, 6);
2488  SMSC_TRACE(pdata, probe,
2489  "MAC Address specified by platform data");
2490  } else {
2491  /* Try reading mac address from device. if EEPROM is present
2492  * it will already have been set */
2493  smsc_get_mac(dev);
2494 
2495  if (is_valid_ether_addr(dev->dev_addr)) {
2496  /* eeprom values are valid so use them */
2497  SMSC_TRACE(pdata, probe,
2498  "Mac Address is read from LAN911x EEPROM");
2499  } else {
2500  /* eeprom values are invalid, generate random MAC */
2501  eth_hw_addr_random(dev);
2502  smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2503  SMSC_TRACE(pdata, probe,
2504  "MAC Address is set to eth_random_addr");
2505  }
2506  }
2507 
2508  spin_unlock_irq(&pdata->mac_lock);
2509 
2510  netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2511 
2512  return 0;
2513 
2514 out_unregister_netdev_5:
2515  unregister_netdev(dev);
2516 out_free_irq:
2517  free_irq(dev->irq, dev);
2518 out_disable_resources:
2519  (void)smsc911x_disable_resources(pdev);
2520 out_enable_resources_fail:
2521  smsc911x_free_resources(pdev);
2522 out_request_resources_fail:
2523  platform_set_drvdata(pdev, NULL);
2524  iounmap(pdata->ioaddr);
2525  free_netdev(dev);
2526 out_release_io_1:
2527  release_mem_region(res->start, resource_size(res));
2528 out_0:
2529  return retval;
2530 }
2531 
2532 #ifdef CONFIG_PM
2533 /* This implementation assumes the devices remains powered on its VDDVARIO
2534  * pins during suspend. */
2535 
2536 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2537 
2538 static int smsc911x_suspend(struct device *dev)
2539 {
2540  struct net_device *ndev = dev_get_drvdata(dev);
2541  struct smsc911x_data *pdata = netdev_priv(ndev);
2542 
2543  /* enable wake on LAN, energy detection and the external PME
2544  * signal. */
2545  smsc911x_reg_write(pdata, PMT_CTRL,
2546  PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2547  PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2548 
2549  return 0;
2550 }
2551 
2552 static int smsc911x_resume(struct device *dev)
2553 {
2554  struct net_device *ndev = dev_get_drvdata(dev);
2555  struct smsc911x_data *pdata = netdev_priv(ndev);
2556  unsigned int to = 100;
2557 
2558  /* Note 3.11 from the datasheet:
2559  * "When the LAN9220 is in a power saving state, a write of any
2560  * data to the BYTE_TEST register will wake-up the device."
2561  */
2562  smsc911x_reg_write(pdata, BYTE_TEST, 0);
2563 
2564  /* poll the READY bit in PMT_CTRL. Any other access to the device is
2565  * forbidden while this bit isn't set. Try for 100ms and return -EIO
2566  * if it failed. */
2567  while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2568  udelay(1000);
2569 
2570  return (to == 0) ? -EIO : 0;
2571 }
2572 
2573 static const struct dev_pm_ops smsc911x_pm_ops = {
2574  .suspend = smsc911x_suspend,
2575  .resume = smsc911x_resume,
2576 };
2577 
2578 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2579 
2580 #else
2581 #define SMSC911X_PM_OPS NULL
2582 #endif
2583 
2584 static const struct of_device_id smsc911x_dt_ids[] = {
2585  { .compatible = "smsc,lan9115", },
2586  { /* sentinel */ }
2587 };
2588 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2589 
2590 static struct platform_driver smsc911x_driver = {
2591  .probe = smsc911x_drv_probe,
2592  .remove = __devexit_p(smsc911x_drv_remove),
2593  .driver = {
2594  .name = SMSC_CHIPNAME,
2595  .owner = THIS_MODULE,
2596  .pm = SMSC911X_PM_OPS,
2597  .of_match_table = smsc911x_dt_ids,
2598  },
2599 };
2600 
2601 /* Entry point for loading the module */
2602 static int __init smsc911x_init_module(void)
2603 {
2604  SMSC_INITIALIZE();
2605  return platform_driver_register(&smsc911x_driver);
2606 }
2607 
2608 /* entry point for unloading the module */
2609 static void __exit smsc911x_cleanup_module(void)
2610 {
2611  platform_driver_unregister(&smsc911x_driver);
2612 }
2613 
2614 module_init(smsc911x_init_module);
2615 module_exit(smsc911x_cleanup_module);
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