25 #include <linux/slab.h>
29 #include <linux/module.h>
34 #ifdef CONFIG_RTL8187_LEDS
89 { .bitrate = 10, .hw_value = 0, },
90 { .bitrate = 20, .hw_value = 1, },
91 { .bitrate = 55, .hw_value = 2, },
92 { .bitrate = 110, .hw_value = 3, },
93 { .bitrate = 60, .hw_value = 4, },
94 { .bitrate = 90, .hw_value = 5, },
95 { .bitrate = 120, .hw_value = 6, },
96 { .bitrate = 180, .hw_value = 7, },
97 { .bitrate = 240, .hw_value = 8, },
98 { .bitrate = 360, .hw_value = 9, },
99 { .bitrate = 480, .hw_value = 10, },
100 { .bitrate = 540, .hw_value = 11, },
104 { .center_freq = 2412 },
105 { .center_freq = 2417 },
106 { .center_freq = 2422 },
107 { .center_freq = 2427 },
108 { .center_freq = 2432 },
109 { .center_freq = 2437 },
110 { .center_freq = 2442 },
111 { .center_freq = 2447 },
112 { .center_freq = 2452 },
113 { .center_freq = 2457 },
114 { .center_freq = 2462 },
115 { .center_freq = 2467 },
116 { .center_freq = 2472 },
117 { .center_freq = 2484 },
120 static void rtl8187_iowrite_async_cb(
struct urb *
urb)
130 struct rtl8187_async_write_data {
156 usb_fill_control_urb(urb, priv->
udev, usb_sndctrlpipe(priv->
udev, 0),
157 (
unsigned char *)dr,
buf, len,
158 rtl8187_iowrite_async_cb,
buf);
168 static inline void rtl818x_iowrite32_async(
struct rtl8187_priv *priv,
173 rtl8187_iowrite_async(priv,
cpu_to_le16((
unsigned long)addr),
184 rtl818x_iowrite8(priv, &priv->
map->PHY[3], (data >> 24) & 0xFF);
185 rtl818x_iowrite8(priv, &priv->
map->PHY[2], (data >> 16) & 0xFF);
186 rtl818x_iowrite8(priv, &priv->
map->PHY[1], (data >> 8) & 0xFF);
187 rtl818x_iowrite8(priv, &priv->
map->PHY[0], data & 0xFF);
190 static void rtl8187_tx_cb(
struct urb *urb)
199 ieee80211_tx_info_clear_status(
info);
206 while (skb_queue_len(&priv->
b_tx_status.queue) > 5) {
210 "transmit status queue full\n");
254 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
259 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
264 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
286 unsigned int epmap[4] = { 6, 7, 5, 4 };
292 ieee80211_get_tx_rate(dev, info);
293 memset(hdr, 0,
sizeof(*hdr));
306 ep = epmap[skb_get_queue_mapping(skb)];
312 usb_fill_bulk_urb(urb, priv->
udev, usb_sndbulkpipe(priv->
udev, ep),
313 buf, skb->
len, rtl8187_tx_cb, skb);
314 urb->transfer_flags |= URB_ZERO_PACKET;
324 static void rtl8187_rx_cb(
struct urb *urb)
337 spin_unlock_irqrestore(&priv->
rx_queue.lock, f);
338 skb_put(skb, urb->actual_length);
347 (
typeof(hdr))(skb_tail_pointer(skb) -
sizeof(*hdr));
353 signal = -4 - ((27 * hdr->
agc) >> 6);
358 (
typeof(hdr))(skb_tail_pointer(skb) -
sizeof(*hdr));
372 signal = 14 - hdr->
agc / 2;
377 rx_status.
signal = signal;
379 rate = (flags >> 20) & 0xF;
382 rx_status.
freq = dev->
conf.channel->center_freq;
383 rx_status.
band = dev->
conf.channel->band;
387 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
sizeof(rx_status));
399 urb->transfer_buffer = skb_tail_pointer(skb);
419 while (skb_queue_len(&priv->
rx_queue) < 16) {
430 usb_fill_bulk_urb(entry, priv->
udev,
431 usb_rcvbulkpipe(priv->
udev,
433 skb_tail_pointer(skb),
457 static void rtl8187b_status_cb(
struct urb *urb)
462 unsigned int cmd_type;
493 cmd_type = (val >> 30) & 0x3;
495 unsigned int pkt_rc,
seq_no;
502 tok = val & (1 << 15);
503 seq_no = (val >> 16) & 0xFFF;
506 skb_queue_reverse_walk(&priv->
b_tx_status.queue, skb) {
529 info->
status.rates[0].count = pkt_rc + 1;
533 spin_unlock_irqrestore(&priv->
b_tx_status.queue.lock, flags);
541 static int rtl8187b_init_status_urb(
struct ieee80211_hw *dev)
551 usb_fill_bulk_urb(entry, priv->
udev, usb_rcvbulkpipe(priv->
udev, 9),
553 rtl8187b_status_cb, dev);
564 static void rtl8187_set_anaparam(
struct rtl8187_priv *priv,
bool rfon)
566 u32 anaparam, anaparam2;
589 rtl818x_iowrite8(priv, &priv->
map->EEPROM_CMD,
591 reg = rtl818x_ioread8(priv, &priv->
map->CONFIG3);
593 rtl818x_iowrite8(priv, &priv->
map->CONFIG3, reg);
594 rtl818x_iowrite32(priv, &priv->
map->ANAPARAM, anaparam);
595 rtl818x_iowrite32(priv, &priv->
map->ANAPARAM2, anaparam2);
597 rtl818x_iowrite8(priv, &priv->
map->ANAPARAM3, anaparam3);
599 rtl818x_iowrite8(priv, &priv->
map->CONFIG3, reg);
600 rtl818x_iowrite8(priv, &priv->
map->EEPROM_CMD,
610 reg = rtl818x_ioread8(priv, &priv->
map->CMD);
613 rtl818x_iowrite8(priv, &priv->
map->CMD, reg);
618 if (!(rtl818x_ioread8(priv, &priv->
map->CMD) &
634 if (!(rtl818x_ioread8(priv, &priv->
map->EEPROM_CMD) &
654 rtl8187_set_anaparam(priv,
true);
656 rtl818x_iowrite16(priv, &priv->
map->INT_MASK, 0);
659 rtl818x_iowrite8(priv, (
u8 *)0xFE18, 0x10);
660 rtl818x_iowrite8(priv, (
u8 *)0xFE18, 0x11);
661 rtl818x_iowrite8(priv, (
u8 *)0xFE18, 0x00);
664 res = rtl8187_cmd_reset(dev);
668 rtl8187_set_anaparam(priv,
true);
671 rtl818x_iowrite16(priv, &priv->
map->RFPinsSelect, 0);
672 rtl818x_iowrite8(priv, &priv->
map->GPIO0, 0);
674 rtl818x_iowrite16(priv, &priv->
map->RFPinsSelect, (4 << 8));
675 rtl818x_iowrite8(priv, &priv->
map->GPIO0, 1);
676 rtl818x_iowrite8(priv, &priv->
map->GP_ENABLE, 0);
680 rtl818x_iowrite16(priv, (
__le16 *)0xFFF4, 0xFFFF);
681 reg = rtl818x_ioread8(priv, &priv->
map->CONFIG1);
684 rtl818x_iowrite8(priv, &priv->
map->CONFIG1, reg);
688 rtl818x_iowrite32(priv, &priv->
map->INT_TIMEOUT, 0);
689 rtl818x_iowrite8(priv, &priv->
map->WPA_CONF, 0);
690 rtl818x_iowrite8(priv, &priv->
map->RATE_FALLBACK, 0);
693 rtl818x_iowrite8(priv, &priv->
map->RESP_RATE, (8 << 4) | 0);
694 rtl818x_iowrite16(priv, &priv->
map->BRSR, 0x01F3);
697 rtl818x_iowrite16(priv, &priv->
map->RFPinsSelect, 0);
698 rtl818x_iowrite8(priv, &priv->
map->GPIO0, 0);
699 reg = rtl818x_ioread8(priv, (
u8 *)0xFE53);
700 rtl818x_iowrite8(priv, (
u8 *)0xFE53, reg | (1 << 7));
701 rtl818x_iowrite16(priv, &priv->
map->RFPinsSelect, (4 << 8));
702 rtl818x_iowrite8(priv, &priv->
map->GPIO0, 0x20);
703 rtl818x_iowrite8(priv, &priv->
map->GP_ENABLE, 0);
704 rtl818x_iowrite16(priv, &priv->
map->RFPinsOutput, 0x80);
705 rtl818x_iowrite16(priv, &priv->
map->RFPinsSelect, 0x80);
706 rtl818x_iowrite16(priv, &priv->
map->RFPinsEnable, 0x80);
709 rtl818x_iowrite32(priv, &priv->
map->RF_TIMING, 0x000a8008);
710 rtl818x_iowrite16(priv, &priv->
map->BRSR, 0xFFFF);
711 rtl818x_iowrite32(priv, &priv->
map->RF_PARA, 0x00100044);
712 rtl818x_iowrite8(priv, &priv->
map->EEPROM_CMD,
714 rtl818x_iowrite8(priv, &priv->
map->CONFIG3, 0x44);
715 rtl818x_iowrite8(priv, &priv->
map->EEPROM_CMD,
717 rtl818x_iowrite16(priv, &priv->
map->RFPinsEnable, 0x1FF7);
722 rtl818x_iowrite16(priv, &priv->
map->BRSR, 0x01F3);
723 reg = rtl818x_ioread8(priv, &priv->
map->PGSELECT) & ~1;
724 rtl818x_iowrite8(priv, &priv->
map->PGSELECT, reg | 1);
725 rtl818x_iowrite16(priv, (
__le16 *)0xFFFE, 0x10);
726 rtl818x_iowrite8(priv, &priv->
map->TALLY_SEL, 0x80);
727 rtl818x_iowrite8(priv, (
u8 *)0xFFFF, 0x60);
728 rtl818x_iowrite8(priv, &priv->
map->PGSELECT, reg);
733 static const u8 rtl8187b_reg_table[][3] = {
734 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
735 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
736 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
737 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
739 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
740 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
741 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
742 {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
743 {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
745 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
746 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
747 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
748 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
749 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
750 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
751 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2},
753 {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
754 {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
755 {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
756 {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
757 {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
759 {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
769 rtl8187_set_anaparam(priv,
true);
773 rtl818x_iowrite8(priv, (
u8 *)0xFF61, 0x10);
774 reg = rtl818x_ioread8(priv, (
u8 *)0xFF62);
775 rtl818x_iowrite8(priv, (
u8 *)0xFF62, reg & ~(1 << 5));
776 rtl818x_iowrite8(priv, (
u8 *)0xFF62, reg | (1 << 5));
778 res = rtl8187_cmd_reset(dev);
782 rtl8187_set_anaparam(priv,
true);
787 rtl818x_iowrite16(priv, (
__le16 *)0xFF34, 0x0FFF);
789 reg = rtl818x_ioread8(priv, &priv->
map->CW_CONF);
791 rtl818x_iowrite8(priv, &priv->
map->CW_CONF, reg);
794 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFFE0, 0x0FFF, 1);
795 rtl818x_iowrite8_idx(priv, (
u8 *)0xFFE2, 0x00, 1);
797 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFFD4, 0xFFFF, 1);
799 rtl818x_iowrite8(priv, &priv->
map->EEPROM_CMD,
801 reg = rtl818x_ioread8(priv, &priv->
map->CONFIG1);
802 rtl818x_iowrite8(priv, &priv->
map->CONFIG1, (reg & 0x3F) | 0x80);
803 rtl818x_iowrite8(priv, &priv->
map->EEPROM_CMD,
806 rtl818x_iowrite8(priv, &priv->
map->WPA_CONF, 0);
807 for (i = 0; i <
ARRAY_SIZE(rtl8187b_reg_table); i++) {
808 rtl818x_iowrite8_idx(priv,
810 (rtl8187b_reg_table[i][0] | 0xFF00),
811 rtl8187b_reg_table[i][1],
812 rtl8187b_reg_table[i][2]);
815 rtl818x_iowrite16(priv, &priv->
map->TID_AC_MAP, 0xFA50);
816 rtl818x_iowrite16(priv, &priv->
map->INT_MIG, 0);
818 rtl818x_iowrite32_idx(priv, (
__le32 *)0xFFF0, 0, 1);
819 rtl818x_iowrite32_idx(priv, (
__le32 *)0xFFF4, 0, 1);
820 rtl818x_iowrite8_idx(priv, (
u8 *)0xFFF8, 0, 1);
822 rtl818x_iowrite32(priv, &priv->
map->RF_TIMING, 0x00004001);
825 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFF72, 0x569A, 2);
827 rtl818x_iowrite16(priv, &priv->
map->RFPinsOutput, 0x0480);
828 rtl818x_iowrite16(priv, &priv->
map->RFPinsSelect, 0x2488);
829 rtl818x_iowrite16(priv, &priv->
map->RFPinsEnable, 0x1FFF);
835 rtl818x_iowrite8(priv, &priv->
map->CMD, reg);
836 rtl818x_iowrite16(priv, &priv->
map->INT_MASK, 0xFFFF);
838 rtl818x_iowrite8(priv, (
u8 *)0xFE41, 0xF4);
839 rtl818x_iowrite8(priv, (
u8 *)0xFE40, 0x00);
840 rtl818x_iowrite8(priv, (
u8 *)0xFE42, 0x00);
841 rtl818x_iowrite8(priv, (
u8 *)0xFE42, 0x01);
842 rtl818x_iowrite8(priv, (
u8 *)0xFE40, 0x0F);
843 rtl818x_iowrite8(priv, (
u8 *)0xFE42, 0x00);
844 rtl818x_iowrite8(priv, (
u8 *)0xFE42, 0x01);
846 reg = rtl818x_ioread8(priv, (
u8 *)0xFFDB);
847 rtl818x_iowrite8(priv, (
u8 *)0xFFDB, reg | (1 << 2));
848 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFF72, 0x59FA, 3);
849 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFF74, 0x59D2, 3);
850 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFF76, 0x59D2, 3);
851 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFF78, 0x19FA, 3);
852 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFF7A, 0x19FA, 3);
853 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFF7C, 0x00D0, 3);
854 rtl818x_iowrite8(priv, (
u8 *)0xFF61, 0);
855 rtl818x_iowrite8_idx(priv, (
u8 *)0xFF80, 0x0F, 1);
856 rtl818x_iowrite8_idx(priv, (
u8 *)0xFF83, 0x03, 1);
857 rtl818x_iowrite8(priv, (
u8 *)0xFFDA, 0x10);
858 rtl818x_iowrite8_idx(priv, (
u8 *)0xFF4D, 0x08, 2);
860 rtl818x_iowrite32(priv, &priv->
map->HSSI_PARA, 0x0600321B);
862 rtl818x_iowrite16_idx(priv, (
__le16 *)0xFFEC, 0x0800, 1);
869 rtl818x_iowrite8(priv, &priv->
map->ACM_CONTROL, 0);
896 tmp = rtl818x_ioread16(priv, (
__le16 *)0xFFFA);
902 avg_retry = (tmp -
retry) / length;
903 while (skb_queue_len(&priv->
b_tx_status.queue) > 0) {
907 info = IEEE80211_SKB_CB(old_skb);
908 info->
status.rates[0].count = avg_retry + 1;
909 if (info->
status.rates[0].count > RETRY_COUNT)
925 ret = (!priv->
is_rtl8187b) ? rtl8187_init_hw(dev) :
926 rtl8187b_init_hw(dev);
928 goto rtl8187_start_exit;
945 rtl818x_iowrite32(priv, &priv->
map->RX_CONF, reg);
947 reg = rtl818x_ioread8(priv, &priv->
map->TX_AGC_CTL);
951 rtl818x_iowrite8(priv, &priv->
map->TX_AGC_CTL, reg);
953 rtl818x_iowrite32(priv, &priv->
map->TX_CONF,
956 (RETRY_COUNT << 8 ) |
957 (RETRY_COUNT << 0 ) |
959 rtl8187_init_urbs(dev);
960 rtl8187b_init_status_urb(dev);
961 goto rtl8187_start_exit;
964 rtl818x_iowrite16(priv, &priv->
map->INT_MASK, 0xFFFF);
966 rtl818x_iowrite32(priv, &priv->
map->MAR[0], ~0);
967 rtl818x_iowrite32(priv, &priv->
map->MAR[1], ~0);
969 rtl8187_init_urbs(dev);
982 rtl818x_iowrite32(priv, &priv->
map->RX_CONF, reg);
984 reg = rtl818x_ioread8(priv, &priv->
map->CW_CONF);
987 rtl818x_iowrite8(priv, &priv->
map->CW_CONF, reg);
989 reg = rtl818x_ioread8(priv, &priv->
map->TX_AGC_CTL);
993 rtl818x_iowrite8(priv, &priv->
map->TX_AGC_CTL, reg);
998 rtl818x_iowrite32(priv, &priv->
map->TX_CONF, reg);
1000 reg = rtl818x_ioread8(priv, &priv->
map->CMD);
1003 rtl818x_iowrite8(priv, &priv->
map->CMD, reg);
1018 rtl818x_iowrite16(priv, &priv->
map->INT_MASK, 0);
1020 reg = rtl818x_ioread8(priv, &priv->
map->CMD);
1023 rtl818x_iowrite8(priv, &priv->
map->CMD, reg);
1025 priv->
rf->stop(dev);
1026 rtl8187_set_anaparam(priv,
false);
1029 reg = rtl818x_ioread8(priv, &priv->
map->CONFIG4);
1047 return rtl818x_ioread32(priv, &priv->
map->TSFT[0]) |
1048 (
u64)(rtl818x_ioread32(priv, &priv->
map->TSFT[1])) << 32;
1052 static void rtl8187_beacon_work(
struct work_struct *work)
1067 skb = ieee80211_beacon_get(dev, vif);
1076 mgmt->
u.beacon.timestamp =
cpu_to_le64(rtl8187_get_tsf(dev, vif));
1079 skb_set_queue_mapping(skb, 0);
1081 rtl8187_tx(dev,
NULL, skb);
1093 static int rtl8187_add_interface(
struct ieee80211_hw *dev,
1105 switch (vif->
type) {
1118 vif_priv->
dev = dev;
1125 rtl818x_iowrite8(priv, &priv->
map->MAC[i],
1134 static void rtl8187_remove_interface(
struct ieee80211_hw *dev,
1150 reg = rtl818x_ioread32(priv, &priv->
map->TX_CONF);
1155 rtl818x_iowrite32(priv, &priv->
map->TX_CONF,
1157 priv->
rf->set_chan(dev, conf);
1159 rtl818x_iowrite32(priv, &priv->
map->TX_CONF, reg);
1161 rtl818x_iowrite16(priv, &priv->
map->ATIM_WND, 2);
1162 rtl818x_iowrite16(priv, &priv->
map->ATIMTR_INTERVAL, 100);
1163 rtl818x_iowrite16(priv, &priv->
map->BEACON_INTERVAL, 100);
1164 rtl818x_iowrite16(priv, &priv->
map->BEACON_INTERVAL_TIME, 100);
1173 static __le32 *rtl8187b_ac_addr[4] = {
1180 #define SIFS_TIME 0xa
1182 static void rtl8187_conf_erp(
struct rtl8187_priv *priv,
bool use_short_slot,
1183 bool use_short_preamble)
1190 if (use_short_slot) {
1199 rtl818x_iowrite8(priv, &priv->
map->SIFS, 0x22);
1200 rtl818x_iowrite8(priv, &priv->
map->SLOT, priv->
slot_time);
1201 rtl818x_iowrite8(priv, &priv->
map->DIFS, difs);
1207 rtl818x_iowrite8(priv, (
u8 *)&priv->
map->BRSR + 1, eifs);
1214 ack_timeout = 112 + 48 + difs;
1215 if (use_short_preamble)
1219 rtl818x_iowrite8(priv, &priv->
map->CARRIER_SENSE_COUNTER,
1222 for (queue = 0; queue < 4; queue++)
1223 rtl818x_iowrite8(priv, (
u8 *) rtl8187b_ac_addr[queue],
1227 rtl818x_iowrite8(priv, &priv->
map->SIFS, 0x22);
1228 if (use_short_slot) {
1229 rtl818x_iowrite8(priv, &priv->
map->SLOT, 0x9);
1230 rtl818x_iowrite8(priv, &priv->
map->DIFS, 0x14);
1231 rtl818x_iowrite8(priv, &priv->
map->EIFS, 91 - 0x14);
1233 rtl818x_iowrite8(priv, &priv->
map->SLOT, 0x14);
1234 rtl818x_iowrite8(priv, &priv->
map->DIFS, 0x24);
1235 rtl818x_iowrite8(priv, &priv->
map->EIFS, 91 - 0x24);
1240 static void rtl8187_bss_info_changed(
struct ieee80211_hw *dev,
1255 rtl818x_iowrite8(priv, &priv->
map->BSSID[i],
1263 if (is_valid_ether_addr(info->
bssid)) {
1272 rtl818x_iowrite8(priv, &priv->
map->MSR, reg);
1298 static void rtl8187_configure_filter(
struct ieee80211_hw *dev,
1299 unsigned int changed_flags,
1300 unsigned int *total_flags,
1327 rtl818x_iowrite32_async(priv, &priv->
map->RX_CONF, priv->
rx_conf);
1340 cw_min = fls(params->
cw_min);
1341 cw_max = fls(params->
cw_max);
1353 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1354 (params->
txop << 16) | (cw_max << 12) |
1355 (cw_min << 8) | (params->
aifs *
1361 rtl818x_iowrite8(priv, &priv->
map->CW_VAL,
1362 cw_min | (cw_max << 4));
1370 .start = rtl8187_start,
1371 .stop = rtl8187_stop,
1372 .add_interface = rtl8187_add_interface,
1373 .remove_interface = rtl8187_remove_interface,
1374 .config = rtl8187_config,
1375 .bss_info_changed = rtl8187_bss_info_changed,
1376 .prepare_multicast = rtl8187_prepare_multicast,
1377 .configure_filter = rtl8187_configure_filter,
1378 .conf_tx = rtl8187_conf_tx,
1380 .get_tsf = rtl8187_get_tsf,
1387 u8 reg = rtl818x_ioread8(priv, &priv->
map->EEPROM_CMD);
1410 rtl818x_iowrite8(priv, &priv->
map->EEPROM_CMD, reg);
1417 struct usb_device *
udev = interface_to_usbdev(intf);
1422 const char *chip_name;
1445 SET_IEEE80211_DEV(dev, &intf->dev);
1446 usb_set_intfdata(intf, dev);
1451 skb_queue_head_init(&priv->
rx_queue);
1456 memcpy(priv->
channels, rtl818x_channels,
sizeof(rtl818x_channels));
1457 memcpy(priv->
rates, rtl818x_rates,
sizeof(rtl818x_rates));
1478 if (rtl818x_ioread32(priv, &priv->
map->RX_CONF) & (1 << 6))
1488 if (!is_valid_ether_addr(mac_addr)) {
1490 "generated MAC address\n");
1491 eth_random_addr(mac_addr);
1493 SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1496 for (i = 0; i < 3; i++) {
1499 (*channel++).hw_value = txpwr & 0xFF;
1500 (*channel++).hw_value = txpwr >> 8;
1502 for (i = 0; i < 2; i++) {
1505 (*channel++).hw_value = txpwr & 0xFF;
1506 (*channel++).hw_value = txpwr >> 8;
1512 reg = rtl818x_ioread8(priv, &priv->
map->PGSELECT) & ~1;
1513 rtl818x_iowrite8(priv, &priv->
map->PGSELECT, reg | 1);
1517 priv->
asic_rev = rtl818x_ioread8(priv, (
u8 *)0xFFFE) & 0x3;
1518 rtl818x_iowrite8(priv, &priv->
map->PGSELECT, reg);
1523 reg32 = rtl818x_ioread32(priv, &priv->
map->TX_CONF);
1529 chip_name =
"RTL8187BvB(early)";
1531 priv->
hw_rev = RTL8187BvB;
1534 chip_name =
"RTL8187vD";
1537 chip_name =
"RTL8187vB (default)";
1549 switch (rtl818x_ioread8(priv, (
u8 *)0xFFE1)) {
1551 chip_name =
"RTL8187BvB";
1552 priv->
hw_rev = RTL8187BvB;
1555 chip_name =
"RTL8187BvD";
1556 priv->
hw_rev = RTL8187BvD;
1559 chip_name =
"RTL8187BvE";
1560 priv->
hw_rev = RTL8187BvE;
1563 chip_name =
"RTL8187BvB (default)";
1564 priv->
hw_rev = RTL8187BvB;
1569 for (i = 0; i < 2; i++) {
1573 (*channel++).hw_value = txpwr & 0xFF;
1574 (*channel++).hw_value = txpwr >> 8;
1579 (*channel++).hw_value = txpwr & 0xFF;
1582 (*channel++).hw_value = txpwr & 0xFF;
1585 (*channel++).hw_value = txpwr & 0xFF;
1586 (*channel++).hw_value = txpwr >> 8;
1590 if (product_id == 0x8197 || product_id == 0x8198) {
1615 goto err_free_dmabuf;
1621 mac_addr, chip_name, priv->
asic_rev, priv->
rf->name,
1624 #ifdef CONFIG_RTL8187_LEDS
1627 rtl8187_leds_init(dev, reg);
1637 usb_set_intfdata(intf,
NULL);
1650 #ifdef CONFIG_RTL8187_LEDS
1651 rtl8187_leds_exit(dev);
1663 static struct usb_driver rtl8187_driver = {
1664 .name = KBUILD_MODNAME,
1665 .id_table = rtl8187_table,
1666 .probe = rtl8187_probe,
1668 .disable_hub_initiated_lpm = 1,