LLVM API Documentation

Functions | Variables
ARMFrameLowering.cpp File Reference
#include "ARMFrameLowering.h"
#include "ARMBaseInstrInfo.h"
#include "ARMBaseRegisterInfo.h"
#include "ARMConstantPoolValue.h"
#include "ARMMachineFunctionInfo.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/MCContext.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetOptions.h"
Include dependency graph for ARMFrameLowering.cpp:

Go to the source code of this file.

Functions

static MachineBasicBlock::iterator skipAlignedDPRCS2Spills (MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs)
static bool isCSRestore (MachineInstr *MI, const ARMBaseInstrInfo &TII, const MCPhysReg *CSRegs)
static void emitRegPlusImmediate (bool isARM, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, const ARMBaseInstrInfo &TII, unsigned DestReg, unsigned SrcReg, int NumBytes, unsigned MIFlags=MachineInstr::NoFlags, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0)
static void emitSPUpdate (bool isARM, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, const ARMBaseInstrInfo &TII, int NumBytes, unsigned MIFlags=MachineInstr::NoFlags, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0)
static int sizeOfSPAdjustment (const MachineInstr *MI)
static bool WindowsRequiresStackProbe (const MachineFunction &MF, size_t StackSizeInBytes)
static void emitAlignedDPRCS2Spills (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI)
static void emitAlignedDPRCS2Restores (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI)
static unsigned GetFunctionSizeInBytes (const MachineFunction &MF, const ARMBaseInstrInfo &TII)
static unsigned estimateRSStackSizeLimit (MachineFunction &MF, const TargetFrameLowering *TFI)
static void checkNumAlignedDPRCS2Regs (MachineFunction &MF)
static uint32_t alignToARMConstant (uint32_t Value)

Variables

static cl::opt< boolSpillAlignedNEONRegs ("align-neon-spills", cl::Hidden, cl::init(true), cl::desc("Align ARM NEON spills in prolog and epilog"))
static const uint64_t kSplitStackAvailable = 256

Function Documentation

static uint32_t alignToARMConstant ( uint32_t  Value) [static]

Get the minimum constant for ARM that is greater than or equal to the argument. In ARM, constants can have any value that can be produced by rotating an 8-bit value to the right by an even number of bits within a 32-bit word.

Definition at line 1684 of file ARMFrameLowering.cpp.

Referenced by llvm::ARMFrameLowering::adjustForSegmentedStacks().

static void checkNumAlignedDPRCS2Regs ( MachineFunction MF) [static]
static void emitAlignedDPRCS2Restores ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
unsigned  NumAlignedDPRCS2Regs,
const std::vector< CalleeSavedInfo > &  CSI,
const TargetRegisterInfo TRI 
) [static]
static void emitAlignedDPRCS2Spills ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
unsigned  NumAlignedDPRCS2Regs,
const std::vector< CalleeSavedInfo > &  CSI,
const TargetRegisterInfo TRI 
) [static]
static void emitRegPlusImmediate ( bool  isARM,
MachineBasicBlock MBB,
MachineBasicBlock::iterator MBBI,
DebugLoc  dl,
const ARMBaseInstrInfo TII,
unsigned  DestReg,
unsigned  SrcReg,
int  NumBytes,
unsigned  MIFlags = MachineInstr::NoFlags,
ARMCC::CondCodes  Pred = ARMCC::AL,
unsigned  PredReg = 0 
) [static]
static void emitSPUpdate ( bool  isARM,
MachineBasicBlock MBB,
MachineBasicBlock::iterator MBBI,
DebugLoc  dl,
const ARMBaseInstrInfo TII,
int  NumBytes,
unsigned  MIFlags = MachineInstr::NoFlags,
ARMCC::CondCodes  Pred = ARMCC::AL,
unsigned  PredReg = 0 
) [static]

estimateRSStackSizeLimit - Look at each instruction that references stack frames and return the stack size limit beyond which some of these instructions will require a scratch register during their expansion later.

Definition at line 1279 of file ARMFrameLowering.cpp.

References llvm::ARMII::AddrMode3, llvm::ARMII::AddrMode4, llvm::ARMII::AddrMode5, llvm::ARMII::AddrMode6, llvm::ARMII::AddrModeMask, llvm::ARMII::AddrModeT2_i12, llvm::ARMII::AddrModeT2_i8, llvm::ARMII::AddrModeT2_i8s4, llvm::MachineFunction::getInfo(), llvm::TargetFrameLowering::hasFP(), and llvm::ARMFunctionInfo::hasStackFrame().

Referenced by llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan().

static bool isCSRestore ( MachineInstr MI,
const ARMBaseInstrInfo TII,
const MCPhysReg CSRegs 
) [static]
static int sizeOfSPAdjustment ( const MachineInstr MI) [static]

Skip past the code inserted by emitAlignedDPRCS2Spills, and return an iterator to the following instruction.

Definition at line 1096 of file ARMFrameLowering.cpp.

References llvm::AArch64CC::MI.

Referenced by llvm::ARMFrameLowering::emitPrologue().

static bool WindowsRequiresStackProbe ( const MachineFunction MF,
size_t  StackSizeInBytes 
) [static]

Variable Documentation

const uint64_t kSplitStackAvailable = 256 [static]
cl::opt<bool> SpillAlignedNEONRegs("align-neon-spills", cl::Hidden, cl::init(true), cl::desc("Align ARM NEON spills in prolog and epilog")) [static]