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sis900.c
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1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2  Copyright 1999 Silicon Integrated System Corporation
3  Revision: 1.08.10 Apr. 2 2006
4 
5  Modified from the driver which is originally written by Donald Becker.
6 
7  This software may be used and distributed according to the terms
8  of the GNU General Public License (GPL), incorporated herein by reference.
9  Drivers based on this skeleton fall under the GPL and must retain
10  the authorship (implicit copyright) notice.
11 
12  References:
13  SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14  preliminary Rev. 1.0 Jan. 14, 1998
15  SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16  preliminary Rev. 1.0 Nov. 10, 1998
17  SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18  preliminary Rev. 1.0 Jan. 18, 1998
19 
20  Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21  Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22  Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23  Rev 1.08.07 Nov. 2 2003 Daniele Venzano <[email protected]> add suspend/resume support
24  Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25  Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26  Rev 1.08.04 Apr. 25 2002 Mufasa Yang <[email protected]> added SiS962 support
27  Rev 1.08.03 Feb. 1 2002 Matt Domsch <[email protected]> update to use library crc32 function
28  Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29  Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30  Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31  Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32  Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <[email protected]> some bug fix & 635M/B support
33  Rev 1.07.09 Feb. 9 2001 Dave Jones <[email protected]> PCI enable cleanup
34  Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35  Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36  Rev 1.07.06 Nov. 7 2000 Jeff Garzik <[email protected]> some bug fix and cleaning
37  Rev 1.07.05 Nov. 6 2000 metapirat<[email protected]> contribute media type select by ifconfig
38  Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39  Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang ([email protected]) modified 630E equalizer workaround rule
40  Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41  Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42  Rev 1.06.04 Feb. 11 2000 Jeff Garzik <[email protected]> softnet and init for kernel 2.4
43  Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44  Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45  Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak ([email protected])
46  Rev 1.06 Nov. 4 1999 Ollie Lho ([email protected]) Second release
47  Rev 1.05.05 Oct. 29 1999 Ollie Lho ([email protected]) Single buffer Tx/Rx
48  Chin-Shan Li ([email protected]) Added AMD Am79c901 HomePNA PHY support
49  Rev 1.05 Aug. 7 1999 Jim Huang ([email protected]) Initial release
50 */
51 
52 #include <linux/module.h>
53 #include <linux/moduleparam.h>
54 #include <linux/kernel.h>
55 #include <linux/sched.h>
56 #include <linux/string.h>
57 #include <linux/timer.h>
58 #include <linux/errno.h>
59 #include <linux/ioport.h>
60 #include <linux/slab.h>
61 #include <linux/interrupt.h>
62 #include <linux/pci.h>
63 #include <linux/netdevice.h>
64 #include <linux/init.h>
65 #include <linux/mii.h>
66 #include <linux/etherdevice.h>
67 #include <linux/skbuff.h>
68 #include <linux/delay.h>
69 #include <linux/ethtool.h>
70 #include <linux/crc32.h>
71 #include <linux/bitops.h>
72 #include <linux/dma-mapping.h>
73 
74 #include <asm/processor.h> /* Processor type for cache alignment. */
75 #include <asm/io.h>
76 #include <asm/irq.h>
77 #include <asm/uaccess.h> /* User space memory access functions */
78 
79 #include "sis900.h"
80 
81 #define SIS900_MODULE_NAME "sis900"
82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
83 
84 static const char version[] __devinitconst =
85  KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
86 
87 static int max_interrupt_work = 40;
88 static int multicast_filter_limit = 128;
89 
90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
91 
92 #define SIS900_DEF_MSG \
93  (NETIF_MSG_DRV | \
94  NETIF_MSG_LINK | \
95  NETIF_MSG_RX_ERR | \
96  NETIF_MSG_TX_ERR)
97 
98 /* Time in jiffies before concluding the transmitter is hung. */
99 #define TX_TIMEOUT (4*HZ)
100 
101 enum {
102  SIS_900 = 0,
103  SIS_7016
104 };
105 static const char * card_names[] = {
106  "SiS 900 PCI Fast Ethernet",
107  "SiS 7016 PCI Fast Ethernet"
108 };
109 static DEFINE_PCI_DEVICE_TABLE(sis900_pci_tbl) = {
110  {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
111  PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
112  {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
113  PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
114  {0,}
115 };
116 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
117 
118 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
119 
120 static const struct mii_chip_info {
121  const char * name;
122  u16 phy_id0;
123  u16 phy_id1;
124  u8 phy_types;
125 #define HOME 0x0001
126 #define LAN 0x0002
127 #define MIX 0x0003
128 #define UNKNOWN 0x0
129 } mii_chip_table[] = {
130  { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
131  { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
132  { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
133  { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
134  { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
135  { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
136  { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
137  { "ICS LAN PHY", 0x0015, 0xF440, LAN },
138  { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
139  { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
140  { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
141  { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
142  { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
143  {NULL,},
144 };
145 
146 struct mii_phy {
147  struct mii_phy * next;
148  int phy_addr;
149  u16 phy_id0;
150  u16 phy_id1;
151  u16 status;
152  u8 phy_types;
153 };
154 
155 typedef struct _BufferDesc {
156  u32 link;
157  u32 cmdsts;
158  u32 bufptr;
159 } BufferDesc;
160 
161 struct sis900_private {
162  struct pci_dev * pci_dev;
163 
164  spinlock_t lock;
165 
166  struct mii_phy * mii;
167  struct mii_phy * first_mii; /* record the first mii structure */
168  unsigned int cur_phy;
169  struct mii_if_info mii_info;
170 
171  void __iomem *ioaddr;
172 
173  struct timer_list timer; /* Link status detection timer. */
174  u8 autong_complete; /* 1: auto-negotiate complete */
175 
176  u32 msg_enable;
177 
178  unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
179  unsigned int cur_tx, dirty_tx;
180 
181  /* The saved address of a sent/receive-in-place packet buffer */
182  struct sk_buff *tx_skbuff[NUM_TX_DESC];
183  struct sk_buff *rx_skbuff[NUM_RX_DESC];
184  BufferDesc *tx_ring;
185  BufferDesc *rx_ring;
186 
187  dma_addr_t tx_ring_dma;
188  dma_addr_t rx_ring_dma;
189 
190  unsigned int tx_full; /* The Tx queue is full. */
191  u8 host_bridge_rev;
192  u8 chipset_rev;
193 };
194 
195 MODULE_AUTHOR("Jim Huang <[email protected]>, Ollie Lho <[email protected]>");
196 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
197 MODULE_LICENSE("GPL");
198 
199 module_param(multicast_filter_limit, int, 0444);
200 module_param(max_interrupt_work, int, 0444);
201 module_param(sis900_debug, int, 0444);
202 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
203 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
204 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
205 
206 #define sw32(reg, val) iowrite32(val, ioaddr + (reg))
207 #define sw8(reg, val) iowrite8(val, ioaddr + (reg))
208 #define sr32(reg) ioread32(ioaddr + (reg))
209 #define sr16(reg) ioread16(ioaddr + (reg))
210 
211 #ifdef CONFIG_NET_POLL_CONTROLLER
212 static void sis900_poll(struct net_device *dev);
213 #endif
214 static int sis900_open(struct net_device *net_dev);
215 static int sis900_mii_probe (struct net_device * net_dev);
216 static void sis900_init_rxfilter (struct net_device * net_dev);
217 static u16 read_eeprom(void __iomem *ioaddr, int location);
218 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
219 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
220 static void sis900_timer(unsigned long data);
221 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
222 static void sis900_tx_timeout(struct net_device *net_dev);
223 static void sis900_init_tx_ring(struct net_device *net_dev);
224 static void sis900_init_rx_ring(struct net_device *net_dev);
225 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb,
226  struct net_device *net_dev);
227 static int sis900_rx(struct net_device *net_dev);
228 static void sis900_finish_xmit (struct net_device *net_dev);
229 static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
230 static int sis900_close(struct net_device *net_dev);
231 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
232 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
233 static void set_rx_mode(struct net_device *net_dev);
234 static void sis900_reset(struct net_device *net_dev);
235 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
236 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
237 static u16 sis900_default_phy(struct net_device * net_dev);
238 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
239 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
240 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
241 static void sis900_set_mode(struct sis900_private *, int speed, int duplex);
242 static const struct ethtool_ops sis900_ethtool_ops;
243 
254 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
255 {
256  struct sis900_private *sis_priv = netdev_priv(net_dev);
257  void __iomem *ioaddr = sis_priv->ioaddr;
258  u16 signature;
259  int i;
260 
261  /* check to see if we have sane EEPROM */
262  signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
263  if (signature == 0xffff || signature == 0x0000) {
264  printk (KERN_WARNING "%s: Error EERPOM read %x\n",
265  pci_name(pci_dev), signature);
266  return 0;
267  }
268 
269  /* get MAC address from EEPROM */
270  for (i = 0; i < 3; i++)
271  ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
272 
273  /* Store MAC Address in perm_addr */
274  memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
275 
276  return 1;
277 }
278 
290 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
291  struct net_device *net_dev)
292 {
293  struct pci_dev *isa_bridge = NULL;
294  u8 reg;
295  int i;
296 
297  isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
298  if (!isa_bridge)
299  isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
300  if (!isa_bridge) {
301  printk(KERN_WARNING "%s: Can not find ISA bridge\n",
302  pci_name(pci_dev));
303  return 0;
304  }
305  pci_read_config_byte(isa_bridge, 0x48, &reg);
306  pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
307 
308  for (i = 0; i < 6; i++) {
309  outb(0x09 + i, 0x70);
310  ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
311  }
312 
313  /* Store MAC Address in perm_addr */
314  memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
315 
316  pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
317  pci_dev_put(isa_bridge);
318 
319  return 1;
320 }
321 
322 
333 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
334  struct net_device *net_dev)
335 {
336  struct sis900_private *sis_priv = netdev_priv(net_dev);
337  void __iomem *ioaddr = sis_priv->ioaddr;
338  u32 rfcrSave;
339  u32 i;
340 
341  rfcrSave = sr32(rfcr);
342 
343  sw32(cr, rfcrSave | RELOAD);
344  sw32(cr, 0);
345 
346  /* disable packet filtering before setting filter */
347  sw32(rfcr, rfcrSave & ~RFEN);
348 
349  /* load MAC addr to filter data register */
350  for (i = 0 ; i < 3 ; i++) {
351  sw32(rfcr, (i << RFADDR_shift));
352  *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr);
353  }
354 
355  /* Store MAC Address in perm_addr */
356  memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
357 
358  /* enable packet filtering */
359  sw32(rfcr, rfcrSave | RFEN);
360 
361  return 1;
362 }
363 
380 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
381  struct net_device *net_dev)
382 {
383  struct sis900_private *sis_priv = netdev_priv(net_dev);
384  void __iomem *ioaddr = sis_priv->ioaddr;
385  int wait, rc = 0;
386 
387  sw32(mear, EEREQ);
388  for (wait = 0; wait < 2000; wait++) {
389  if (sr32(mear) & EEGNT) {
390  u16 *mac = (u16 *)net_dev->dev_addr;
391  int i;
392 
393  /* get MAC address from EEPROM */
394  for (i = 0; i < 3; i++)
395  mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr);
396 
397  /* Store MAC Address in perm_addr */
398  memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
399 
400  rc = 1;
401  break;
402  }
403  udelay(1);
404  }
405  sw32(mear, EEDONE);
406  return rc;
407 }
408 
409 static const struct net_device_ops sis900_netdev_ops = {
410  .ndo_open = sis900_open,
411  .ndo_stop = sis900_close,
412  .ndo_start_xmit = sis900_start_xmit,
413  .ndo_set_config = sis900_set_config,
414  .ndo_set_rx_mode = set_rx_mode,
415  .ndo_change_mtu = eth_change_mtu,
416  .ndo_validate_addr = eth_validate_addr,
417  .ndo_set_mac_address = eth_mac_addr,
418  .ndo_do_ioctl = mii_ioctl,
419  .ndo_tx_timeout = sis900_tx_timeout,
420 #ifdef CONFIG_NET_POLL_CONTROLLER
421  .ndo_poll_controller = sis900_poll,
422 #endif
423 };
424 
436 static int __devinit sis900_probe(struct pci_dev *pci_dev,
437  const struct pci_device_id *pci_id)
438 {
439  struct sis900_private *sis_priv;
440  struct net_device *net_dev;
441  struct pci_dev *dev;
442  dma_addr_t ring_dma;
443  void *ring_space;
444  void __iomem *ioaddr;
445  int i, ret;
446  const char *card_name = card_names[pci_id->driver_data];
447  const char *dev_name = pci_name(pci_dev);
448 
449 /* when built into the kernel, we only print version if device is found */
450 #ifndef MODULE
451  static int printed_version;
452  if (!printed_version++)
453  printk(version);
454 #endif
455 
456  /* setup various bits in PCI command register */
457  ret = pci_enable_device(pci_dev);
458  if(ret) return ret;
459 
460  i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
461  if(i){
462  printk(KERN_ERR "sis900.c: architecture does not support "
463  "32bit PCI busmaster DMA\n");
464  return i;
465  }
466 
467  pci_set_master(pci_dev);
468 
469  net_dev = alloc_etherdev(sizeof(struct sis900_private));
470  if (!net_dev)
471  return -ENOMEM;
472  SET_NETDEV_DEV(net_dev, &pci_dev->dev);
473 
474  /* We do a request_region() to register /proc/ioports info. */
475  ret = pci_request_regions(pci_dev, "sis900");
476  if (ret)
477  goto err_out;
478 
479  /* IO region. */
480  ioaddr = pci_iomap(pci_dev, 0, 0);
481  if (!ioaddr) {
482  ret = -ENOMEM;
483  goto err_out_cleardev;
484  }
485 
486  sis_priv = netdev_priv(net_dev);
487  sis_priv->ioaddr = ioaddr;
488  sis_priv->pci_dev = pci_dev;
489  spin_lock_init(&sis_priv->lock);
490 
491  pci_set_drvdata(pci_dev, net_dev);
492 
493  ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
494  if (!ring_space) {
495  ret = -ENOMEM;
496  goto err_out_unmap;
497  }
498  sis_priv->tx_ring = ring_space;
499  sis_priv->tx_ring_dma = ring_dma;
500 
501  ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
502  if (!ring_space) {
503  ret = -ENOMEM;
504  goto err_unmap_tx;
505  }
506  sis_priv->rx_ring = ring_space;
507  sis_priv->rx_ring_dma = ring_dma;
508 
509  /* The SiS900-specific entries in the device structure. */
510  net_dev->netdev_ops = &sis900_netdev_ops;
511  net_dev->watchdog_timeo = TX_TIMEOUT;
512  net_dev->ethtool_ops = &sis900_ethtool_ops;
513 
514  if (sis900_debug > 0)
515  sis_priv->msg_enable = sis900_debug;
516  else
517  sis_priv->msg_enable = SIS900_DEF_MSG;
518 
519  sis_priv->mii_info.dev = net_dev;
520  sis_priv->mii_info.mdio_read = mdio_read;
521  sis_priv->mii_info.mdio_write = mdio_write;
522  sis_priv->mii_info.phy_id_mask = 0x1f;
523  sis_priv->mii_info.reg_num_mask = 0x1f;
524 
525  /* Get Mac address according to the chip revision */
526  sis_priv->chipset_rev = pci_dev->revision;
527  if(netif_msg_probe(sis_priv))
528  printk(KERN_DEBUG "%s: detected revision %2.2x, "
529  "trying to get MAC address...\n",
530  dev_name, sis_priv->chipset_rev);
531 
532  ret = 0;
533  if (sis_priv->chipset_rev == SIS630E_900_REV)
534  ret = sis630e_get_mac_addr(pci_dev, net_dev);
535  else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
536  ret = sis635_get_mac_addr(pci_dev, net_dev);
537  else if (sis_priv->chipset_rev == SIS96x_900_REV)
538  ret = sis96x_get_mac_addr(pci_dev, net_dev);
539  else
540  ret = sis900_get_mac_addr(pci_dev, net_dev);
541 
542  if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) {
543  eth_hw_addr_random(net_dev);
544  printk(KERN_WARNING "%s: Unreadable or invalid MAC address,"
545  "using random generated one\n", dev_name);
546  }
547 
548  /* 630ET : set the mii access mode as software-mode */
549  if (sis_priv->chipset_rev == SIS630ET_900_REV)
550  sw32(cr, ACCESSMODE | sr32(cr));
551 
552  /* probe for mii transceiver */
553  if (sis900_mii_probe(net_dev) == 0) {
554  printk(KERN_WARNING "%s: Error probing MII device.\n",
555  dev_name);
556  ret = -ENODEV;
557  goto err_unmap_rx;
558  }
559 
560  /* save our host bridge revision */
561  dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
562  if (dev) {
563  sis_priv->host_bridge_rev = dev->revision;
564  pci_dev_put(dev);
565  }
566 
567  ret = register_netdev(net_dev);
568  if (ret)
569  goto err_unmap_rx;
570 
571  /* print some information about our NIC */
572  printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n",
573  net_dev->name, card_name, ioaddr, pci_dev->irq,
574  net_dev->dev_addr);
575 
576  /* Detect Wake on Lan support */
577  ret = (sr32(CFGPMC) & PMESP) >> 27;
578  if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
579  printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
580 
581  return 0;
582 
583 err_unmap_rx:
584  pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
585  sis_priv->rx_ring_dma);
586 err_unmap_tx:
587  pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
588  sis_priv->tx_ring_dma);
589 err_out_unmap:
590  pci_iounmap(pci_dev, ioaddr);
591 err_out_cleardev:
592  pci_set_drvdata(pci_dev, NULL);
593  pci_release_regions(pci_dev);
594  err_out:
595  free_netdev(net_dev);
596  return ret;
597 }
598 
608 static int __devinit sis900_mii_probe(struct net_device * net_dev)
609 {
610  struct sis900_private *sis_priv = netdev_priv(net_dev);
611  const char *dev_name = pci_name(sis_priv->pci_dev);
612  u16 poll_bit = MII_STAT_LINK, status = 0;
613  unsigned long timeout = jiffies + 5 * HZ;
614  int phy_addr;
615 
616  sis_priv->mii = NULL;
617 
618  /* search for total of 32 possible mii phy addresses */
619  for (phy_addr = 0; phy_addr < 32; phy_addr++) {
620  struct mii_phy * mii_phy = NULL;
621  u16 mii_status;
622  int i;
623 
624  mii_phy = NULL;
625  for(i = 0; i < 2; i++)
626  mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
627 
628  if (mii_status == 0xffff || mii_status == 0x0000) {
629  if (netif_msg_probe(sis_priv))
630  printk(KERN_DEBUG "%s: MII at address %d"
631  " not accessible\n",
632  dev_name, phy_addr);
633  continue;
634  }
635 
636  if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
637  mii_phy = sis_priv->first_mii;
638  while (mii_phy) {
639  struct mii_phy *phy;
640  phy = mii_phy;
641  mii_phy = mii_phy->next;
642  kfree(phy);
643  }
644  return 0;
645  }
646 
647  mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
648  mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
649  mii_phy->phy_addr = phy_addr;
650  mii_phy->status = mii_status;
651  mii_phy->next = sis_priv->mii;
652  sis_priv->mii = mii_phy;
653  sis_priv->first_mii = mii_phy;
654 
655  for (i = 0; mii_chip_table[i].phy_id1; i++)
656  if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
657  ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
658  mii_phy->phy_types = mii_chip_table[i].phy_types;
659  if (mii_chip_table[i].phy_types == MIX)
660  mii_phy->phy_types =
661  (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
662  printk(KERN_INFO "%s: %s transceiver found "
663  "at address %d.\n",
664  dev_name,
665  mii_chip_table[i].name,
666  phy_addr);
667  break;
668  }
669 
670  if( !mii_chip_table[i].phy_id1 ) {
671  printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
672  dev_name, phy_addr);
673  mii_phy->phy_types = UNKNOWN;
674  }
675  }
676 
677  if (sis_priv->mii == NULL) {
678  printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
679  return 0;
680  }
681 
682  /* select default PHY for mac */
683  sis_priv->mii = NULL;
684  sis900_default_phy( net_dev );
685 
686  /* Reset phy if default phy is internal sis900 */
687  if ((sis_priv->mii->phy_id0 == 0x001D) &&
688  ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
689  status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
690 
691  /* workaround for ICS1893 PHY */
692  if ((sis_priv->mii->phy_id0 == 0x0015) &&
693  ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
694  mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
695 
696  if(status & MII_STAT_LINK){
697  while (poll_bit) {
698  yield();
699 
700  poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
701  if (time_after_eq(jiffies, timeout)) {
702  printk(KERN_WARNING "%s: reset phy and link down now\n",
703  dev_name);
704  return -ETIME;
705  }
706  }
707  }
708 
709  if (sis_priv->chipset_rev == SIS630E_900_REV) {
710  /* SiS 630E has some bugs on default value of PHY registers */
711  mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
712  mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
713  mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
714  mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
715  //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
716  }
717 
718  if (sis_priv->mii->status & MII_STAT_LINK)
719  netif_carrier_on(net_dev);
720  else
721  netif_carrier_off(net_dev);
722 
723  return 1;
724 }
725 
735 static u16 sis900_default_phy(struct net_device * net_dev)
736 {
737  struct sis900_private *sis_priv = netdev_priv(net_dev);
738  struct mii_phy *phy = NULL, *phy_home = NULL,
739  *default_phy = NULL, *phy_lan = NULL;
740  u16 status;
741 
742  for (phy=sis_priv->first_mii; phy; phy=phy->next) {
743  status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
744  status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
745 
746  /* Link ON & Not select default PHY & not ghost PHY */
747  if ((status & MII_STAT_LINK) && !default_phy &&
748  (phy->phy_types != UNKNOWN))
749  default_phy = phy;
750  else {
751  status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
752  mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
753  status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
754  if (phy->phy_types == HOME)
755  phy_home = phy;
756  else if(phy->phy_types == LAN)
757  phy_lan = phy;
758  }
759  }
760 
761  if (!default_phy && phy_home)
762  default_phy = phy_home;
763  else if (!default_phy && phy_lan)
764  default_phy = phy_lan;
765  else if (!default_phy)
766  default_phy = sis_priv->first_mii;
767 
768  if (sis_priv->mii != default_phy) {
769  sis_priv->mii = default_phy;
770  sis_priv->cur_phy = default_phy->phy_addr;
771  printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
772  pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
773  }
774 
775  sis_priv->mii_info.phy_id = sis_priv->cur_phy;
776 
777  status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
778  status &= (~MII_CNTL_ISOLATE);
779 
780  mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
781  status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
782  status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
783 
784  return status;
785 }
786 
787 
797 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
798 {
799  u16 cap;
800  u16 status;
801 
802  status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
803  status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
804 
805  cap = MII_NWAY_CSMA_CD |
806  ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
807  ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
808  ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
809  ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
810 
811  mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
812 }
813 
814 
815 /* Delay between EEPROM clock transitions. */
816 #define eeprom_delay() sr32(mear)
817 
827 static u16 __devinit read_eeprom(void __iomem *ioaddr, int location)
828 {
829  u32 read_cmd = location | EEread;
830  int i;
831  u16 retval = 0;
832 
833  sw32(mear, 0);
834  eeprom_delay();
835  sw32(mear, EECS);
836  eeprom_delay();
837 
838  /* Shift the read command (9) bits out. */
839  for (i = 8; i >= 0; i--) {
840  u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
841 
842  sw32(mear, dataval);
843  eeprom_delay();
844  sw32(mear, dataval | EECLK);
845  eeprom_delay();
846  }
847  sw32(mear, EECS);
848  eeprom_delay();
849 
850  /* read the 16-bits data in */
851  for (i = 16; i > 0; i--) {
852  sw32(mear, EECS);
853  eeprom_delay();
854  sw32(mear, EECS | EECLK);
855  eeprom_delay();
856  retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0);
857  eeprom_delay();
858  }
859 
860  /* Terminate the EEPROM access. */
861  sw32(mear, 0);
862  eeprom_delay();
863 
864  return retval;
865 }
866 
867 /* Read and write the MII management registers using software-generated
868  serial MDIO protocol. Note that the command bits and data bits are
869  send out separately */
870 #define mdio_delay() sr32(mear)
871 
872 static void mdio_idle(struct sis900_private *sp)
873 {
874  void __iomem *ioaddr = sp->ioaddr;
875 
876  sw32(mear, MDIO | MDDIR);
877  mdio_delay();
878  sw32(mear, MDIO | MDDIR | MDC);
879 }
880 
881 /* Synchronize the MII management interface by shifting 32 one bits out. */
882 static void mdio_reset(struct sis900_private *sp)
883 {
884  void __iomem *ioaddr = sp->ioaddr;
885  int i;
886 
887  for (i = 31; i >= 0; i--) {
888  sw32(mear, MDDIR | MDIO);
889  mdio_delay();
890  sw32(mear, MDDIR | MDIO | MDC);
891  mdio_delay();
892  }
893 }
894 
906 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
907 {
908  int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
909  struct sis900_private *sp = netdev_priv(net_dev);
910  void __iomem *ioaddr = sp->ioaddr;
911  u16 retval = 0;
912  int i;
913 
914  mdio_reset(sp);
915  mdio_idle(sp);
916 
917  for (i = 15; i >= 0; i--) {
918  int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
919 
920  sw32(mear, dataval);
921  mdio_delay();
922  sw32(mear, dataval | MDC);
923  mdio_delay();
924  }
925 
926  /* Read the 16 data bits. */
927  for (i = 16; i > 0; i--) {
928  sw32(mear, 0);
929  mdio_delay();
930  retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0);
931  sw32(mear, MDC);
932  mdio_delay();
933  }
934  sw32(mear, 0x00);
935 
936  return retval;
937 }
938 
951 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
952  int value)
953 {
954  int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
955  struct sis900_private *sp = netdev_priv(net_dev);
956  void __iomem *ioaddr = sp->ioaddr;
957  int i;
958 
959  mdio_reset(sp);
960  mdio_idle(sp);
961 
962  /* Shift the command bits out. */
963  for (i = 15; i >= 0; i--) {
964  int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
965 
966  sw8(mear, dataval);
967  mdio_delay();
968  sw8(mear, dataval | MDC);
969  mdio_delay();
970  }
971  mdio_delay();
972 
973  /* Shift the value bits out. */
974  for (i = 15; i >= 0; i--) {
975  int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
976 
977  sw32(mear, dataval);
978  mdio_delay();
979  sw32(mear, dataval | MDC);
980  mdio_delay();
981  }
982  mdio_delay();
983 
984  /* Clear out extra bits. */
985  for (i = 2; i > 0; i--) {
986  sw8(mear, 0);
987  mdio_delay();
988  sw8(mear, MDC);
989  mdio_delay();
990  }
991  sw32(mear, 0x00);
992 }
993 
994 
1005 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
1006 {
1007  int i;
1008  u16 status;
1009 
1010  for (i = 0; i < 2; i++)
1011  status = mdio_read(net_dev, phy_addr, MII_STATUS);
1012 
1013  mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
1014 
1015  return status;
1016 }
1017 
1018 #ifdef CONFIG_NET_POLL_CONTROLLER
1019 /*
1020  * Polling 'interrupt' - used by things like netconsole to send skbs
1021  * without having to re-enable interrupts. It's not called while
1022  * the interrupt routine is executing.
1023 */
1024 static void sis900_poll(struct net_device *dev)
1025 {
1026  struct sis900_private *sp = netdev_priv(dev);
1027  const int irq = sp->pci_dev->irq;
1028 
1029  disable_irq(irq);
1030  sis900_interrupt(irq, dev);
1031  enable_irq(irq);
1032 }
1033 #endif
1034 
1043 static int
1044 sis900_open(struct net_device *net_dev)
1045 {
1046  struct sis900_private *sis_priv = netdev_priv(net_dev);
1047  void __iomem *ioaddr = sis_priv->ioaddr;
1048  int ret;
1049 
1050  /* Soft reset the chip. */
1051  sis900_reset(net_dev);
1052 
1053  /* Equalizer workaround Rule */
1054  sis630_set_eq(net_dev, sis_priv->chipset_rev);
1055 
1056  ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED,
1057  net_dev->name, net_dev);
1058  if (ret)
1059  return ret;
1060 
1061  sis900_init_rxfilter(net_dev);
1062 
1063  sis900_init_tx_ring(net_dev);
1064  sis900_init_rx_ring(net_dev);
1065 
1066  set_rx_mode(net_dev);
1067 
1068  netif_start_queue(net_dev);
1069 
1070  /* Workaround for EDB */
1071  sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1072 
1073  /* Enable all known interrupts by setting the interrupt mask. */
1074  sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1075  sw32(cr, RxENA | sr32(cr));
1076  sw32(ier, IE);
1077 
1078  sis900_check_mode(net_dev, sis_priv->mii);
1079 
1080  /* Set the timer to switch to check for link beat and perhaps switch
1081  to an alternate media type. */
1082  init_timer(&sis_priv->timer);
1083  sis_priv->timer.expires = jiffies + HZ;
1084  sis_priv->timer.data = (unsigned long)net_dev;
1085  sis_priv->timer.function = sis900_timer;
1086  add_timer(&sis_priv->timer);
1087 
1088  return 0;
1089 }
1090 
1099 static void
1100 sis900_init_rxfilter (struct net_device * net_dev)
1101 {
1102  struct sis900_private *sis_priv = netdev_priv(net_dev);
1103  void __iomem *ioaddr = sis_priv->ioaddr;
1104  u32 rfcrSave;
1105  u32 i;
1106 
1107  rfcrSave = sr32(rfcr);
1108 
1109  /* disable packet filtering before setting filter */
1110  sw32(rfcr, rfcrSave & ~RFEN);
1111 
1112  /* load MAC addr to filter data register */
1113  for (i = 0 ; i < 3 ; i++) {
1114  u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1115 
1116  sw32(rfcr, i << RFADDR_shift);
1117  sw32(rfdr, w);
1118 
1119  if (netif_msg_hw(sis_priv)) {
1120  printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1121  net_dev->name, i, sr32(rfdr));
1122  }
1123  }
1124 
1125  /* enable packet filtering */
1126  sw32(rfcr, rfcrSave | RFEN);
1127 }
1128 
1136 static void
1137 sis900_init_tx_ring(struct net_device *net_dev)
1138 {
1139  struct sis900_private *sis_priv = netdev_priv(net_dev);
1140  void __iomem *ioaddr = sis_priv->ioaddr;
1141  int i;
1142 
1143  sis_priv->tx_full = 0;
1144  sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1145 
1146  for (i = 0; i < NUM_TX_DESC; i++) {
1147  sis_priv->tx_skbuff[i] = NULL;
1148 
1149  sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1150  ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1151  sis_priv->tx_ring[i].cmdsts = 0;
1152  sis_priv->tx_ring[i].bufptr = 0;
1153  }
1154 
1155  /* load Transmit Descriptor Register */
1156  sw32(txdp, sis_priv->tx_ring_dma);
1157  if (netif_msg_hw(sis_priv))
1158  printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1159  net_dev->name, sr32(txdp));
1160 }
1161 
1170 static void
1171 sis900_init_rx_ring(struct net_device *net_dev)
1172 {
1173  struct sis900_private *sis_priv = netdev_priv(net_dev);
1174  void __iomem *ioaddr = sis_priv->ioaddr;
1175  int i;
1176 
1177  sis_priv->cur_rx = 0;
1178  sis_priv->dirty_rx = 0;
1179 
1180  /* init RX descriptor */
1181  for (i = 0; i < NUM_RX_DESC; i++) {
1182  sis_priv->rx_skbuff[i] = NULL;
1183 
1184  sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1185  ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1186  sis_priv->rx_ring[i].cmdsts = 0;
1187  sis_priv->rx_ring[i].bufptr = 0;
1188  }
1189 
1190  /* allocate sock buffers */
1191  for (i = 0; i < NUM_RX_DESC; i++) {
1192  struct sk_buff *skb;
1193 
1194  if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1195  /* not enough memory for skbuff, this makes a "hole"
1196  on the buffer ring, it is not clear how the
1197  hardware will react to this kind of degenerated
1198  buffer */
1199  break;
1200  }
1201  sis_priv->rx_skbuff[i] = skb;
1202  sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1203  sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1204  skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1205  }
1206  sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1207 
1208  /* load Receive Descriptor Register */
1209  sw32(rxdp, sis_priv->rx_ring_dma);
1210  if (netif_msg_hw(sis_priv))
1211  printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1212  net_dev->name, sr32(rxdp));
1213 }
1214 
1242 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1243 {
1244  struct sis900_private *sis_priv = netdev_priv(net_dev);
1245  u16 reg14h, eq_value=0, max_value=0, min_value=0;
1246  int i, maxcount=10;
1247 
1248  if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1249  revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1250  return;
1251 
1252  if (netif_carrier_ok(net_dev)) {
1253  reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1254  mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1255  (0x2200 | reg14h) & 0xBFFF);
1256  for (i=0; i < maxcount; i++) {
1257  eq_value = (0x00F8 & mdio_read(net_dev,
1258  sis_priv->cur_phy, MII_RESV)) >> 3;
1259  if (i == 0)
1260  max_value=min_value=eq_value;
1261  max_value = (eq_value > max_value) ?
1262  eq_value : max_value;
1263  min_value = (eq_value < min_value) ?
1264  eq_value : min_value;
1265  }
1266  /* 630E rule to determine the equalizer value */
1267  if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1268  revision == SIS630ET_900_REV) {
1269  if (max_value < 5)
1270  eq_value = max_value;
1271  else if (max_value >= 5 && max_value < 15)
1272  eq_value = (max_value == min_value) ?
1273  max_value+2 : max_value+1;
1274  else if (max_value >= 15)
1275  eq_value=(max_value == min_value) ?
1276  max_value+6 : max_value+5;
1277  }
1278  /* 630B0&B1 rule to determine the equalizer value */
1279  if (revision == SIS630A_900_REV &&
1280  (sis_priv->host_bridge_rev == SIS630B0 ||
1281  sis_priv->host_bridge_rev == SIS630B1)) {
1282  if (max_value == 0)
1283  eq_value = 3;
1284  else
1285  eq_value = (max_value + min_value + 1)/2;
1286  }
1287  /* write equalizer value and setting */
1288  reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1289  reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1290  reg14h = (reg14h | 0x6000) & 0xFDFF;
1291  mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1292  } else {
1293  reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1294  if (revision == SIS630A_900_REV &&
1295  (sis_priv->host_bridge_rev == SIS630B0 ||
1296  sis_priv->host_bridge_rev == SIS630B1))
1297  mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1298  (reg14h | 0x2200) & 0xBFFF);
1299  else
1300  mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1301  (reg14h | 0x2000) & 0xBFFF);
1302  }
1303 }
1304 
1313 static void sis900_timer(unsigned long data)
1314 {
1315  struct net_device *net_dev = (struct net_device *)data;
1316  struct sis900_private *sis_priv = netdev_priv(net_dev);
1317  struct mii_phy *mii_phy = sis_priv->mii;
1318  static const int next_tick = 5*HZ;
1319  u16 status;
1320 
1321  if (!sis_priv->autong_complete){
1322  int uninitialized_var(speed), duplex = 0;
1323 
1324  sis900_read_mode(net_dev, &speed, &duplex);
1325  if (duplex){
1326  sis900_set_mode(sis_priv, speed, duplex);
1327  sis630_set_eq(net_dev, sis_priv->chipset_rev);
1328  netif_start_queue(net_dev);
1329  }
1330 
1331  sis_priv->timer.expires = jiffies + HZ;
1332  add_timer(&sis_priv->timer);
1333  return;
1334  }
1335 
1336  status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1337  status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1338 
1339  /* Link OFF -> ON */
1340  if (!netif_carrier_ok(net_dev)) {
1341  LookForLink:
1342  /* Search for new PHY */
1343  status = sis900_default_phy(net_dev);
1344  mii_phy = sis_priv->mii;
1345 
1346  if (status & MII_STAT_LINK){
1347  sis900_check_mode(net_dev, mii_phy);
1348  netif_carrier_on(net_dev);
1349  }
1350  } else {
1351  /* Link ON -> OFF */
1352  if (!(status & MII_STAT_LINK)){
1353  netif_carrier_off(net_dev);
1354  if(netif_msg_link(sis_priv))
1355  printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1356 
1357  /* Change mode issue */
1358  if ((mii_phy->phy_id0 == 0x001D) &&
1359  ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1360  sis900_reset_phy(net_dev, sis_priv->cur_phy);
1361 
1362  sis630_set_eq(net_dev, sis_priv->chipset_rev);
1363 
1364  goto LookForLink;
1365  }
1366  }
1367 
1368  sis_priv->timer.expires = jiffies + next_tick;
1369  add_timer(&sis_priv->timer);
1370 }
1371 
1384 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1385 {
1386  struct sis900_private *sis_priv = netdev_priv(net_dev);
1387  void __iomem *ioaddr = sis_priv->ioaddr;
1388  int speed, duplex;
1389 
1390  if (mii_phy->phy_types == LAN) {
1391  sw32(cfg, ~EXD & sr32(cfg));
1392  sis900_set_capability(net_dev , mii_phy);
1393  sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1394  } else {
1395  sw32(cfg, EXD | sr32(cfg));
1396  speed = HW_SPEED_HOME;
1397  duplex = FDX_CAPABLE_HALF_SELECTED;
1398  sis900_set_mode(sis_priv, speed, duplex);
1399  sis_priv->autong_complete = 1;
1400  }
1401 }
1402 
1416 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex)
1417 {
1418  void __iomem *ioaddr = sp->ioaddr;
1419  u32 tx_flags = 0, rx_flags = 0;
1420 
1421  if (sr32( cfg) & EDB_MASTER_EN) {
1422  tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1423  (TX_FILL_THRESH << TxFILLT_shift);
1424  rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1425  } else {
1426  tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1427  (TX_FILL_THRESH << TxFILLT_shift);
1428  rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1429  }
1430 
1431  if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1432  rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1433  tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1434  } else {
1435  rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1436  tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1437  }
1438 
1439  if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1440  tx_flags |= (TxCSI | TxHBI);
1441  rx_flags |= RxATX;
1442  }
1443 
1444 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1445  /* Can accept Jumbo packet */
1446  rx_flags |= RxAJAB;
1447 #endif
1448 
1449  sw32(txcfg, tx_flags);
1450  sw32(rxcfg, rx_flags);
1451 }
1452 
1464 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1465 {
1466  struct sis900_private *sis_priv = netdev_priv(net_dev);
1467  int i = 0;
1468  u32 status;
1469 
1470  for (i = 0; i < 2; i++)
1471  status = mdio_read(net_dev, phy_addr, MII_STATUS);
1472 
1473  if (!(status & MII_STAT_LINK)){
1474  if(netif_msg_link(sis_priv))
1475  printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1476  sis_priv->autong_complete = 1;
1477  netif_carrier_off(net_dev);
1478  return;
1479  }
1480 
1481  /* (Re)start AutoNegotiate */
1482  mdio_write(net_dev, phy_addr, MII_CONTROL,
1483  MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1484  sis_priv->autong_complete = 0;
1485 }
1486 
1487 
1499 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1500 {
1501  struct sis900_private *sis_priv = netdev_priv(net_dev);
1502  struct mii_phy *phy = sis_priv->mii;
1503  int phy_addr = sis_priv->cur_phy;
1504  u32 status;
1505  u16 autoadv, autorec;
1506  int i;
1507 
1508  for (i = 0; i < 2; i++)
1509  status = mdio_read(net_dev, phy_addr, MII_STATUS);
1510 
1511  if (!(status & MII_STAT_LINK))
1512  return;
1513 
1514  /* AutoNegotiate completed */
1515  autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1516  autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1517  status = autoadv & autorec;
1518 
1519  *speed = HW_SPEED_10_MBPS;
1520  *duplex = FDX_CAPABLE_HALF_SELECTED;
1521 
1522  if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1523  *speed = HW_SPEED_100_MBPS;
1524  if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1525  *duplex = FDX_CAPABLE_FULL_SELECTED;
1526 
1527  sis_priv->autong_complete = 1;
1528 
1529  /* Workaround for Realtek RTL8201 PHY issue */
1530  if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1531  if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1532  *duplex = FDX_CAPABLE_FULL_SELECTED;
1533  if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1534  *speed = HW_SPEED_100_MBPS;
1535  }
1536 
1537  if(netif_msg_link(sis_priv))
1538  printk(KERN_INFO "%s: Media Link On %s %s-duplex\n",
1539  net_dev->name,
1540  *speed == HW_SPEED_100_MBPS ?
1541  "100mbps" : "10mbps",
1542  *duplex == FDX_CAPABLE_FULL_SELECTED ?
1543  "full" : "half");
1544 }
1545 
1554 static void sis900_tx_timeout(struct net_device *net_dev)
1555 {
1556  struct sis900_private *sis_priv = netdev_priv(net_dev);
1557  void __iomem *ioaddr = sis_priv->ioaddr;
1558  unsigned long flags;
1559  int i;
1560 
1561  if (netif_msg_tx_err(sis_priv)) {
1562  printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n",
1563  net_dev->name, sr32(cr), sr32(isr));
1564  }
1565 
1566  /* Disable interrupts by clearing the interrupt mask. */
1567  sw32(imr, 0x0000);
1568 
1569  /* use spinlock to prevent interrupt handler accessing buffer ring */
1570  spin_lock_irqsave(&sis_priv->lock, flags);
1571 
1572  /* discard unsent packets */
1573  sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1574  for (i = 0; i < NUM_TX_DESC; i++) {
1575  struct sk_buff *skb = sis_priv->tx_skbuff[i];
1576 
1577  if (skb) {
1578  pci_unmap_single(sis_priv->pci_dev,
1579  sis_priv->tx_ring[i].bufptr, skb->len,
1580  PCI_DMA_TODEVICE);
1581  dev_kfree_skb_irq(skb);
1582  sis_priv->tx_skbuff[i] = NULL;
1583  sis_priv->tx_ring[i].cmdsts = 0;
1584  sis_priv->tx_ring[i].bufptr = 0;
1585  net_dev->stats.tx_dropped++;
1586  }
1587  }
1588  sis_priv->tx_full = 0;
1589  netif_wake_queue(net_dev);
1590 
1591  spin_unlock_irqrestore(&sis_priv->lock, flags);
1592 
1593  net_dev->trans_start = jiffies; /* prevent tx timeout */
1594 
1595  /* load Transmit Descriptor Register */
1596  sw32(txdp, sis_priv->tx_ring_dma);
1597 
1598  /* Enable all known interrupts by setting the interrupt mask. */
1599  sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1600 }
1601 
1612 static netdev_tx_t
1613 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1614 {
1615  struct sis900_private *sis_priv = netdev_priv(net_dev);
1616  void __iomem *ioaddr = sis_priv->ioaddr;
1617  unsigned int entry;
1618  unsigned long flags;
1619  unsigned int index_cur_tx, index_dirty_tx;
1620  unsigned int count_dirty_tx;
1621 
1622  /* Don't transmit data before the complete of auto-negotiation */
1623  if(!sis_priv->autong_complete){
1624  netif_stop_queue(net_dev);
1625  return NETDEV_TX_BUSY;
1626  }
1627 
1628  spin_lock_irqsave(&sis_priv->lock, flags);
1629 
1630  /* Calculate the next Tx descriptor entry. */
1631  entry = sis_priv->cur_tx % NUM_TX_DESC;
1632  sis_priv->tx_skbuff[entry] = skb;
1633 
1634  /* set the transmit buffer descriptor and enable Transmit State Machine */
1635  sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1636  skb->data, skb->len, PCI_DMA_TODEVICE);
1637  sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1638  sw32(cr, TxENA | sr32(cr));
1639 
1640  sis_priv->cur_tx ++;
1641  index_cur_tx = sis_priv->cur_tx;
1642  index_dirty_tx = sis_priv->dirty_tx;
1643 
1644  for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1645  count_dirty_tx ++;
1646 
1647  if (index_cur_tx == index_dirty_tx) {
1648  /* dirty_tx is met in the cycle of cur_tx, buffer full */
1649  sis_priv->tx_full = 1;
1650  netif_stop_queue(net_dev);
1651  } else if (count_dirty_tx < NUM_TX_DESC) {
1652  /* Typical path, tell upper layer that more transmission is possible */
1653  netif_start_queue(net_dev);
1654  } else {
1655  /* buffer full, tell upper layer no more transmission */
1656  sis_priv->tx_full = 1;
1657  netif_stop_queue(net_dev);
1658  }
1659 
1660  spin_unlock_irqrestore(&sis_priv->lock, flags);
1661 
1662  if (netif_msg_tx_queued(sis_priv))
1663  printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1664  "to slot %d.\n",
1665  net_dev->name, skb->data, (int)skb->len, entry);
1666 
1667  return NETDEV_TX_OK;
1668 }
1669 
1679 static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1680 {
1681  struct net_device *net_dev = dev_instance;
1682  struct sis900_private *sis_priv = netdev_priv(net_dev);
1683  int boguscnt = max_interrupt_work;
1684  void __iomem *ioaddr = sis_priv->ioaddr;
1685  u32 status;
1686  unsigned int handled = 0;
1687 
1688  spin_lock (&sis_priv->lock);
1689 
1690  do {
1691  status = sr32(isr);
1692 
1693  if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1694  /* nothing intresting happened */
1695  break;
1696  handled = 1;
1697 
1698  /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1699  if (status & (RxORN | RxERR | RxOK))
1700  /* Rx interrupt */
1701  sis900_rx(net_dev);
1702 
1703  if (status & (TxURN | TxERR | TxIDLE))
1704  /* Tx interrupt */
1705  sis900_finish_xmit(net_dev);
1706 
1707  /* something strange happened !!! */
1708  if (status & HIBERR) {
1709  if(netif_msg_intr(sis_priv))
1710  printk(KERN_INFO "%s: Abnormal interrupt, "
1711  "status %#8.8x.\n", net_dev->name, status);
1712  break;
1713  }
1714  if (--boguscnt < 0) {
1715  if(netif_msg_intr(sis_priv))
1716  printk(KERN_INFO "%s: Too much work at interrupt, "
1717  "interrupt status = %#8.8x.\n",
1718  net_dev->name, status);
1719  break;
1720  }
1721  } while (1);
1722 
1723  if(netif_msg_intr(sis_priv))
1724  printk(KERN_DEBUG "%s: exiting interrupt, "
1725  "interrupt status = 0x%#8.8x.\n",
1726  net_dev->name, sr32(isr));
1727 
1728  spin_unlock (&sis_priv->lock);
1729  return IRQ_RETVAL(handled);
1730 }
1731 
1742 static int sis900_rx(struct net_device *net_dev)
1743 {
1744  struct sis900_private *sis_priv = netdev_priv(net_dev);
1745  void __iomem *ioaddr = sis_priv->ioaddr;
1746  unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1747  u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1748  int rx_work_limit;
1749 
1750  if (netif_msg_rx_status(sis_priv))
1751  printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1752  "status:0x%8.8x\n",
1753  sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1754  rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1755 
1756  while (rx_status & OWN) {
1757  unsigned int rx_size;
1758  unsigned int data_size;
1759 
1760  if (--rx_work_limit < 0)
1761  break;
1762 
1763  data_size = rx_status & DSIZE;
1764  rx_size = data_size - CRC_SIZE;
1765 
1766 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1767  /* ``TOOLONG'' flag means jumbo packet received. */
1768  if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1769  rx_status &= (~ ((unsigned int)TOOLONG));
1770 #endif
1771 
1772  if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1773  /* corrupted packet received */
1774  if (netif_msg_rx_err(sis_priv))
1775  printk(KERN_DEBUG "%s: Corrupted packet "
1776  "received, buffer status = 0x%8.8x/%d.\n",
1777  net_dev->name, rx_status, data_size);
1778  net_dev->stats.rx_errors++;
1779  if (rx_status & OVERRUN)
1780  net_dev->stats.rx_over_errors++;
1781  if (rx_status & (TOOLONG|RUNT))
1782  net_dev->stats.rx_length_errors++;
1783  if (rx_status & (RXISERR | FAERR))
1784  net_dev->stats.rx_frame_errors++;
1785  if (rx_status & CRCERR)
1786  net_dev->stats.rx_crc_errors++;
1787  /* reset buffer descriptor state */
1788  sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1789  } else {
1790  struct sk_buff * skb;
1791  struct sk_buff * rx_skb;
1792 
1793  pci_unmap_single(sis_priv->pci_dev,
1794  sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1795  PCI_DMA_FROMDEVICE);
1796 
1797  /* refill the Rx buffer, what if there is not enough
1798  * memory for new socket buffer ?? */
1799  if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1800  /*
1801  * Not enough memory to refill the buffer
1802  * so we need to recycle the old one so
1803  * as to avoid creating a memory hole
1804  * in the rx ring
1805  */
1806  skb = sis_priv->rx_skbuff[entry];
1807  net_dev->stats.rx_dropped++;
1808  goto refill_rx_ring;
1809  }
1810 
1811  /* This situation should never happen, but due to
1812  some unknown bugs, it is possible that
1813  we are working on NULL sk_buff :-( */
1814  if (sis_priv->rx_skbuff[entry] == NULL) {
1815  if (netif_msg_rx_err(sis_priv))
1816  printk(KERN_WARNING "%s: NULL pointer "
1817  "encountered in Rx ring\n"
1818  "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1819  net_dev->name, sis_priv->cur_rx,
1820  sis_priv->dirty_rx);
1821  dev_kfree_skb(skb);
1822  break;
1823  }
1824 
1825  /* give the socket buffer to upper layers */
1826  rx_skb = sis_priv->rx_skbuff[entry];
1827  skb_put(rx_skb, rx_size);
1828  rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1829  netif_rx(rx_skb);
1830 
1831  /* some network statistics */
1832  if ((rx_status & BCAST) == MCAST)
1833  net_dev->stats.multicast++;
1834  net_dev->stats.rx_bytes += rx_size;
1835  net_dev->stats.rx_packets++;
1836  sis_priv->dirty_rx++;
1837 refill_rx_ring:
1838  sis_priv->rx_skbuff[entry] = skb;
1839  sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1840  sis_priv->rx_ring[entry].bufptr =
1841  pci_map_single(sis_priv->pci_dev, skb->data,
1842  RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1843  }
1844  sis_priv->cur_rx++;
1845  entry = sis_priv->cur_rx % NUM_RX_DESC;
1846  rx_status = sis_priv->rx_ring[entry].cmdsts;
1847  } // while
1848 
1849  /* refill the Rx buffer, what if the rate of refilling is slower
1850  * than consuming ?? */
1851  for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1852  struct sk_buff *skb;
1853 
1854  entry = sis_priv->dirty_rx % NUM_RX_DESC;
1855 
1856  if (sis_priv->rx_skbuff[entry] == NULL) {
1857  if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1858  /* not enough memory for skbuff, this makes a
1859  * "hole" on the buffer ring, it is not clear
1860  * how the hardware will react to this kind
1861  * of degenerated buffer */
1862  if (netif_msg_rx_err(sis_priv))
1863  printk(KERN_INFO "%s: Memory squeeze, "
1864  "deferring packet.\n",
1865  net_dev->name);
1866  net_dev->stats.rx_dropped++;
1867  break;
1868  }
1869  sis_priv->rx_skbuff[entry] = skb;
1870  sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1871  sis_priv->rx_ring[entry].bufptr =
1872  pci_map_single(sis_priv->pci_dev, skb->data,
1873  RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1874  }
1875  }
1876  /* re-enable the potentially idle receive state matchine */
1877  sw32(cr , RxENA | sr32(cr));
1878 
1879  return 0;
1880 }
1881 
1892 static void sis900_finish_xmit (struct net_device *net_dev)
1893 {
1894  struct sis900_private *sis_priv = netdev_priv(net_dev);
1895 
1896  for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1897  struct sk_buff *skb;
1898  unsigned int entry;
1899  u32 tx_status;
1900 
1901  entry = sis_priv->dirty_tx % NUM_TX_DESC;
1902  tx_status = sis_priv->tx_ring[entry].cmdsts;
1903 
1904  if (tx_status & OWN) {
1905  /* The packet is not transmitted yet (owned by hardware) !
1906  * Note: the interrupt is generated only when Tx Machine
1907  * is idle, so this is an almost impossible case */
1908  break;
1909  }
1910 
1911  if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1912  /* packet unsuccessfully transmitted */
1913  if (netif_msg_tx_err(sis_priv))
1914  printk(KERN_DEBUG "%s: Transmit "
1915  "error, Tx status %8.8x.\n",
1916  net_dev->name, tx_status);
1917  net_dev->stats.tx_errors++;
1918  if (tx_status & UNDERRUN)
1919  net_dev->stats.tx_fifo_errors++;
1920  if (tx_status & ABORT)
1921  net_dev->stats.tx_aborted_errors++;
1922  if (tx_status & NOCARRIER)
1923  net_dev->stats.tx_carrier_errors++;
1924  if (tx_status & OWCOLL)
1925  net_dev->stats.tx_window_errors++;
1926  } else {
1927  /* packet successfully transmitted */
1928  net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1929  net_dev->stats.tx_bytes += tx_status & DSIZE;
1930  net_dev->stats.tx_packets++;
1931  }
1932  /* Free the original skb. */
1933  skb = sis_priv->tx_skbuff[entry];
1934  pci_unmap_single(sis_priv->pci_dev,
1935  sis_priv->tx_ring[entry].bufptr, skb->len,
1936  PCI_DMA_TODEVICE);
1937  dev_kfree_skb_irq(skb);
1938  sis_priv->tx_skbuff[entry] = NULL;
1939  sis_priv->tx_ring[entry].bufptr = 0;
1940  sis_priv->tx_ring[entry].cmdsts = 0;
1941  }
1942 
1943  if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1944  sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1945  /* The ring is no longer full, clear tx_full and schedule
1946  * more transmission by netif_wake_queue(net_dev) */
1947  sis_priv->tx_full = 0;
1948  netif_wake_queue (net_dev);
1949  }
1950 }
1951 
1960 static int sis900_close(struct net_device *net_dev)
1961 {
1962  struct sis900_private *sis_priv = netdev_priv(net_dev);
1963  struct pci_dev *pdev = sis_priv->pci_dev;
1964  void __iomem *ioaddr = sis_priv->ioaddr;
1965  struct sk_buff *skb;
1966  int i;
1967 
1968  netif_stop_queue(net_dev);
1969 
1970  /* Disable interrupts by clearing the interrupt mask. */
1971  sw32(imr, 0x0000);
1972  sw32(ier, 0x0000);
1973 
1974  /* Stop the chip's Tx and Rx Status Machine */
1975  sw32(cr, RxDIS | TxDIS | sr32(cr));
1976 
1977  del_timer(&sis_priv->timer);
1978 
1979  free_irq(pdev->irq, net_dev);
1980 
1981  /* Free Tx and RX skbuff */
1982  for (i = 0; i < NUM_RX_DESC; i++) {
1983  skb = sis_priv->rx_skbuff[i];
1984  if (skb) {
1985  pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr,
1986  RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1987  dev_kfree_skb(skb);
1988  sis_priv->rx_skbuff[i] = NULL;
1989  }
1990  }
1991  for (i = 0; i < NUM_TX_DESC; i++) {
1992  skb = sis_priv->tx_skbuff[i];
1993  if (skb) {
1994  pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr,
1995  skb->len, PCI_DMA_TODEVICE);
1996  dev_kfree_skb(skb);
1997  sis_priv->tx_skbuff[i] = NULL;
1998  }
1999  }
2000 
2001  /* Green! Put the chip in low-power mode. */
2002 
2003  return 0;
2004 }
2005 
2014 static void sis900_get_drvinfo(struct net_device *net_dev,
2015  struct ethtool_drvinfo *info)
2016 {
2017  struct sis900_private *sis_priv = netdev_priv(net_dev);
2018 
2019  strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver));
2020  strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version));
2021  strlcpy(info->bus_info, pci_name(sis_priv->pci_dev),
2022  sizeof(info->bus_info));
2023 }
2024 
2025 static u32 sis900_get_msglevel(struct net_device *net_dev)
2026 {
2027  struct sis900_private *sis_priv = netdev_priv(net_dev);
2028  return sis_priv->msg_enable;
2029 }
2030 
2031 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
2032 {
2033  struct sis900_private *sis_priv = netdev_priv(net_dev);
2034  sis_priv->msg_enable = value;
2035 }
2036 
2037 static u32 sis900_get_link(struct net_device *net_dev)
2038 {
2039  struct sis900_private *sis_priv = netdev_priv(net_dev);
2040  return mii_link_ok(&sis_priv->mii_info);
2041 }
2042 
2043 static int sis900_get_settings(struct net_device *net_dev,
2044  struct ethtool_cmd *cmd)
2045 {
2046  struct sis900_private *sis_priv = netdev_priv(net_dev);
2047  spin_lock_irq(&sis_priv->lock);
2048  mii_ethtool_gset(&sis_priv->mii_info, cmd);
2049  spin_unlock_irq(&sis_priv->lock);
2050  return 0;
2051 }
2052 
2053 static int sis900_set_settings(struct net_device *net_dev,
2054  struct ethtool_cmd *cmd)
2055 {
2056  struct sis900_private *sis_priv = netdev_priv(net_dev);
2057  int rt;
2058  spin_lock_irq(&sis_priv->lock);
2059  rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2060  spin_unlock_irq(&sis_priv->lock);
2061  return rt;
2062 }
2063 
2064 static int sis900_nway_reset(struct net_device *net_dev)
2065 {
2066  struct sis900_private *sis_priv = netdev_priv(net_dev);
2067  return mii_nway_restart(&sis_priv->mii_info);
2068 }
2069 
2081 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2082 {
2083  struct sis900_private *sis_priv = netdev_priv(net_dev);
2084  void __iomem *ioaddr = sis_priv->ioaddr;
2085  u32 cfgpmcsr = 0, pmctrl_bits = 0;
2086 
2087  if (wol->wolopts == 0) {
2088  pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2089  cfgpmcsr &= ~PME_EN;
2090  pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2091  sw32(pmctrl, pmctrl_bits);
2092  if (netif_msg_wol(sis_priv))
2093  printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2094  return 0;
2095  }
2096 
2097  if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2098  | WAKE_BCAST | WAKE_ARP))
2099  return -EINVAL;
2100 
2101  if (wol->wolopts & WAKE_MAGIC)
2102  pmctrl_bits |= MAGICPKT;
2103  if (wol->wolopts & WAKE_PHY)
2104  pmctrl_bits |= LINKON;
2105 
2106  sw32(pmctrl, pmctrl_bits);
2107 
2108  pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2109  cfgpmcsr |= PME_EN;
2110  pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2111  if (netif_msg_wol(sis_priv))
2112  printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2113 
2114  return 0;
2115 }
2116 
2117 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2118 {
2119  struct sis900_private *sp = netdev_priv(net_dev);
2120  void __iomem *ioaddr = sp->ioaddr;
2121  u32 pmctrl_bits;
2122 
2123  pmctrl_bits = sr32(pmctrl);
2124  if (pmctrl_bits & MAGICPKT)
2125  wol->wolopts |= WAKE_MAGIC;
2126  if (pmctrl_bits & LINKON)
2127  wol->wolopts |= WAKE_PHY;
2128 
2129  wol->supported = (WAKE_PHY | WAKE_MAGIC);
2130 }
2131 
2132 static const struct ethtool_ops sis900_ethtool_ops = {
2133  .get_drvinfo = sis900_get_drvinfo,
2134  .get_msglevel = sis900_get_msglevel,
2135  .set_msglevel = sis900_set_msglevel,
2136  .get_link = sis900_get_link,
2137  .get_settings = sis900_get_settings,
2138  .set_settings = sis900_set_settings,
2139  .nway_reset = sis900_nway_reset,
2140  .get_wol = sis900_get_wol,
2141  .set_wol = sis900_set_wol
2142 };
2143 
2153 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2154 {
2155  struct sis900_private *sis_priv = netdev_priv(net_dev);
2156  struct mii_ioctl_data *data = if_mii(rq);
2157 
2158  switch(cmd) {
2159  case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2160  data->phy_id = sis_priv->mii->phy_addr;
2161  /* Fall Through */
2162 
2163  case SIOCGMIIREG: /* Read MII PHY register. */
2164  data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2165  return 0;
2166 
2167  case SIOCSMIIREG: /* Write MII PHY register. */
2168  mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2169  return 0;
2170  default:
2171  return -EOPNOTSUPP;
2172  }
2173 }
2174 
2185 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2186 {
2187  struct sis900_private *sis_priv = netdev_priv(dev);
2188  struct mii_phy *mii_phy = sis_priv->mii;
2189 
2190  u16 status;
2191 
2192  if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2193  /* we switch on the ifmap->port field. I couldn't find anything
2194  * like a definition or standard for the values of that field.
2195  * I think the meaning of those values is device specific. But
2196  * since I would like to change the media type via the ifconfig
2197  * command I use the definition from linux/netdevice.h
2198  * (which seems to be different from the ifport(pcmcia) definition) */
2199  switch(map->port){
2200  case IF_PORT_UNKNOWN: /* use auto here */
2201  dev->if_port = map->port;
2202  /* we are going to change the media type, so the Link
2203  * will be temporary down and we need to reflect that
2204  * here. When the Link comes up again, it will be
2205  * sensed by the sis_timer procedure, which also does
2206  * all the rest for us */
2207  netif_carrier_off(dev);
2208 
2209  /* read current state */
2210  status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2211 
2212  /* enable auto negotiation and reset the negotioation
2213  * (I don't really know what the auto negatiotiation
2214  * reset really means, but it sounds for me right to
2215  * do one here) */
2216  mdio_write(dev, mii_phy->phy_addr,
2217  MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2218 
2219  break;
2220 
2221  case IF_PORT_10BASET: /* 10BaseT */
2222  dev->if_port = map->port;
2223 
2224  /* we are going to change the media type, so the Link
2225  * will be temporary down and we need to reflect that
2226  * here. When the Link comes up again, it will be
2227  * sensed by the sis_timer procedure, which also does
2228  * all the rest for us */
2229  netif_carrier_off(dev);
2230 
2231  /* set Speed to 10Mbps */
2232  /* read current state */
2233  status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2234 
2235  /* disable auto negotiation and force 10MBit mode*/
2236  mdio_write(dev, mii_phy->phy_addr,
2237  MII_CONTROL, status & ~(MII_CNTL_SPEED |
2238  MII_CNTL_AUTO));
2239  break;
2240 
2241  case IF_PORT_100BASET: /* 100BaseT */
2242  case IF_PORT_100BASETX: /* 100BaseTx */
2243  dev->if_port = map->port;
2244 
2245  /* we are going to change the media type, so the Link
2246  * will be temporary down and we need to reflect that
2247  * here. When the Link comes up again, it will be
2248  * sensed by the sis_timer procedure, which also does
2249  * all the rest for us */
2250  netif_carrier_off(dev);
2251 
2252  /* set Speed to 100Mbps */
2253  /* disable auto negotiation and enable 100MBit Mode */
2254  status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2255  mdio_write(dev, mii_phy->phy_addr,
2256  MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2257  MII_CNTL_SPEED);
2258 
2259  break;
2260 
2261  case IF_PORT_10BASE2: /* 10Base2 */
2262  case IF_PORT_AUI: /* AUI */
2263  case IF_PORT_100BASEFX: /* 100BaseFx */
2264  /* These Modes are not supported (are they?)*/
2265  return -EOPNOTSUPP;
2266  break;
2267 
2268  default:
2269  return -EINVAL;
2270  }
2271  }
2272  return 0;
2273 }
2274 
2286 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2287 {
2288 
2289  u32 crc = ether_crc(6, addr);
2290 
2291  /* leave 8 or 7 most siginifant bits */
2292  if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2293  return (int)(crc >> 24);
2294  else
2295  return (int)(crc >> 25);
2296 }
2297 
2307 static void set_rx_mode(struct net_device *net_dev)
2308 {
2309  struct sis900_private *sis_priv = netdev_priv(net_dev);
2310  void __iomem *ioaddr = sis_priv->ioaddr;
2311  u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2312  int i, table_entries;
2313  u32 rx_mode;
2314 
2315  /* 635 Hash Table entries = 256(2^16) */
2316  if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2317  (sis_priv->chipset_rev == SIS900B_900_REV))
2318  table_entries = 16;
2319  else
2320  table_entries = 8;
2321 
2322  if (net_dev->flags & IFF_PROMISC) {
2323  /* Accept any kinds of packets */
2324  rx_mode = RFPromiscuous;
2325  for (i = 0; i < table_entries; i++)
2326  mc_filter[i] = 0xffff;
2327  } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) ||
2328  (net_dev->flags & IFF_ALLMULTI)) {
2329  /* too many multicast addresses or accept all multicast packet */
2330  rx_mode = RFAAB | RFAAM;
2331  for (i = 0; i < table_entries; i++)
2332  mc_filter[i] = 0xffff;
2333  } else {
2334  /* Accept Broadcast packet, destination address matchs our
2335  * MAC address, use Receive Filter to reject unwanted MCAST
2336  * packets */
2337  struct netdev_hw_addr *ha;
2338  rx_mode = RFAAB;
2339 
2340  netdev_for_each_mc_addr(ha, net_dev) {
2341  unsigned int bit_nr;
2342 
2343  bit_nr = sis900_mcast_bitnr(ha->addr,
2344  sis_priv->chipset_rev);
2345  mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2346  }
2347  }
2348 
2349  /* update Multicast Hash Table in Receive Filter */
2350  for (i = 0; i < table_entries; i++) {
2351  /* why plus 0x04 ??, That makes the correct value for hash table. */
2352  sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift);
2353  sw32(rfdr, mc_filter[i]);
2354  }
2355 
2356  sw32(rfcr, RFEN | rx_mode);
2357 
2358  /* sis900 is capable of looping back packets at MAC level for
2359  * debugging purpose */
2360  if (net_dev->flags & IFF_LOOPBACK) {
2361  u32 cr_saved;
2362  /* We must disable Tx/Rx before setting loopback mode */
2363  cr_saved = sr32(cr);
2364  sw32(cr, cr_saved | TxDIS | RxDIS);
2365  /* enable loopback */
2366  sw32(txcfg, sr32(txcfg) | TxMLB);
2367  sw32(rxcfg, sr32(rxcfg) | RxATX);
2368  /* restore cr */
2369  sw32(cr, cr_saved);
2370  }
2371 }
2372 
2382 static void sis900_reset(struct net_device *net_dev)
2383 {
2384  struct sis900_private *sis_priv = netdev_priv(net_dev);
2385  void __iomem *ioaddr = sis_priv->ioaddr;
2386  u32 status = TxRCMP | RxRCMP;
2387  int i;
2388 
2389  sw32(ier, 0);
2390  sw32(imr, 0);
2391  sw32(rfcr, 0);
2392 
2393  sw32(cr, RxRESET | TxRESET | RESET | sr32(cr));
2394 
2395  /* Check that the chip has finished the reset. */
2396  for (i = 0; status && (i < 1000); i++)
2397  status ^= sr32(isr) & status;
2398 
2399  if (sis_priv->chipset_rev >= SIS635A_900_REV ||
2400  sis_priv->chipset_rev == SIS900B_900_REV)
2401  sw32(cfg, PESEL | RND_CNT);
2402  else
2403  sw32(cfg, PESEL);
2404 }
2405 
2413 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2414 {
2415  struct net_device *net_dev = pci_get_drvdata(pci_dev);
2416  struct sis900_private *sis_priv = netdev_priv(net_dev);
2417 
2418  unregister_netdev(net_dev);
2419 
2420  while (sis_priv->first_mii) {
2421  struct mii_phy *phy = sis_priv->first_mii;
2422 
2423  sis_priv->first_mii = phy->next;
2424  kfree(phy);
2425  }
2426 
2427  pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2428  sis_priv->rx_ring_dma);
2429  pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2430  sis_priv->tx_ring_dma);
2431  pci_iounmap(pci_dev, sis_priv->ioaddr);
2432  free_netdev(net_dev);
2433  pci_release_regions(pci_dev);
2434  pci_set_drvdata(pci_dev, NULL);
2435 }
2436 
2437 #ifdef CONFIG_PM
2438 
2439 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2440 {
2441  struct net_device *net_dev = pci_get_drvdata(pci_dev);
2442  struct sis900_private *sis_priv = netdev_priv(net_dev);
2443  void __iomem *ioaddr = sis_priv->ioaddr;
2444 
2445  if(!netif_running(net_dev))
2446  return 0;
2447 
2448  netif_stop_queue(net_dev);
2449  netif_device_detach(net_dev);
2450 
2451  /* Stop the chip's Tx and Rx Status Machine */
2452  sw32(cr, RxDIS | TxDIS | sr32(cr));
2453 
2454  pci_set_power_state(pci_dev, PCI_D3hot);
2455  pci_save_state(pci_dev);
2456 
2457  return 0;
2458 }
2459 
2460 static int sis900_resume(struct pci_dev *pci_dev)
2461 {
2462  struct net_device *net_dev = pci_get_drvdata(pci_dev);
2463  struct sis900_private *sis_priv = netdev_priv(net_dev);
2464  void __iomem *ioaddr = sis_priv->ioaddr;
2465 
2466  if(!netif_running(net_dev))
2467  return 0;
2468  pci_restore_state(pci_dev);
2469  pci_set_power_state(pci_dev, PCI_D0);
2470 
2471  sis900_init_rxfilter(net_dev);
2472 
2473  sis900_init_tx_ring(net_dev);
2474  sis900_init_rx_ring(net_dev);
2475 
2476  set_rx_mode(net_dev);
2477 
2478  netif_device_attach(net_dev);
2479  netif_start_queue(net_dev);
2480 
2481  /* Workaround for EDB */
2482  sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2483 
2484  /* Enable all known interrupts by setting the interrupt mask. */
2485  sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
2486  sw32(cr, RxENA | sr32(cr));
2487  sw32(ier, IE);
2488 
2489  sis900_check_mode(net_dev, sis_priv->mii);
2490 
2491  return 0;
2492 }
2493 #endif /* CONFIG_PM */
2494 
2495 static struct pci_driver sis900_pci_driver = {
2496  .name = SIS900_MODULE_NAME,
2497  .id_table = sis900_pci_tbl,
2498  .probe = sis900_probe,
2499  .remove = __devexit_p(sis900_remove),
2500 #ifdef CONFIG_PM
2501  .suspend = sis900_suspend,
2502  .resume = sis900_resume,
2503 #endif /* CONFIG_PM */
2504 };
2505 
2506 static int __init sis900_init_module(void)
2507 {
2508 /* when a module, this is printed whether or not devices are found in probe */
2509 #ifdef MODULE
2510  printk(version);
2511 #endif
2512 
2513  return pci_register_driver(&sis900_pci_driver);
2514 }
2515 
2516 static void __exit sis900_cleanup_module(void)
2517 {
2518  pci_unregister_driver(&sis900_pci_driver);
2519 }
2520 
2521 module_init(sis900_init_module);
2522 module_exit(sis900_cleanup_module);
2523 
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