#include <PPCRegisterInfo.h>
Detailed Description
Definition at line 29 of file PPCRegisterInfo.h.
Constructor & Destructor Documentation
| PPCRegisterInfo::PPCRegisterInfo | ( | const PPCSubtarget & | SubTarget | ) |
Definition at line 59 of file PPCRegisterInfo.cpp.
References llvm::AArch64DB::LD.
Member Function Documentation
| bool PPCRegisterInfo::canRealignStack | ( | const MachineFunction & | MF | ) | const |
Definition at line 880 of file PPCRegisterInfo.cpp.
References llvm::MachineFunction::getFunction(), and llvm::Function::hasFnAttribute().
Referenced by needsStackRealignment().
| void PPCRegisterInfo::eliminateFrameIndex | ( | MachineBasicBlock::iterator | II, |
| int | SPAdj, | ||
| unsigned | FIOperandNum, | ||
| RegScavenger * | RS = nullptr |
||
| ) | const [override] |
Definition at line 709 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::count(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::TargetOpcode::DBG_VALUE, llvm::PPCISD::DYNALLOC, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::find(), llvm::ISD::FrameIndex, llvm::AttributeSet::FunctionIndex, llvm::MCInstrInfo::get(), llvm::Function::getAttributes(), getBaseRegister(), llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFrameInfo(), llvm::PPCFunctionInfo::getFramePointerSaveIndex(), getFrameRegister(), llvm::MachineFunction::getFunction(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineFrameInfo::getObjectOffset(), getOffsetONFromFION(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::TargetOpcode::INLINEASM, llvm::MachineInstr::isInlineAsm(), llvm::isInt< 16 >(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, lowerCRBitRestore(), lowerCRBitSpilling(), lowerCRRestore(), lowerCRSpilling(), lowerDynamicAlloc(), lowerVRSAVERestore(), lowerVRSAVESpilling(), llvm::AArch64CC::MI, llvm::Attribute::Naked, llvm::MachineInstr::setDesc(), TII, and usesIXAddr().
| unsigned PPCRegisterInfo::getBaseRegister | ( | const MachineFunction & | MF | ) | const |
Definition at line 854 of file PPCRegisterInfo.cpp.
References getFrameRegister(), llvm::TargetMachine::getRelocationModel(), llvm::MachineFunction::getTarget(), hasBasePointer(), llvm::PPCSubtarget::isPPC64(), llvm::PPCSubtarget::isSVR4ABI(), and llvm::Reloc::PIC_.
Referenced by eliminateFrameIndex(), llvm::PPCFrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitPrologue(), and llvm::PPCFrameLowering::replaceFPWithRealFP().
| const MCPhysReg * PPCRegisterInfo::getCalleeSavedRegs | ( | const MachineFunction * | MF = nullptr | ) | const [override] |
Code Generation virtual methods...
Definition at line 101 of file PPCRegisterInfo.cpp.
References llvm::PPCSubtarget::hasAltivec(), llvm::PPCSubtarget::isDarwinABI(), and llvm::PPCSubtarget::isPPC64().
| const uint32_t * PPCRegisterInfo::getCallPreservedMask | ( | CallingConv::ID | CC | ) | const [override] |
Definition at line 119 of file PPCRegisterInfo.cpp.
References llvm::PPCSubtarget::hasAltivec(), llvm::PPCSubtarget::isDarwinABI(), and llvm::PPCSubtarget::isPPC64().
| unsigned PPCRegisterInfo::getFrameRegister | ( | const MachineFunction & | MF | ) | const [override] |
Definition at line 845 of file PPCRegisterInfo.cpp.
References llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineFunction::getSubtarget(), llvm::TargetFrameLowering::hasFP(), and llvm::PPCSubtarget::isPPC64().
Referenced by eliminateFrameIndex(), and getBaseRegister().
| const TargetRegisterClass * PPCRegisterInfo::getLargestLegalSuperClass | ( | const TargetRegisterClass * | RC | ) | const [override] |
Definition at line 255 of file PPCRegisterInfo.cpp.
References llvm::PPCSubtarget::hasVSX().
| const uint32_t * PPCRegisterInfo::getNoPreservedMask | ( | ) | const |
Definition at line 137 of file PPCRegisterInfo.cpp.
Referenced by llvm::PPCTargetLowering::emitEHSjLjSetJmp().
| const TargetRegisterClass * PPCRegisterInfo::getPointerRegClass | ( | const MachineFunction & | MF, |
| unsigned | Kind = 0 |
||
| ) | const [override] |
getPointerRegClass - Return the register class to use to hold pointers. This is used for addressing modes.
Definition at line 85 of file PPCRegisterInfo.cpp.
References llvm::PPCSubtarget::isPPC64().
| unsigned PPCRegisterInfo::getRegPressureLimit | ( | const TargetRegisterClass * | RC, |
| MachineFunction & | MF | ||
| ) | const [override] |
Definition at line 224 of file PPCRegisterInfo.cpp.
References llvm::TargetSubtargetInfo::getFrameLowering(), llvm::TargetRegisterClass::getID(), llvm::MachineFunction::getSubtarget(), and llvm::TargetFrameLowering::hasFP().
| BitVector PPCRegisterInfo::getReservedRegs | ( | const MachineFunction & | MF | ) | const [override] |
Definition at line 141 of file PPCRegisterInfo.cpp.
References llvm::sys::path::begin(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::TargetMachine::getRelocationModel(), llvm::MachineFunction::getSubtarget(), llvm::MachineFunction::getTarget(), llvm::PPCSubtarget::hasAltivec(), hasBasePointer(), I, llvm::ARM_PROC::IE, llvm::PPCSubtarget::isDarwinABI(), llvm::PPCSubtarget::isPPC64(), llvm::PPCSubtarget::isSVR4ABI(), llvm::PPCFrameLowering::needsFP(), llvm::Reloc::PIC_, llvm::NVPTX::PTXCvtMode::RM, and llvm::BitVector::set().
| bool PPCRegisterInfo::hasBasePointer | ( | const MachineFunction & | MF | ) | const |
Definition at line 868 of file PPCRegisterInfo.cpp.
References AlwaysBasePointer, EnableBasePointer, and needsStackRealignment().
Referenced by llvm::PPCFrameLowering::determineFrameLayout(), eliminateFrameIndex(), llvm::PPCFrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitPrologue(), getBaseRegister(), getReservedRegs(), llvm::PPCFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::PPCFrameLowering::processFunctionBeforeFrameFinalized(), and llvm::PPCFrameLowering::replaceFPWithRealFP().
| bool PPCRegisterInfo::hasReservedSpillSlot | ( | const MachineFunction & | MF, |
| unsigned | Reg, | ||
| int & | FrameIdx | ||
| ) | const [override] |
Definition at line 661 of file PPCRegisterInfo.cpp.
References llvm::PPCFunctionInfo::getCRSpillFrameIndex(), llvm::MachineFunction::getInfo(), llvm::PPCSubtarget::isPPC64(), and llvm::PPCSubtarget::isSVR4ABI().
| bool PPCRegisterInfo::isFrameOffsetLegal | ( | const MachineInstr * | MI, |
| int64_t | Offset | ||
| ) | const [override] |
Definition at line 998 of file PPCRegisterInfo.cpp.
References llvm::TargetOpcode::DBG_VALUE, llvm::MachineOperand::getImm(), getOffsetONFromFION(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::isFI(), llvm::isInt< 16 >(), and usesIXAddr().
Referenced by needsFrameBaseReg().
| void PPCRegisterInfo::lowerCRBitRestore | ( | MachineBasicBlock::iterator | II, |
| unsigned | FrameIndex | ||
| ) | const |
Definition at line 562 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineInstr::definesRegister(), llvm::MachineBasicBlock::erase(), llvm::MCInstrInfo::get(), getCRFromCRBit(), llvm::MachineInstr::getDebugLoc(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::RegState::Implicit, llvm::TargetOpcode::IMPLICIT_DEF, llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, llvm::PPCISD::MFOCRF, llvm::AArch64CC::MI, and TII.
Referenced by eliminateFrameIndex().
| void PPCRegisterInfo::lowerCRBitSpilling | ( | MachineBasicBlock::iterator | II, |
| unsigned | FrameIndex | ||
| ) | const |
Definition at line 519 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::ISD::FrameIndex, llvm::MCInstrInfo::get(), getCRFromCRBit(), llvm::MachineInstr::getDebugLoc(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::getKillRegState(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isKill(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, llvm::TargetOpcode::KILL, llvm::PPCISD::MFOCRF, llvm::AArch64CC::MI, and TII.
Referenced by eliminateFrameIndex().
| void PPCRegisterInfo::lowerCRRestore | ( | MachineBasicBlock::iterator | II, |
| unsigned | FrameIndex | ||
| ) | const |
Definition at line 446 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineInstr::definesRegister(), llvm::MachineBasicBlock::erase(), llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, llvm::AArch64CC::MI, and TII.
Referenced by eliminateFrameIndex().
| void PPCRegisterInfo::lowerCRSpilling | ( | MachineBasicBlock::iterator | II, |
| unsigned | FrameIndex | ||
| ) | const |
lowerCRSpilling - Generate the code for spilling a CR register. Instead of reserving a whole register (R0), we scrounge for one here. This generates code like this:
mfcr rA ; Move the conditional register into GPR rA. rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot. stw rA, FI ; Store rA to the frame.
Definition at line 402 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::ISD::FrameIndex, llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::getKillRegState(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isKill(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, llvm::PPCISD::MFOCRF, llvm::AArch64CC::MI, and TII.
Referenced by eliminateFrameIndex().
| void PPCRegisterInfo::lowerDynamicAlloc | ( | MachineBasicBlock::iterator | II | ) | const |
lowerDynamicAlloc - Generate the code for allocating an object in the current frame. The sequence of code with be in the general form
addi R0, SP, #frameSize ; get the address of the previous frame stwxu R0, SP, Rnegsize ; add and update the SP with the negated size addi Rnew, SP, #maxCalFrameSize ; get the top of the allocation
Definition at line 280 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), AND, llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFrameInfo::getMaxAlignment(), llvm::MachineFrameInfo::getMaxCallFrameSize(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::TargetFrameLowering::getStackAlignment(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), llvm::TargetMachine::getSubtargetImpl(), llvm::MachineFunction::getTarget(), llvm::isInt< 16 >(), llvm::MachineOperand::isKill(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, llvm::AArch64DB::LD, LI, llvm::AArch64CC::MI, and TII.
Referenced by eliminateFrameIndex().
| void PPCRegisterInfo::lowerVRSAVERestore | ( | MachineBasicBlock::iterator | II, |
| unsigned | FrameIndex | ||
| ) | const |
Definition at line 634 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineInstr::definesRegister(), llvm::MachineBasicBlock::erase(), llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::RegState::Kill, llvm::AArch64CC::MI, and TII.
Referenced by eliminateFrameIndex().
| void PPCRegisterInfo::lowerVRSAVESpilling | ( | MachineBasicBlock::iterator | II, |
| unsigned | FrameIndex | ||
| ) | const |
Definition at line 609 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::ISD::FrameIndex, llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::getKillRegState(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isKill(), llvm::RegState::Kill, llvm::AArch64CC::MI, and TII.
Referenced by eliminateFrameIndex().
| void PPCRegisterInfo::materializeFrameBaseRegister | ( | MachineBasicBlock * | MBB, |
| unsigned | BaseReg, | ||
| int | FrameIdx, | ||
| int64_t | Offset | ||
| ) | const [override] |
Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.
Definition at line 955 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::constrainRegClass(), llvm::MachineBasicBlock::end(), llvm::MCInstrInfo::get(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::TargetInstrInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MipsISD::Ins, llvm::PPCSubtarget::isPPC64(), and TII.
| bool PPCRegisterInfo::needsFrameBaseReg | ( | MachineInstr * | MI, |
| int64_t | Offset | ||
| ) | const [override] |
Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.
Definition at line 907 of file PPCRegisterInfo.cpp.
References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::count(), llvm::PPCFrameLowering::determineFrameLayout(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), and isFrameOffsetLegal().
| bool PPCRegisterInfo::needsStackRealignment | ( | const MachineFunction & | MF | ) | const [override] |
Definition at line 887 of file PPCRegisterInfo.cpp.
References canRealignStack(), F(), llvm::AttributeSet::FunctionIndex, llvm::Function::getAttributes(), llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::MachineFunction::getFunction(), llvm::MachineFrameInfo::getMaxAlignment(), llvm::TargetFrameLowering::getStackAlignment(), llvm::TargetMachine::getSubtargetImpl(), llvm::MachineFunction::getTarget(), llvm::AttributeSet::hasAttribute(), and llvm::Attribute::StackAlignment.
Referenced by hasBasePointer().
| bool llvm::PPCRegisterInfo::requiresFrameIndexScavenging | ( | const MachineFunction & | MF | ) | const [inline, override] |
Definition at line 59 of file PPCRegisterInfo.h.
| bool llvm::PPCRegisterInfo::requiresRegisterScavenging | ( | const MachineFunction & | MF | ) | const [inline, override] |
We require the register scavenger.
Definition at line 55 of file PPCRegisterInfo.h.
| bool llvm::PPCRegisterInfo::requiresVirtualBaseRegisters | ( | const MachineFunction & | MF | ) | const [inline, override] |
Definition at line 67 of file PPCRegisterInfo.h.
| void PPCRegisterInfo::resolveFrameIndex | ( | MachineInstr & | MI, |
| unsigned | BaseReg, | ||
| int64_t | Offset | ||
| ) | const [override] |
Definition at line 975 of file PPCRegisterInfo.cpp.
References llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineRegisterInfo::constrainRegClass(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineInstr::getNumOperands(), getOffsetONFromFION(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::TargetInstrInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isFI(), and TII.
| bool llvm::PPCRegisterInfo::trackLivenessAfterRegAlloc | ( | const MachineFunction & | MF | ) | const [inline, override] |
Definition at line 63 of file PPCRegisterInfo.h.
The documentation for this class was generated from the following files:
1.7.6.1