30 #undef RX_DONT_PASS_UL
33 #include <linux/slab.h>
45 #include "ieee80211/dot11d.h"
65 static char ifname[
IFNAMSIZ] =
"wlan%d";
66 static int hwseqnum = 0;
82 MODULE_PARM_DESC(hwseqnum,
" Try to use hardware 802.11 header sequence numbers. Zero=default");
83 MODULE_PARM_DESC(hwwep,
" Try to use hardware WEP support. Still broken and not available on all cards");
92 static void rtl8180_shutdown(
struct pci_dev *pdev)
102 struct net_device *dev = pci_get_drvdata(pdev);
104 if (!netif_running(dev))
105 goto out_pci_suspend;
119 static int rtl8180_resume(
struct pci_dev *pdev)
121 struct net_device *dev = pci_get_drvdata(pdev);
143 pci_read_config_dword(pdev, 0x40, &val);
144 if ((val & 0x0000ff00) != 0)
145 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
147 if (!netif_running(dev))
158 static struct pci_driver rtl8180_pci_driver = {
160 .id_table = rtl8180_pci_id_tbl,
161 .probe = rtl8180_pci_probe,
163 .suspend = rtl8180_suspend,
164 .resume = rtl8180_resume,
165 .shutdown = rtl8180_shutdown,
216 static int proc_get_registers(
char *
page,
char **
start,
218 int *eof,
void *
data)
226 for (n = 0; n <=
max;) {
227 len +=
snprintf(page + len, count - len,
"\nD: %2x > ", n);
229 for (i = 0; i < 16 && n <=
max; i++, n++)
230 len +=
snprintf(page + len, count - len,
"%2x ",
233 len +=
snprintf(page + len, count - len,
"\n");
241 static int proc_get_stats_hw(
char *page,
char **start,
242 off_t offset,
int count,
243 int *eof,
void *data)
251 static int proc_get_stats_rx(
char *page,
char **start,
252 off_t offset,
int count,
253 int *eof,
void *data)
260 len +=
snprintf(page + len, count - len,
263 "RX CRC Error(0-500): %lu\n"
264 "RX CRC Error(500-1000): %lu\n"
265 "RX CRC Error(>1000): %lu\n"
266 "RX ICV Error: %lu\n",
269 priv->
stats.rxcrcerrmin,
270 priv->
stats.rxcrcerrmid,
271 priv->
stats.rxcrcerrmax,
279 static int proc_get_stats_tx(
char *page,
char **start,
280 off_t offset,
int count,
281 int *eof,
void *data)
287 unsigned long totalOK;
289 totalOK = priv->
stats.txnpokint+priv->
stats.txhpokint+priv->
stats.txlpokint;
290 len +=
snprintf(page + len, count - len,
294 "TX beacon OK: %lu\n"
295 "TX beacon error: %lu\n",
299 priv->
stats.txbeacon,
300 priv->
stats.txbeaconerr
309 DMESG(
"Initializing proc filesystem");
338 DMESGE(
"Unable to initialize /proc/net/r8180/%s\n",
344 priv->
dir_dev, proc_get_stats_hw, dev);
346 DMESGE(
"Unable to initialize "
347 "/proc/net/r8180/%s/stats-hw\n",
352 priv->
dir_dev, proc_get_stats_rx, dev);
354 DMESGE(
"Unable to initialize "
355 "/proc/net/r8180/%s/stats-rx\n",
361 priv->
dir_dev, proc_get_stats_tx, dev);
363 DMESGE(
"Unable to initialize "
364 "/proc/net/r8180/%s/stats-tx\n",
369 priv->
dir_dev, proc_get_registers, dev);
371 DMESGE(
"Unable to initialize "
372 "/proc/net/r8180/%s/registers\n",
383 struct buffer **bufferhead)
391 if (*buffer ==
NULL) {
392 DMESGE(
"Failed to kmalloc head of TX/RX struct");
395 (*buffer)->next = *
buffer;
396 (*buffer)->buf =
buf;
397 (*buffer)->dma =
dma;
398 if (bufferhead !=
NULL)
399 (*bufferhead) = (*buffer);
404 while (tmp->
next != (*buffer))
408 DMESGE(
"Failed to kmalloc TX/RX struct");
436 pci_unmap_single(pdev, tmp->
dma,
442 }
while (next != *buffer);
452 printk(
"ASCII BUFFER DUMP (len: %x):\n", len);
454 for (i = 0; i < len; i++)
457 printk(
"\nBINARY BUFFER DUMP (len: %x):\n", len);
459 for (i = 0; i < len; i++)
467 struct r8180_priv *priv = ieee80211_priv(dev);
504 ret = (head -
tail)/8;
514 struct r8180_priv *priv = ieee80211_priv(dev);
516 int requiredbyte, required;
523 required = requiredbyte / (priv->
txbuffsize-4);
544 *tmp = *tmp & ~(1<<31);
550 *tmp = *tmp & ~(1<<31);
556 *tmp = *tmp & ~(1<<31);
561 *tmp = *tmp & ~(1<<31);
567 *tmp = *tmp & ~(1<<31);
573 *tmp = *tmp & ~(1<<31);
579 *tmp = *tmp & ~(1<<31);
625 tmp += rx_desc_size, rxbuf = rxbuf->
next) {
626 *(tmp+2) = rxbuf->
dma;
627 *tmp = *tmp & ~0xfff;
639 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
640 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
641 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
642 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
643 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
644 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
645 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
646 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
647 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
648 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
652 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
653 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
654 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
655 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
656 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
657 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
658 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
659 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
660 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
661 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
677 temp = QUALITY_MAP[
q];
732 struct r8180_priv *priv = ieee80211_priv(dev);
765 if ((ch > 14) || (ch < 1)) {
766 printk(
"In %s: Invalid chnanel %d\n", __func__, ch);
788 DMESG(
"NIC in promisc mode");
936 struct r8180_priv *priv = ieee80211_priv(dev);
959 if ((bufsize & 0xfff) !=
bufsize) {
960 DMESGE(
"TX buffer allocation too large");
964 sizeof(
u32)*8*count+256, &dma_desc);
973 WARN(1,
"DMA buffer is not aligned\n");
977 for (i = 0; i <
count; i++) {
985 DMESGE(
"Unable to allocate mem for buffer NP");
991 DMESGE(
"Unable to allocate mem for buffer LP");
997 DMESGE(
"Unable to allocate mem for buffer NP");
1003 DMESGE(
"Unable to allocate mem for buffer LP");
1009 DMESGE(
"Unable to allocate mem for buffer NP");
1015 DMESGE(
"Unable to allocate mem for buffer HP");
1021 DMESGE(
"Unable to allocate mem for buffer BP");
1026 *tmp = *tmp & ~(1<<31);
1027 *(tmp+2) = (
u32)dma_tmp;
1031 *(tmp+4) = (
u32)dma_desc+((i+1)*8*4);
1033 *(tmp+4) = (
u32)dma_desc;
1134 if ((bufsize & 0xfff) !=
bufsize) {
1135 DMESGE(
"RX buffer allocation too large");
1142 if (dma_desc & 0xff)
1147 WARN(1,
"DMA buffer is not aligned\n");
1153 for (i = 0; i <
count; i++) {
1156 DMESGE(
"Failed to kmalloc RX buffer");
1160 dma_tmp = pci_map_single(pdev, buf, bufsize *
sizeof(
u8),
1165 DMESGE(
"Unable to allocate mem RX buf");
1169 *tmp = *tmp | (bufsize&0xfff);
1170 *(tmp+2) = (
u32)dma_tmp;
1171 *tmp = *tmp | (1<<31);
1173 tmp = tmp+rx_desc_size;
1176 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30);
1209 DMESGW(
"Card reset timeout!");
1211 DMESG(
"Card successfully reset");
1250 static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1256 return rtl_rate[
rate];
1261 if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1277 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1279 FrameTime = (
u16)(144+48+(FrameLength*8/(DataRate/10)));
1282 FrameTime = (
u16)(72+24+(FrameLength*8/(DataRate/10)));
1284 if ((FrameLength*8 % (DataRate/10)) != 0)
1288 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1289 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1290 FrameTime = (
u16)(16 + 4 + 4*Ceiling + 6);
1339 if (CurrSS >= 71 && CurrSS <= 100)
1340 RetSS = 90 + ((CurrSS - 70) / 3);
1341 else if (CurrSS >= 41 && CurrSS <= 70)
1342 RetSS = 78 + ((CurrSS - 40) / 3);
1343 else if (CurrSS >= 31 && CurrSS <= 40)
1344 RetSS = 66 + (CurrSS - 30);
1345 else if (CurrSS >= 21 && CurrSS <= 30)
1346 RetSS = 54 + (CurrSS - 20);
1347 else if (CurrSS >= 5 && CurrSS <= 20)
1348 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1349 else if (CurrSS == 4)
1351 else if (CurrSS == 3)
1353 else if (CurrSS == 2)
1355 else if (CurrSS == 1)
1362 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1375 SignalPower = (
long)((SignalStrengthIndex + 1) >> 1);
1419 unsigned char quality, signal;
1428 u8 LNA_gain[4] = {02, 17, 29, 39};
1432 u8 bHwError = 0, bCRC = 0, bICV = 0;
1433 bool bCckRate =
false;
1435 long SignalStrengthIndex = 0;
1450 priv->
stats.rxnodata++;
1459 tmp -= rx_desc_size;
1461 if (!(*tmp & (1<<31)))
1463 }
while (tmp != priv->
rxring);
1472 DMESGW(
"RX buffer overflow");
1474 priv->
stats.rxicverr++;
1477 priv->
stats.rxdmafail++;
1482 pci_dma_sync_single_for_cpu(priv->
pdev,
1488 first = *(priv->
rxringtail) & (1<<29) ? 1 : 0;
1492 last = *(priv->
rxringtail) & (1<<28) ? 1 : 0;
1503 if (lastlen < priv->rx_prevlen)
1510 priv->
stats.rxcrcerrmin++;
1511 else if ((*(priv->
rxringtail) & 0x0fff) > 1000)
1512 priv->
stats.rxcrcerrmax++;
1514 priv->
stats.rxcrcerrmid++;
1522 if (first && last) {
1523 padding = ((*(priv->
rxringtail+3))&(0x04000000))>>26;
1525 padding = ((*(priv->
rxringtail+3))&(0x04000000))>>26;
1545 signal = (
unsigned char)(((*(priv->
rxringtail+3)) & (0x00ff0000))>>16);
1546 signal = (signal & 0xfe) >> 1;
1552 rxpower = ((
char)(((*(priv->
rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1553 RSSI = ((
u8)(((*(priv->
rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1556 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1559 Antenna = (((*(priv->
rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1561 RxAGC_dBm = rxpower+1;
1565 LNA = (
u8) (RxAGC_dBm & 0x60) >> 5;
1566 BB = (
u8) (RxAGC_dBm & 0x1F);
1568 RxAGC_dBm = -(LNA_gain[LNA] + (
BB*2));
1573 if (RxAGC_dBm & 0x80)
1574 RXAGC = ~(RxAGC_dBm)+1;
1580 else if (RXAGC < 25)
1582 RXAGC = (90-RXAGC)*100/65;
1586 else if (RXAGC < 30)
1588 RXAGC = (95-RXAGC)*100/65;
1597 else if (quality < 27)
1600 quality = 127 - quality;
1611 bHwError = (((*(priv->
rxringtail)) & (0x00000fff)) == 4080) |
1612 (((*(priv->
rxringtail)) & (0x04000000)) != 0) |
1613 (((*(priv->
rxringtail)) & (0x08000000)) != 0) |
1614 (((~(*(priv->
rxringtail))) & (0x10000000)) != 0) |
1615 (((~(*(priv->
rxringtail))) & (0x20000000)) != 0);
1623 !bHwError && !bCRC && !bICV &&
1661 priv->
stats.rxnolast++;
1667 priv->
rx_skb = dev_alloc_skb(len+2);
1683 tmp_skb = dev_alloc_skb(priv->
rx_skb->len+len+2);
1703 (((
unsigned char *)priv->
rxbuffer->buf) + 2), len);
1711 if (priv->
rx_skb->len > 4)
1719 pci_dma_sync_single_for_device(priv->
pdev,
1787 unsigned long flags;
1804 spin_unlock_irqrestore(&priv->
tx_lock, flags);
1810 DMESGW(
"Error: no descriptor left by previous TX (avail %d) ",
1818 spin_unlock_irqrestore(&priv->
tx_lock, flags);
1836 unsigned long flags;
1844 spin_unlock_irqrestore(&priv->
tx_lock, flags);
1854 spin_unlock_irqrestore(&priv->
tx_lock, flags);
1870 duration = ((len+4)<<4) / 0x2;
1871 drift = ((len+4)<<4) % 0x2;
1878 duration = ((len+4)<<4) / 0x4;
1879 drift = ((len+4)<<4) % 0x4;
1886 duration = ((len+4)<<4) / 0xb;
1887 drift = ((len+4)<<4) % 0xb;
1895 duration = ((len+4)<<4) / 0x16;
1896 drift = ((len+4)<<4) % 0x16;
1933 short morefrag,
short descfrag,
int rate)
1935 struct r8180_priv *priv = ieee80211_priv(dev);
1948 u8 bUseShortPreamble = 0;
1953 u16 ThisFrameTime = 0;
1954 u16 TxDescDuration = 0;
1955 u8 ownbit_flag =
false;
2006 if (is_multicast_ether_addr(dest)) {
2013 0, bUseShortPreamble);
2014 TxDescDuration = ThisFrameTime;
2026 u16 RtsTime, CtsTime;
2043 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*
aSifsTime;
2045 TxDescDuration = RtsTime + RtsDur;
2052 0, bUseShortPreamble);
2053 TxDescDuration = ThisFrameTime +
aSifsTime + AckTime;
2067 Duration = NextFragTime + 3*
aSifsTime + 2*AckTime;
2078 while (remain != 0) {
2081 DMESGE(
"TX buffer error, cannot TX frames. pri %d.", priority);
2087 DMESGW(
"No more TX desc, returning %x of %x",
2089 priv->
stats.txrdu++;
2103 if (remain == len && !descfrag) {
2104 ownbit_flag =
false;
2105 *tail = *tail | (1<<29) ;
2106 *tail = *tail | (len);
2111 for (i = 0; i < buflen && remain > 0; i++, remain--) {
2112 ((
u8 *)buf)[
i] = txbuf[
i];
2113 if (remain == 4 && i+4 >= buflen)
2119 *(tail+3) = *(tail+3) & ~0xfff;
2120 *(tail+3) = *(tail+3) |
i;
2132 *(tail+1) |= (RtsDur&0xffff);
2134 *(tail+3) |= ((TxDescDuration&0xffff)<<16);
2136 *(tail+5) |= (11<<8);
2138 *tail = *tail | ((rate&0xf) << 24);
2144 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2146 *(tail+1) = *(tail+1) | (1<<31);
2150 *tail = (*tail) | (1<<17);
2152 *tail = (*tail) | (1<<28);
2154 *(tail+5) = *(tail+5)|(2<<27);
2155 *(tail+7) = *(tail+7)|(1<<4);
2159 *tail = *tail | (1<<31);
2161 if ((tail - begin)/8 == count-1)
2166 buflist = buflist->
next;
2205 *temp_tail = *temp_tail | (1<<31);
2215 struct r8180_priv *priv = ieee80211_priv(dev);
2239 struct r8180_priv *priv = ieee80211_priv(dev);
2248 struct r8180_priv *priv = ieee80211_priv(dev);
2283 #define HW_WAKE_DELAY 5
2287 unsigned long flags;
2288 struct r8180_priv *priv = ieee80211_priv(dev);
2294 spin_unlock_irqrestore(&priv->
ps_lock, flags);
2299 unsigned long flags;
2300 struct r8180_priv *priv = ieee80211_priv(dev);
2305 spin_unlock_irqrestore(&priv->
ps_lock, flags);
2310 struct r8180_priv *priv = ieee80211_priv(dev);
2312 unsigned long flags;
2320 tl -=
MSECS(4+16+7);
2328 spin_unlock_irqrestore(&priv->
ps_lock, flags);
2329 printk(
"too short to sleep\n");
2334 u32 tmp = (tl >
rb) ? (tl-rb) : (rb-tl);
2347 spin_unlock_irqrestore(&priv->
ps_lock, flags);
2352 spin_unlock_irqrestore(&priv->
ps_lock, flags);
2369 AcParam.
f.AciAifsn.f.AIFSN = 2;
2370 AcParam.
f.AciAifsn.f.ACM = 0;
2371 AcParam.
f.Ecw.f.ECWmin = 3;
2372 AcParam.
f.Ecw.f.ECWmax = 7;
2373 AcParam.
f.TXOPLimit = 0;
2374 for (eACI = 0; eACI <
AC_MAX; eACI++) {
2375 AcParam.
f.AciAifsn.f.ACI = (
u8)eACI;
2408 for (i = 0; i <
AC_MAX; i++) {
2417 eACI = pAcParam->
f.AciAifsn.f.ACI;
2461 DMESG(
"<----watch_dog_adaptive():driver is not up!\n");
2485 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},
2486 {{1,2,3,4,5,6,7,8,9,10,11},11},
2487 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},
2488 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},
2489 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},
2490 {{14,36,40,44,48,52,56,60,64},9},
2491 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},
2492 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},
2493 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},
2494 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},
2495 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}
2506 switch (channel_plan) {
2519 if (ChannelPlan[channel_plan].
Len != 0) {
2524 if (ChannelPlan[channel_plan].
Channel[i] <= 14)
2548 for (i = 1; i <= 14; i++)
2558 static void rtl8180_statistics_init(
struct Stats *pstats)
2563 static void rtl8180_link_detect_init(
plink_detect_t plink_detect)
2602 struct r8180_priv *priv = ieee80211_priv(dev);
2619 printk(
"rtl8180_init:Error channel plan! Set to default.\n");
2641 rtl8180_statistics_init(&priv->
stats);
2756 sema_init(&priv->
wx_sem, 1);
2776 (
unsigned long)priv);
2779 priv->watch_dog_timer.data = (
unsigned long)dev;
2783 priv->rateadapter_timer.data = (
unsigned long)dev;
2786 priv->bEnhanceTxPwr =
false;
2795 priv->ieee80211->init_wmmparam_flag = 0;
2801 priv->MWIEnable = 0;
2803 priv->ShortRetryLimit = 7;
2804 priv->LongRetryLimit = 7;
2805 priv->EarlyRxThreshold = 7;
2807 priv->CSMethod = (0x01 << 29);
2819 (priv->EarlyRxThreshold == 7 ?
2832 priv->InitialGain = 6;
2834 DMESG(
"MAC controller is a RTL8187SE b/g");
2838 priv->ieee80211->short_slot = 1;
2841 priv->enable_gpio0 = 0;
2844 usValue = eeprom_val;
2845 DMESG(
"usValue is 0x%x\n", usValue);
2850 priv->EEPROMSwAntennaDiversity =
false;
2852 priv->EEPROMSwAntennaDiversity =
true;
2856 priv->EEPROMDefaultAntenna1 =
false;
2858 priv->EEPROMDefaultAntenna1 =
true;
2860 if (priv->RegSwAntennaDiversityMechanism == 0)
2862 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2865 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1) ?
false :
true);
2867 if (priv->RegDefaultAntenna == 0)
2869 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2872 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna == 2) ?
true :
false);
2875 priv->hw_plcp_len = 1;
2877 priv->plcp_preamble_mode = 2;
2887 for (i = 1, j = 0; i < 14; i += 2, j++) {
2889 priv->chtxpwr[
i] = word & 0xff;
2890 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2892 for (i = 1, j = 0; i < 14; i += 2, j++) {
2894 priv->chtxpwr_ofdm[
i] = word & 0xff;
2895 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2905 priv->bXtalCalibration =
true;
2910 priv->bTxPowerTrack =
true;
2913 priv->cck_txpwr_base = word & 0xf;
2914 priv->ofdm_txpwr_base = (word>>4) & 0xf;
2917 DMESG(
"EEPROM version %x", version);
2918 priv->rcr_csense = 3;
2921 priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
2926 DMESGW(
"**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2931 priv->rf_set_sens =
NULL;
2965 DMESGE(
"Error allocating IRQ %d", dev->
irq);
2968 priv->irq = dev->
irq;
2981 struct r8180_priv *priv = ieee80211_priv(dev);
2990 key0_word4 &= ~0xff;
2991 key0_word4 |= priv->
key0[3] & 0xff;
3061 phyw = ((data<<8) | adr);
3091 int basic_rate, min_rr_rate, max_rr_rate;
3104 for (i = 0; i <= basic_rate; i++)
3112 struct r8180_priv *priv = ieee80211_priv(dev);
3178 netif_start_queue(dev);
3190 DMESG(
"Enabling beacon TX");
3213 struct r8180_priv *priv = ieee80211_priv(dev);
3271 static void MgntLinkKeepAlive(
struct r8180_priv *priv)
3302 static u8 read_acadapter_file(
char *
filename);
3306 struct r8180_priv *priv = ieee80211_priv(dev);
3307 bool bEnterPS =
false;
3308 bool bBusyTraffic =
false;
3312 if (priv->
ieee80211->actscanning ==
false) {
3315 (priv->
ieee80211->beinretry ==
false) &&
3326 if (TotalRxNum == 0) {
3333 MgntLinkKeepAlive(priv);
3347 bBusyTraffic =
true;
3370 struct r8180_priv *priv = ieee80211_priv(dev);
3374 DMESG(
"Bringing up iface");
3392 struct r8180_priv *priv = ieee80211_priv(dev);
3403 struct r8180_priv *priv = ieee80211_priv(dev);
3413 struct r8180_priv *priv = ieee80211_priv(dev);
3425 struct r8180_priv *priv = ieee80211_priv(dev);
3434 if (!netif_queue_stopped(dev))
3435 netif_stop_queue(dev);
3466 struct r8180_priv *priv = ieee80211_priv(dev);
3473 struct r8180_priv *priv = ieee80211_priv(dev);
3492 static void r8180_set_multicast(
struct net_device *dev)
3494 struct r8180_priv *priv = ieee80211_priv(dev);
3507 struct r8180_priv *priv = ieee80211_priv(dev);
3548 .ndo_get_stats = rtl8180_stats,
3551 .ndo_set_rx_mode = r8180_set_multicast,
3561 unsigned long ioaddr = 0;
3567 unsigned long pmem_start, pmem_len, pmem_flags;
3569 DMESG(
"Configuring chip resources");
3572 DMESG(
"Failed to enable PCI device");
3577 pci_set_dma_mask(pdev, 0xffffff00ULL);
3578 pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3584 priv = ieee80211_priv(dev);
3587 pci_set_drvdata(pdev, dev);
3590 priv = ieee80211_priv(dev);
3598 DMESG(
"region #1 not a MMIO resource, aborting");
3603 DMESG(
"request_mem_region failed!");
3608 if (ioaddr == (
unsigned long)
NULL) {
3609 DMESG(
"ioremap failed!");
3616 pci_read_config_byte(pdev, 0x05, &unit);
3617 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3629 DMESG(
"Oops: devname already taken! Trying wlan%%d...\n");
3630 strcpy(ifname,
"wlan%d");
3635 DMESG(
"Initialization failed");
3645 DMESG(
"Driver probe completed\n");
3665 DMESG(
"wlan driver load failed\n");
3666 pci_set_drvdata(pdev, NULL);
3673 struct net_device *dev = pci_get_drvdata(pdev);
3678 priv = ieee80211_priv(dev);
3695 if (dev->
mem_start != (
unsigned long)NULL) {
3705 DMESG(
"wlan driver removed\n");
3718 static int __init rtl8180_pci_module_init(
void)
3729 printk(
KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
3734 printk(
KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
3743 printk(
KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3745 DMESG(
"Initializing module");
3749 if (pci_register_driver(&rtl8180_pci_driver)) {
3750 DMESG(
"No device found");
3756 static void __exit rtl8180_pci_module_exit(
void)
3769 unsigned long flags;
3775 spin_unlock_irqrestore(&priv->
tx_lock, flags);
3796 priv->
stats.txretry++;
3843 spin_unlock_irqrestore(&priv->
tx_lock, flag);
3847 nicv = (
u32 *)((nic - nicbegin) + (
u8*)begin);
3848 if ((head <= tail && (nicv > tail || nicv < head)) ||
3849 (head > tail && (nicv > tail && nicv < head))) {
3850 DMESGW(
"nic has lost pointer");
3851 spin_unlock_irqrestore(&priv->
tx_lock, flag);
3861 offs = (nic - nicbegin);
3862 offs = offs / 8 / 4;
3863 hd = (head - begin) / 8;
3874 for (i = 0; i <
j; i++) {
3875 if ((*head) & (1<<31))
3877 if (((*head)&(0x10000000)) != 0) {
3886 *head = *head & ~(1<<31);
3932 spin_unlock_irqrestore(&priv->
tx_lock, flag);
3948 unsigned long flags;
3961 priv->
stats.shints++;
3964 spin_unlock_irqrestore(&priv->
irq_th_lock, flags);
3972 if (inta == 0xffff) {
3974 spin_unlock_irqrestore(&priv->
irq_th_lock, flags);
3980 if (!netif_running(dev)) {
3981 spin_unlock_irqrestore(&priv->
irq_th_lock, flags);
3989 priv->
stats.txbeacon++;
3992 priv->
stats.txbeaconerr++;
3998 priv->
stats.txhperr++;
4005 priv->
stats.txhpokint++;
4010 priv->
stats.rxerr++;
4013 priv->
stats.txbkperr++;
4020 priv->
stats.txbeperr++;
4026 priv->
stats.txnperr++;
4033 priv->
stats.txlperr++;
4040 priv->
stats.rxint++;
4045 priv->
stats.rxint++;
4053 DMESGW(
"No RX descriptor available");
4054 priv->
stats.rxrdu++;
4059 priv->
stats.rxoverflow++;
4064 priv->
stats.txoverflow++;
4068 priv->
stats.txnpokint++;
4074 priv->
stats.txlpokint++;
4080 priv->
stats.txbkpokint++;
4087 priv->
stats.txbeperr++;
4093 spin_unlock_irqrestore(&priv->
irq_th_lock, flags);
4107 struct r8180_priv *priv = ieee80211_priv(dev);
4111 bool bActuallySet =
false;
4114 static char *RadioPowerPath =
"/etc/acpi/events/RadioPower.sh";
4115 static char *envp[] = {
"HOME=/",
"TERM=linux",
"PATH=/usr/bin:/bin", NULL};
4116 static int readf_count = 0;
4118 if (readf_count % 10 == 0)
4119 priv->
PowerProfile = read_acadapter_file(
"/proc/acpi/ac_adapter/AC0/state");
4121 readf_count = (readf_count+1)%0xffff;
4137 if (eRfPowerStateToSet ==
eRfOn)
4140 if ((priv->
ieee80211->bHwRadioOff ==
true) &&
4141 (eRfPowerStateToSet ==
eRfOn)) {
4143 bActuallySet =
true;
4144 }
else if ((priv->
ieee80211->bHwRadioOff ==
false) &&
4145 (eRfPowerStateToSet ==
eRfOff)) {
4147 bActuallySet =
true;
4154 if (priv->
ieee80211->bHwRadioOff ==
true)
4158 argv[0] = RadioPowerPath;
4161 call_usermodehelper(RadioPowerPath, argv, envp,
UMH_WAIT_PROC);
4165 static u8 read_acadapter_file(
char *
filename)