LLVM API Documentation

Public Member Functions
llvm::PPCInstrInfo Class Reference

#include <PPCInstrInfo.h>

Inheritance diagram for llvm::PPCInstrInfo:
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List of all members.

Public Member Functions

 PPCInstrInfo (PPCSubtarget &STI)
const PPCRegisterInfogetRegisterInfo () const
ScheduleHazardRecognizerCreateTargetHazardRecognizer (const TargetSubtargetInfo *STI, const ScheduleDAG *DAG) const override
ScheduleHazardRecognizerCreateTargetPostRAHazardRecognizer (const InstrItineraryData *II, const ScheduleDAG *DAG) const override
int getOperandLatency (const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const override
int getOperandLatency (const InstrItineraryData *ItinData, SDNode *DefNode, unsigned DefIdx, SDNode *UseNode, unsigned UseIdx) const override
bool isCoalescableExtInstr (const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const override
unsigned isLoadFromStackSlot (const MachineInstr *MI, int &FrameIndex) const override
unsigned isStoreToStackSlot (const MachineInstr *MI, int &FrameIndex) const override
MachineInstrcommuteInstruction (MachineInstr *MI, bool NewMI) const override
bool findCommutedOpIndices (MachineInstr *MI, unsigned &SrcOpIdx1, unsigned &SrcOpIdx2) const override
void insertNoop (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
bool AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
unsigned RemoveBranch (MachineBasicBlock &MBB) const override
unsigned InsertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const override
bool canInsertSelect (const MachineBasicBlock &, const SmallVectorImpl< MachineOperand > &Cond, unsigned, unsigned, int &, int &, int &) const override
void insertSelect (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DstReg, const SmallVectorImpl< MachineOperand > &Cond, unsigned TrueReg, unsigned FalseReg) const override
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
bool ReverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
bool FoldImmediate (MachineInstr *UseMI, MachineInstr *DefMI, unsigned Reg, MachineRegisterInfo *MRI) const override
bool isProfitableToIfCvt (MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, const BranchProbability &Probability) const override
bool isProfitableToIfCvt (MachineBasicBlock &TMBB, unsigned NumT, unsigned ExtraT, MachineBasicBlock &FMBB, unsigned NumF, unsigned ExtraF, const BranchProbability &Probability) const override
bool isProfitableToDupForIfCvt (MachineBasicBlock &MBB, unsigned NumCycles, const BranchProbability &Probability) const override
bool isProfitableToUnpredicate (MachineBasicBlock &TMBB, MachineBasicBlock &FMBB) const override
bool isPredicated (const MachineInstr *MI) const override
bool isUnpredicatedTerminator (const MachineInstr *MI) const override
bool PredicateInstruction (MachineInstr *MI, const SmallVectorImpl< MachineOperand > &Pred) const override
bool SubsumesPredicate (const SmallVectorImpl< MachineOperand > &Pred1, const SmallVectorImpl< MachineOperand > &Pred2) const override
bool DefinesPredicate (MachineInstr *MI, std::vector< MachineOperand > &Pred) const override
bool isPredicable (MachineInstr *MI) const override
bool analyzeCompare (const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const override
bool optimizeCompareInstr (MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const override
unsigned GetInstSizeInBytes (const MachineInstr *MI) const
void getNoopForMachoTarget (MCInst &NopInst) const override
 getNoopForMachoTarget - Return the noop instruction to use for a noop.

Detailed Description

Definition at line 67 of file PPCInstrInfo.h.


Constructor & Destructor Documentation

Definition at line 64 of file PPCInstrInfo.cpp.


Member Function Documentation

bool PPCInstrInfo::AnalyzeBranch ( MachineBasicBlock MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond,
bool  AllowModify 
) const [override]
bool PPCInstrInfo::analyzeCompare ( const MachineInstr MI,
unsigned SrcReg,
unsigned SrcReg2,
int Mask,
int Value 
) const [override]
bool PPCInstrInfo::canInsertSelect ( const MachineBasicBlock MBB,
const SmallVectorImpl< MachineOperand > &  Cond,
unsigned  TrueReg,
unsigned  FalseReg,
int CondCycles,
int TrueCycles,
int FalseCycles 
) const [override]
MachineInstr * PPCInstrInfo::commuteInstruction ( MachineInstr MI,
bool  NewMI 
) const [override]
void PPCInstrInfo::copyPhysReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  I,
DebugLoc  DL,
unsigned  DestReg,
unsigned  SrcReg,
bool  KillSrc 
) const [override]

CreateTargetHazardRecognizer - Return the hazard recognizer to use for this target when scheduling the DAG.

Definition at line 71 of file PPCInstrInfo.cpp.

References llvm::PPC::DIR_440, llvm::PPC::DIR_A2, llvm::PPC::DIR_E500mc, and llvm::PPC::DIR_E5500.

CreateTargetPostRAHazardRecognizer - Return the postRA hazard recognizer to use for this target when scheduling the DAG.

Definition at line 87 of file PPCInstrInfo.cpp.

References llvm::PPC::DIR_440, llvm::PPC::DIR_A2, llvm::PPC::DIR_E500mc, llvm::PPC::DIR_E5500, llvm::PPC::DIR_PWR7, llvm::PPC::DIR_PWR8, llvm::TargetMachine::getSubtarget(), llvm::ScheduleDAG::TII, and llvm::ScheduleDAG::TM.

bool PPCInstrInfo::DefinesPredicate ( MachineInstr MI,
std::vector< MachineOperand > &  Pred 
) const [override]
bool PPCInstrInfo::findCommutedOpIndices ( MachineInstr MI,
unsigned SrcOpIdx1,
unsigned SrcOpIdx2 
) const [override]

Definition at line 302 of file PPCInstrInfo.cpp.

References llvm::MachineInstr::getOpcode().

bool PPCInstrInfo::FoldImmediate ( MachineInstr UseMI,
MachineInstr DefMI,
unsigned  Reg,
MachineRegisterInfo MRI 
) const [override]
void PPCInstrInfo::getNoopForMachoTarget ( MCInst NopInst) const [override]

getNoopForMachoTarget - Return the noop instruction to use for a noop.

Definition at line 335 of file PPCInstrInfo.cpp.

References llvm::MCInst::setOpcode().

int PPCInstrInfo::getOperandLatency ( const InstrItineraryData ItinData,
const MachineInstr DefMI,
unsigned  DefIdx,
const MachineInstr UseMI,
unsigned  UseIdx 
) const [override]
int llvm::PPCInstrInfo::getOperandLatency ( const InstrItineraryData ItinData,
SDNode DefNode,
unsigned  DefIdx,
SDNode UseNode,
unsigned  UseIdx 
) const [inline, override]

Definition at line 102 of file PPCInstrInfo.h.

References getOperandLatency().

getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Definition at line 89 of file PPCInstrInfo.h.

Referenced by copyPhysReg(), getOperandLatency(), llvm::PPCSubtarget::getRegisterInfo(), and optimizeCompareInstr().

void PPCInstrInfo::insertNoop ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI 
) const [override]
void PPCInstrInfo::insertSelect ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
DebugLoc  DL,
unsigned  DstReg,
const SmallVectorImpl< MachineOperand > &  Cond,
unsigned  TrueReg,
unsigned  FalseReg 
) const [override]
bool PPCInstrInfo::isCoalescableExtInstr ( const MachineInstr MI,
unsigned SrcReg,
unsigned DstReg,
unsigned SubIdx 
) const [override]
unsigned PPCInstrInfo::isLoadFromStackSlot ( const MachineInstr MI,
int FrameIndex 
) const [override]
bool PPCInstrInfo::isPredicable ( MachineInstr MI) const [override]

Definition at line 1271 of file PPCInstrInfo.cpp.

References llvm::PPCISD::BCTRL, and llvm::MachineInstr::getOpcode().

bool PPCInstrInfo::isPredicated ( const MachineInstr MI) const [override]

Definition at line 1088 of file PPCInstrInfo.cpp.

Referenced by isUnpredicatedTerminator().

bool llvm::PPCInstrInfo::isProfitableToDupForIfCvt ( MachineBasicBlock MBB,
unsigned  NumCycles,
const BranchProbability Probability 
) const [inline, override]

Definition at line 187 of file PPCInstrInfo.h.

bool llvm::PPCInstrInfo::isProfitableToIfCvt ( MachineBasicBlock MBB,
unsigned  NumCycles,
unsigned  ExtraPredCycles,
const BranchProbability Probability 
) const [inline, override]

Definition at line 175 of file PPCInstrInfo.h.

bool PPCInstrInfo::isProfitableToIfCvt ( MachineBasicBlock TMBB,
unsigned  NumT,
unsigned  ExtraT,
MachineBasicBlock FMBB,
unsigned  NumF,
unsigned  ExtraF,
const BranchProbability Probability 
) const [override]

Definition at line 1079 of file PPCInstrInfo.cpp.

References MBBDefinesCTR().

Definition at line 194 of file PPCInstrInfo.h.

unsigned PPCInstrInfo::isStoreToStackSlot ( const MachineInstr MI,
int FrameIndex 
) const [override]
void PPCInstrInfo::loadRegFromStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
unsigned  DestReg,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI 
) const [override]
bool PPCInstrInfo::optimizeCompareInstr ( MachineInstr CmpInstr,
unsigned  SrcReg,
unsigned  SrcReg2,
int  Mask,
int  Value,
const MachineRegisterInfo MRI 
) const [override]
void PPCInstrInfo::storeRegToStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
unsigned  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI 
) const [override]

The documentation for this class was generated from the following files: